ESD7554 4Channel Low Capacitance DualVoltage ESD Protection Array Features http://onsemi.com • 3 Channels of Low Voltage ESD Protection • 1 Channel of High Voltage ESD Protection • Provides ESD Protection to IEC61000−4−2 Level 4: • • • • • • ±8 kV Contact Discharge (Pins 1−3) ±15 kV Contact Discharge (Pin 4) Low Channel Input Capacitance Minimal Capacitance Change with Temperature and Voltage High Voltage Zener Diode Protects Supply Rail No Need for External Bypass Capacitors Each I/O Pin Can Withstand Over 1000 ESD Strikes* These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant MARKING DIAGRAM 8 1 1 30V MG G WDFN8 CASE 517BC 30V M G = Specific Device Code = Date Code = Pb−Free Package PINOUT 5 6 7 8 ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ DAP 4 3 2 1 Bottom View (Pins up View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. NOTE: Note: Pins 5, and 6 to 8 are connected to a common substrate. Figure 1. Electrical Schematic *Standard test condition is IEC61000−4−2 level 4 test circuit with each pin subjected to ±8 kV contact discharge for 1000 pulses. Discharges are timed at 1 second intervals and all 1000 strikes are completed in one continuous test run. The part is then subjected to standard production test to verify that all of the tested parameters are within spec after the 1000 strikes. © Semiconductor Components Industries, LLC, 2010 November, 2010 − Rev. 0 1 Publication Order Number: ESD7554/D ESD7554 Figure 2. Typical Application PIN DESCRIPTIONS 4−CHANNEL, 8−LEAD, uDFN−8 PACKAGE Pin Name Type Description 1 CH1 I/0 LV Low−capacitance ESD Channel 2 CH2 I/0 LV Low−capacitance ESD Channel 3 CH3 I/0 LV Low−capacitance ESD Channel 4 VCC HV VDD 5 GND 6 VN Negative Voltage Supply Rail 7 VN Negative Voltage Supply Rail 8 VN Negative Voltage Supply Rail DAP GND HV ESD Channel Ground Die Attach Pad (Ground) ORDERING INFORMATION Device (Note 1) ESD7554MUT2G # of Channels Leads Part Marking Package Shipping† 4 8 30V uDFN−8, 0.4 mm (Pb−Free) Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 1. Parts are shipped in Tape and Reel form unless otherwise specified. http://onsemi.com 2 ESD7554 SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS Rating Unit DC Voltage on Low−voltage Pins 6 V DC Voltage on High−voltage Pins (VCC pin) 29 V Operating Temperature Range –40 to +85 °C Storage Temperature Range –65 to +150 °C Parameter Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. STANDARD OPERATING CONDITIONS Rating Unit –40 to +85 °C Parameter Operating Temperature Range ELECTRICAL OPERATING CHARACTERISTICS (See Note 2) Symbol VF Parameter Conditions Min Typ Max 6.8 8.2 9.2 –1.05 –0.9 –0.6 Unit LV Diode Reverse Voltage (Positive Voltage) IF = 10 mA; TA = 25°C LV Diode Forward Voltage (Negative Voltage) IF = 10 mA; TA = 25°C LV Channel Leakage Current (Pins 1 and 2) TA = −30°C to 65°C; VIN = 3.3V, VN =0V 100 nA LV Channel Leakage Current (Pin 3 only) TA = −30°C to 65°C; VIN = 3.3 V, VN = 0 V 100 nA CIN LV Channel Input Capacitance At 1 MHz, VN = 0 V, VIN = 1.65 V 1.2 1.5 pF DCIN LV Channel Input Capacitance Matching At 1 MHz, VN = 0 V, VIN = 1.65 V 0.02 ILEAK_HV ILEAK HV Channel Leakage Current TA = 25°C; VCC = 28 V, VN = 0 V 0.1 CIN_HV HV Channel Input Capacitance At 1 MHz, VN = 0V , VIN = 2.5 V 30 VF_HV HV Diode Breakdown Voltage Positive Voltage IF = 10 mA; TA = 25°C VESD ESD Protection Peak Discharge Voltage at any channel input, in system Contact discharge per IEC 61000−4−2 standard VCL RDYN TA = 25°C 30 LV Channel Clamp Voltage (Pin 1−3) Positive Transients Negative Transients TA = 25°C, IPP = 1 A, tP = 8/20 mS Dynamic Resistance LV Channel Positive Transients LV Channel Negative Transients HV Channel Positive Transients HV Channel Negative Transients IPP = 1 A, tP = 8/20 mS Any I/O pin to Ground 2. All parameters specified at TA = –40°C to +85°C unless otherwise noted. http://onsemi.com 3 V pF 1.0 mA pF 35 ±8 (Pin 1−3) ±15 (Pin 4) V V kV +9.64 –1.75 0.72 0.59 4.00 0.20 V V W ESD7554 PERFORMANCE INFORMATION Input channel capacitance performance curves for low voltage pins Figure 3. Typical Variation of CIN vs. VIN (Low Voltage Inputs, f = 1 MHz, VN = 0 V) Figure 4. Typical Variation of CIN vs. Temp (Low Voltage Inputs, f = 1 MHz, VN = 0 V) http://onsemi.com 4 ESD7554 PERFORMANCE INFORMATION Typical filter performance for low voltage pins Nominal conditions unless specified; otherwise, 50 W environment Figure 5. Channel 1 vs. All GND Pins (0 V DC Bias) Figure 6. Channel 2 vs. All GND Pins (0 V DC Bias) http://onsemi.com 5 ESD7554 PERFORMANCE INFORMATION Typical filter performance for low voltage pins Nominal conditions unless specified; otherwise, 50 W environment Figure 7. Channel 3 vs. All GND Pins (0 V DC Bias) http://onsemi.com 6 ESD7554 PACKAGE DIMENSIONS UDFN8, 1.7x1.35, 0.4P CASE 517BC−01 ISSUE O A B D 2X 0.10 C PIN ONE REFERENCE 2X ÉÉÉ ÉÉÉ ÇÇ ÉÉ MOLD CMPD EXPOSED Cu A1 E NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.25 mm FROM THE TERMINAL TIP. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. A3 DETAIL B ALTERNATE CONSTRUCTIONS 0.10 C DIM A A1 A3 b D D2 E E2 e K L L1 TOP VIEW A DETAIL B 0.05 C 8X L1 DETAIL A 0.05 C NOTE 4 SIDE VIEW DETAIL A 8X L L (A3) L A1 C SEATING PLANE ALTERNATE TERMINAL CONSTRUCTIONS RECOMMENDED SOLDERING FOOTPRINT* D2 1 E2 1.40 8X 8 K e e/2 MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.13 REF 0.15 0.25 1.70 BSC 1.10 1.30 1.35 BSC 0.30 0.50 0.40 BSC 0.15 −−− 0.20 0.30 −−− 0.05 8X 0.40 8X b PACKAGE OUTLINE 0.10 C A B 0.05 C NOTE 3 1.55 BOTTOM VIEW 0.50 8X 1 0.25 0.40 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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