NUD3105 Integrated Relay, Inductive Load Driver This device is used to switch inductive loads such as relays, solenoids incandescent lamps , and small DC motors without the need of a free−wheeling diode. The device integrates all necessary items such as the MOSFET switch, ESD protection, and Zener clamps. It accepts logic level inputs thus allowing it to be driven by a large variety of devices including logic gates, inverters, and microcontrollers. Features • Provides a Robust Driver Interface Between DC Relay Coil and • • • • • • • Sensitive Logic Circuits Optimized to Switch Relays from 3.0 V to 5.0 V Rail Capable of Driving Relay Coils Rated up to 2.5 W at 5.0 V Internal Zener Eliminates the Need of Free−Wheeling Diode Internal Zener Clamp Routes Induced Current to Ground for Quieter Systems Operation Low VDS(on) Reduces System Current Drain SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These are Pb−Free Devices http://onsemi.com RELAY/INDUCTIVE LOAD DRIVER 0.5 AMPERE, 8.0 VOLT CLAMP MARKING DIAGRAMS SOT−23 (TO−236) CASE 318 SC−74 CASE 318F STYLE 7 6 1 Typical Applications • Telecom: Line Cards, Modems, Answering Machines, FAX • Computers and Office: Photocopiers, Printers, Desktop Computers • Consumer: TVs and VCRs, Stereo Receivers, CD Players, Cassette Recorders • Industrial:Small Appliances, Security Systems, Automated Test Equipment, Garage Door Openers • Automotive: 5.0 V Driven Relays, Motor Controls, Power Latches, JW4 M D G JW4 M G G 1 JW4 D G G = Device Code = Date Code* = Date Code = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation and/or overbar may vary depending upon manufacturing location. Lamp Drivers ORDERING INFORMATION Package Shipping† NUD3105LT1G SOT−23 (Pb−Free) 3000 / Tape & Reel NUD3105DMT1G SOT−74 (Pb−Free) 3000 / Tape & Reel SZNUD3105DMT1G SOT−74 (Pb−Free) 3000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2014 July, 2014 − Rev. 11 1 Publication Order Number: NUD3105/D NUD3105 Drain (3) Drain (6) Gate (2) Gate (1) Drain (3) 1.0 k Gate (5) 1.0 k 1.0 k 300 k 300 k 300 k Source (1) CASE 318 Source (4) CASE 318F Source (2) Figure 1. Internal Circuit Diagrams MAXIMUM RATINGS (TJ = 25°C unless otherwise specified) Symbol Rating VDSS Drain to Source Voltage − Continuous VGS Value Unit 6.0 Vdc Gate to Source Voltage – Continuous 6.0 Vdc ID Drain Current – Continuous 500 mA Ez Single Pulse Drain−to−Source Avalanche Energy (TJinitial = 25°C) (Note 2) 50 mJ Ezpk Repetitive Pulse Zener Energy Limit (DC v 0.01%) (f = 100 Hz, DC = 0.5) 4.5 mJ TJ Junction Temperature 150 °C TA Operating Ambient Temperature −40 to 85 °C Tstg Storage Temperature Range −65 to +150 °C PD Total Power Dissipation (Note 1) Derating Above 25°C SOT−23 225 1.8 mW mW/°C Total Power Dissipation (Note 1) Derating Above 25°C SC−74 380 1.5 mW mW/°C SOT−23 SC−74 556 329 °C/W RqJA Thermal Resistance, Junction−to−Ambient Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. This device contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL_STD−883, Method 3015. Machine Model Method 200 V. 2. Refer to the section covering Avalanche and Energy. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Characteristic Min Typ Max Unit 6.0 8.0 9.0 V OFF CHARACTERISTICS VBRDSS Drain to Source Sustaining Voltage (Internally Clamped), (ID = 10 mA) BVGSO Ig = 1.0 mA − − 8.0 V Drain to Source Leakage Current (VDS = 5.5 V , VGS = 0 V, TJ = 25°C) (VDS = 5.5 V, VGS = 0 V, TJ = 85°C ) − − − − 15 15 mA Gate Body Leakage Current (318) (VGS = 3.0 V, VDS = 0 V) (VGS = 5.0 V, VDS = 0 V) 5.0 − − − 19 50 mA Gate Body Leakage Current (318F) (VGS = 3.0 V, VDS = 0 V) (VGS = 5.0 V, VDS = 0 V) 5.0 − − − 35 65 mA IDSS IGSS http://onsemi.com 2 NUD3105 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Characteristic Min Typ Max Unit Gate Threshold Voltage (VGS = VDS, ID = 1.0 mA) (VGS = VDS, ID = 1.0 mA, TJ = 85°C) 0.8 0.8 1.2 − 1.4 1.4 V Drain to Source On−Resistance (ID = 250 mA, VGS = 3.0 V) (ID = 500 mA, VGS = 3.0 V) (ID = 500 mA, VGS = 5.0 V) (ID = 500 mA, VGS = 3.0 V, TJ=85°C) (ID = 500 mA, VGS = 5.0 V, TJ=85°C) − − − − − − − − − − 1.2 1.3 0.9 1.3 0.9 W 300 200 400 − − − mA 350 570 − mmhos ON CHARACTERISTICS VGS(th) RDS(on) IDS(on) gFS Output Continuous Current (VDS = 0.25 V, VGS = 3.0 V) (VDS = 0.25 V, VGS = 3.0 V, TJ = 85°C) Forward Transconductance (VOUT = 5.0 V, IOUT = 0.25 A) DYNAMIC CHARACTERISTICS Ciss Input Capacitance (VDS = 5.0 V,VGS = 0 V, f = 10 kHz) − 25 − pF Coss Output Capacitance (VDS = 5.0 V, VGS = 0 V, f = 10 kHz) − 37 − pF Crss Transfer Capacitance (VDS = 5.0 V, VGS = 0 V, f = 10 kHz) − 8.0 − pF Min Typ Max Units − − 25 80 − − − − 44 44 − − − − 23 32 − − − − 53 30 − − SWITCHING CHARACTERISTICS Characteristic Symbol tPHL tPLH tPHL tPLH tf tr tf tr Propagation Delay Times: High to Low Propagation Delay; Figure 1 (5.0 V) Low to High Propagation Delay; Figure 1 (5.0 V) High to Low Propagation Delay; Figure 1 (3.0 V) Low to High Propagation Delay; Figure 1 (3.0 V) Transition Times: Fall Time; Figure 1 (5.0 V) Rise Time; Figure 1 (5.0 V) nS nS Fall Time; Figure 1 (3.0 V) Rise Time; Figure 1 (3.0 V) http://onsemi.com 3 NUD3105 VIH Vin 50% 0V tPHL tPLH VOH 90% Vout 50% 10% VOL tr tf Figure 1. Switching Waveforms http://onsemi.com 4 NUD3105 TYPICAL CHARACTERISTICS 10 TJ = 25°C VGS = 5.0 V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10 1.0 VGS = 3.0 V 0.1 VGS = 2.0 V 0.01 0.001 VDS = 0.8 V 1.0 0.1 0.01 85°C 0.001 50°C 0.0001 25°C 0.0001 0.00001 −40°C VGS = 1.0 V 0.00001 0.000001 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.5 2.0 2.5 3.0 3.5 4.0 4.5 VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 2. Output Characteristics Figure 3. Transfer Function 5.0 50 ID = 0.5 A VGS = 3.0 V 1000 RDS(ON), DRAIN−TO−SOURCE RESISTANCE (W) RDS(ON), DRAIN−TO−SOURCE RESISTANCE (mW) 1.5 VDS, DRAIN TO SOURCE VOLTAGE (V) 1200 ID = 0.25 A VGS = 3.0 V 800 600 400 ID = 0.5 A VGS = 5.0 V 200 0 −50 −25 0 25 50 75 100 125 −40°C 45 ID = 250 mA 40 35 125°C 30 85°C 25 50°C 20 25°C 15 0.8 1.0 1.2 1.4 1.8 1.6 TEMPERATURE (°C) VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 4. On Resistance Variation vs. Temperature Figure 5. RDS(ON) Variation with Gate−To−Source Voltage IZ = 10 mA VZ, ZENER CLAMP VOLTAGE (V) 8.18 8.16 8.14 8.12 8.10 8.08 8.06 8.04 8.02 8.00 −50 2.0 13.0 8.20 VZ, ZENER VOLTAGE (V) 1.0 −25 0 25 50 75 100 125 VGS = 0 V 12.0 −40°C 11.0 25°C 10.0 9.0 8.0 7.0 85°C 6.0 0.1 1.0 10 100 1000 TEMPERATURE (°C) IZ, ZENER CURRENT (mA) Figure 6. Zener Voltage vs. Temperature Figure 7. Zener Clamp Voltage vs. Zener Current http://onsemi.com 5 NUD3105 TYPICAL CHARACTERISTICS 40 35 1.1 125°C IGSS, GATE LEAKAGE (mA) RDS(ON), DRAIN−TO−SOURCE RESISTANCE (W) 1.2 1.0 0.9 85°C 0.8 50°C 0.7 25°C 0.6 −40°C 0.5 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 30 25 VGS = 5.0 V 20 15 VGS = 3.0 V 10 5 0 −50 0 −25 ID, DRAIN CURRENT (A) 25 50 75 100 125 TEMPERATURE (°C) Figure 8. On−Resistance vs. Drain Current and Temperature Figure 9. Gate Leakage vs. Temperature 1.0 VGS = 3.0 V, TC = 25°C ID, DRAIN CURRENT (A) ID−Continuous = 0.5 A RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT DC PW = 0.1 s DC = 50% 0.1 PW = 10 ms DC = 20% PW = 7.0 ms DC = 5% Typical IZ vs. VZ V(BR)DSS min = 6.0 V 0.01 0.01 0.1 10 1.0 100 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 10. Safe Operating Area r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) 1.0 D = 0.5 0.2 0.1 0.1 0.05 Pd(pk) 0.02 0.01 0.01 0.001 0.01 PW t1 t2 SINGLE PULSE 0.1 PERIOD DUTY CYCLE = t1/t2 1.0 10 100 1000 t1, PULSE WIDTH (ms) Figure 11. Transient Thermal Response http://onsemi.com 6 10,000 100,000 1,000,000 NUD3105 Designing with this Data Sheet 4. Verify that the circuit driving the gate will meet the VGS(th) from the Electrical Characteristics table. 5. Using the max output current calculated in step 1, check Figure 7 to insure that the range of Zener clamp voltage over temperature will satisfy all system & EMI requirements. 6. Use IGSS and IDSS from the Electrical Characteristics table to ensure that “OFF” state leakage over temperature and voltage extremes does not violate any system requirements. 7. Review circuit operation and insure none of the device max ratings are being exceeded. 1. Determine the maximum inductive load current (at max VCC, min coil resistance & usually minimum temperature) that the NUD3105 will have to drive and make sure it is less than the max rated current. 2. For pulsed operation, use the Transient Thermal Response of Figure 11 and the instructions with it to determine the maximum limit on transistor power dissipation for the desired duty cycle and temperature range. 3. Use Figures 10 and 11 with the SOA notes to insure that instantaneous operation does not push the device beyond the limits of the SOA plot. APPLICATIONS DIAGRAMS +3.0 ≤ VDD ≤ +3.75 Vdc +4.5 ≤ VCC ≤ +5.5 Vdc + + Vout (3) Vout (3) NUD3105 NUD3105 Vin (1) Vin (1) GND (2) GND (2) Figure 12. A 200 mW, 5.0 V Dual Coil Latching Relay Application with 3.0 V Level Translating Interface http://onsemi.com 7 NUD3105 Max Continuous Current Calculation for TX2−5V Relay, R1 = 178 W Nominal @ RA = 25°C Assuming ±10% Make Tolerance, R1 = 178 W * 0.9 = 160 W Min @ TA = 25°C − − TC for Annealed Copper Wire is 0.4%/°C AROMAT JS1E−5V R1 = 160 W * [1+(0.004) * (−40°−25°)] = 118 W Min @ −40°C IO Max = (5.5 V Max − 0.25V) /118 W = 45 mA +4.5 TO +5.5 Vdc AROMAT JS1E−5V + + + + +4.5 TO +5.5 Vdc + AROMAT JS1E−5V AROMAT JS1E−5V AROMAT TX2−5V − − − Vout (3) Vout (3) NUD3105 NUD3105 Vin (1) Vin (1) GND (2) GND (2) Figure 13. A 140 mW, 5.0 V Relay with TTL Interface Figure 14. A Quad 5.0 V, 360 mW Coil Relay Bank http://onsemi.com 8 NUD3105 PACKAGE DIMENSIONS SOT−23 (TO−236) CASE 318−08 ISSUE AP NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. D SEE VIEW C 3 HE E DIM A A1 b c D E e L L1 HE q c 1 2 b 0.25 e q A L A1 MIN 0.89 0.01 0.37 0.09 2.80 1.20 1.78 0.10 0.35 2.10 0° MILLIMETERS NOM MAX 1.00 1.11 0.06 0.10 0.44 0.50 0.13 0.18 2.90 3.04 1.30 1.40 1.90 2.04 0.20 0.30 0.54 0.69 2.40 2.64 −−− 10 ° L1 VIEW C SOLDERING FOOTPRINT* 0.95 0.037 0.95 0.037 2.0 0.079 0.9 0.035 SCALE 10:1 0.8 0.031 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 9 MIN 0.035 0.001 0.015 0.003 0.110 0.047 0.070 0.004 0.014 0.083 0° INCHES NOM 0.040 0.002 0.018 0.005 0.114 0.051 0.075 0.008 0.021 0.094 −−− MAX 0.044 0.004 0.020 0.007 0.120 0.055 0.081 0.012 0.029 0.104 10° NUD3105 PACKAGE DIMENSIONS SC−74 CASE 318F−05 ISSUE N D 6 5 4 2 3 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. 318F−01, −02, −03, −04 OBSOLETE. NEW STANDARD 318F−05. E HE 1 b e A 0.05 (0.002) q C L A1 SOLDERING FOOTPRINT* 2.4 0.094 DIM A A1 b c D E e L HE q MIN 0.90 0.01 0.25 0.10 2.90 1.30 0.85 0.20 2.50 0° MILLIMETERS NOM MAX 1.00 1.10 0.06 0.10 0.37 0.50 0.18 0.26 3.00 3.10 1.50 1.70 0.95 1.05 0.40 0.60 2.75 3.00 10° − MIN 0.035 0.001 0.010 0.004 0.114 0.051 0.034 0.008 0.099 0° INCHES NOM 0.039 0.002 0.015 0.007 0.118 0.059 0.037 0.016 0.108 − MAX 0.043 0.004 0.020 0.010 0.122 0.067 0.041 0.024 0.118 10° STYLE 7: PIN 1. SOURCE 1 2. GATE 1 3. DRAIN 2 4. SOURCE 2 5. GATE 2 6. DRAIN 1 0.95 0.037 1.9 0.074 0.95 0.037 0.7 0.028 1.0 0.039 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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