MAC8DG, MAC8MG, MAC8NG Triacs Silicon Bidirectional Thyristors Designed for high performance full−wave ac control applications where high noise immunity and high commutating di/dt are required. www.onsemi.com TRIACS 8 AMPERES RMS 400 thru 800 VOLTS Features • • • • • • • • Blocking Voltage to 800 Volts On−State Current Rating of 8.0 Amperes RMS at 100°C Uniform Gate Trigger Currents in Three Quadrants High Immunity to dv/dt − 250 V/ms minimum at 125°C Minimizes Snubber Networks for Protection Industry Standard TO−220 Package High Commutating di/dt − 6.5 A/ms minimum at 125°C These Devices are Pb−Free and are RoHS Compliant* MT2 MT1 G MARKING DIAGRAM 4 MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Characteristic Symbol Peak Repetitive Off−State Voltage, (Note 1) (TJ = −40 to 125°C, Sine Wave, 50 to 60 Hz, Gate Open) MAC8DG MAC8MG MAC8NG VDRM, VRRM On-State RMS Current, (Full Cycle Sine Wave, 60 Hz, TC = 100°C) IT(RMS) 8.0 A ITSM 80 A I2t 26 A2s PGM 16 W PG(AV) 0.35 W Peak Non-Repetitive Surge Current (One Full Cycle Sine Wave, 60 Hz, TJ = 125°C) Circuit Fusing Consideration (t = 8.3 ms) Peak Gate Power (Pulse Width ≤ 1.0 ms, TC = 80°C) Average Gate Power (t = 8.3 ms, TC = 80°C) Value MAC8xG AYWW Unit V 1 400 600 800 2 TO−220 CASE 221A STYLE 4 3 x A Y WW G = D, M, or N = Assembly Location (Optional)* = Year = Work Week = Pb−Free Package * The Assembly Location code (A) is optional. In cases where the Assembly Location is stamped on the package the assembly code may be blank. PIN ASSIGNMENT 1 Main Terminal 1 Main Terminal 2 Operating Junction Temperature Range TJ −40 to +125 °C 2 Storage Temperature Range Tstg −40 to +150 °C 3 Gate 4 Main Terminal 2 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. ORDERING INFORMATION Package Shipping MAC8DG Device TO−220 (Pb−Free) 50 Units / Rail MAC8MG TO−220 (Pb−Free) 50 Units / Rail MAC8NG TO−220 (Pb−Free) 50 Units / Rail *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2015 January, 2015 − Rev. 8 1 Publication Order Number: MAC8D/D MAC8DG, MAC8MG, MAC8NG THERMAL CHARACTERISTICS Symbol Value Unit Thermal Resistance, Junction−to−Case Characteristic RqJC 2.2 °C/W Thermal Resistance, Junction−to−Ambient RqJA 62.5 °C/W TL 260 °C Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted; Electricals apply in both directions) Symbol Min Typ Max Unit IDRM, IRRM − − − − 0.01 2.0 mA Peak On-State Voltage (Note 2), (ITM = ±11 A Peak) VTM − 1.2 1.6 V Gate Trigger Current (Continuous DC) (VD = 12 V, RL = 100 W) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) IGT 5.0 5.0 5.0 13 16 18 35 35 35 Holding Current, (VD = 12 V, Gate Open, Initiating Current = ±150 mA) IH − 20 40 mA Latching Current (VD = 24 V, IG = 35 mA), MT2(+), G(+); MT2(−), G(−) MT2(+), G(−) IL − − 20 30 50 80 mA 0.5 0.5 0.5 0.69 0.77 0.72 1.5 1.5 1.5 0.2 − − (di/dt)c 6.5 − − A/ms dv/dt 250 − − V/ms Characteristic OFF CHARACTERISTICS Peak Repetitive Blocking Current (VD = Rated VDRM, VRRM; Gate Open) TJ = 25°C TJ = 125°C ON CHARACTERISTICS Gate Trigger Voltage (VD = 12 V, RL = 100 W) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) VGT Gate Non−Trigger Voltage (VD = 12 V, RL = 100 W, TJ = 125°C) MT2(+), G(+); MT2(+), G(−); MT2(−), G(−) VGD mA V V DYNAMIC CHARACTERISTICS Rate of Change of Commutating Current See Figure 10.(VD = 400 V, ITM = 4.4 A, Commutating dv/dt = 18 V/ms,Gate Open, TJ = 125°C, f = 250 Hz, No Snubber) CL = 10 mF LL = 40 mH Critical Rate of Rise of Off-State Voltage (VD = Rated VDRM, Exponential Waveform, Gate Open, TJ = 125°C) Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Indicates Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%. www.onsemi.com 2 MAC8DG, MAC8MG, MAC8NG Voltage Current Characteristic of Triacs (Bidirectional Device) + Current Symbol Parameter VTM VDRM Peak Repetitive Forward Off State Voltage IDRM Peak Forward Blocking Current VRRM Peak Repetitive Reverse Off State Voltage IRRM Peak Reverse Blocking Current VTM Maximum On State Voltage IH Holding Current on state IH IRRM at VRRM off state IH Quadrant 3 MainTerminal 2 − VTM Quadrant Definitions for a Triac MT2 POSITIVE (Positive Half Cycle) + (+) MT2 Quadrant II (+) MT2 Quadrant I (+) IGT GATE (−) IGT GATE MT1 MT1 REF REF IGT − + IGT (−) MT2 (−) MT2 Quadrant III Quadrant 1 MainTerminal 2 + Quadrant IV (+) IGT GATE (−) IGT GATE MT1 MT1 REF REF − MT2 NEGATIVE (Negative Half Cycle) All polarities are referenced to MT1. With in−phase signals (using standard AC lines) quadrants I and III are used. www.onsemi.com 3 + Voltage IDRM at VDRM MAC8DG, MAC8MG, MAC8NG 125 12 PAV, AVERAGE POWER (WATTS) TC, CASE TEMPERATURE (°C) DC 120 α = 120, 90, 60, 30° 115 α = 180° 110 DC 105 100 0 1 2 3 4 5 6 IT(RMS), RMS ON‐STATE CURRENT (AMP) 7 10 180° 8 6 60° 4 90° α = 30° 2 0 8 120° 0 1 100 TYPICAL AT TJ = 25°C MAXIMUM @ TJ = 125°C I T, INSTANTANEOUS ON‐STATE CURRENT (AMP) 7 8 Figure 2. On-State Power Dissipation r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) Figure 1. RMS Current Derating 2 3 4 5 6 IT(RMS), ON‐STATE CURRENT (AMP) 10 1 0.1 0.01 0.1 1 10 100 t, TIME (ms) 1·104 1000 Figure 4. Thermal Response MAXIMUM @ TJ = 25°C 40 1 I H, HOLD CURRENT (mA) 35 30 MT2 POSITIVE 25 20 15 MT2 NEGATIVE 10 0.1 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 VT, INSTANTANEOUS ON‐STATE VOLTAGE (VOLTS) 5 -50 5 Figure 3. On-State Characteristics -30 -10 30 50 70 10 90 TJ, JUNCTION TEMPERATURE (°C) Figure 5. Hold Current Variation www.onsemi.com 4 110 130 MAC8DG, MAC8MG, MAC8NG VGT, GATE TRIGGER VOLTAGE (VOLT) IGT, GATE TRIGGER CURRENT (mA) 100 Q2 Q3 Q1 10 1 -50 -30 -10 10 50 90 30 70 TJ, JUNCTION TEMPERATURE (°C) 110 130 1 0.95 0.9 0.85 0.8 075 0.7 0.65 0.6 0.55 0.5 0.45 0.4 -50 Q2 Q3 Q1 -30 5000 110 130 100 (dv/dt) c , CRITICAL RATE OF RISE OF COMMUTATING VOLTAGE (V/μ s) 4.5K 4K 3.5K MT2 NEGATIVE 3K 2.5K 2K 1.5K 1K MT2 POSITIVE 500 1 10 100 RG, GATE TO MAIN TERMINAL 1 RESISTANCE (OHMS) TJ = 125°C 1000 100°C tw f= 1 2 tw (di/dt)c = VDRM 6f ITM 1000 15 20 25 30 35 40 45 50 55 60 (di/dt)c, RATE OF CHANGE OF COMMUTATING CURRENT (A/ms) Figure 8. Critical Rate of Rise of Off-State Voltage (Exponential) Figure 9. Critical Rate of Rise of Commutating Voltage LL 200 VRMS ADJUST FOR ITM, 60 Hz VAC CHARGE 75°C 10 1 10 1N4007 MEASURE I TRIGGER CHARGE CONTROL NON‐POLAR CL TRIGGER CONTROL dv/dt , CRITICAL RATE OF RISE OF OFF‐STATE VOLTAGE (V/ μ s) 10 50 70 30 90 TJ, JUNCTION TEMPERATURE (°C) Figure 7. Gate Trigger Voltage Variation Figure 6. Gate Trigger Current Variation 0 -10 + 200 V MT2 1N914 51 W MT1 G Note: Component values are for verification of rated (di/dt)c. See AN1048 for additional information. Figure 10. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt) www.onsemi.com 5 MAC8DG, MAC8MG, MAC8NG PACKAGE DIMENSIONS TO−220 CASE 221A−09 ISSUE AH −T− B SEATING PLANE C F T S 4 DIM A B C D F G H J K L N Q R S T U V Z A Q 1 2 3 U H K Z L R V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. J G D INCHES MIN MAX 0.570 0.620 0.380 0.415 0.160 0.190 0.025 0.038 0.142 0.161 0.095 0.105 0.110 0.161 0.014 0.024 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 MILLIMETERS MIN MAX 14.48 15.75 9.66 10.53 4.07 4.83 0.64 0.96 3.61 4.09 2.42 2.66 2.80 4.10 0.36 0.61 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 N STYLE 4: PIN 1. 2. 3. 4. MAIN TERMINAL 1 MAIN TERMINAL 2 GATE MAIN TERMINAL 2 ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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