VCUT05B1-DD1 www.vishay.com Vishay Semiconductors Bidirectional Symmetrical (BiSy) Single Line ESD-Protection Diode in LLP1006-2M FEATURES • Ultra compact LLP1006-2M package • Low package height < 0.4 mm 2 1 • 1-line ESD-protection • Working range ± 5.5 V 21129 • Low leakage current < 0.1 μA 20855 • Low load capacitance CD = 10 pF • ESD-protection acc. IEC 61000-4-2 ± 30 kV contact discharge ± 30 kV air discharge MARKING (example only) XY • Soldering can be checked by standard vision inspection. No X-ray necessary 21121 • Pin plating NiPdAu (e4) no whisker growth Bar = pin 1 marking X = date code Y = type code (see table below) • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 ORDERING INFORMATION DEVICE NAME ORDERING CODE TAPED UNITS PER REEL (8 mm TAPE ON 7" REEL) MINIMUM ORDER QUANTITY VCUT05B1-DD1 VCUT05B1-DD1-G-08 8000 8000 PACKAGE DATA DEVICE NAME PACKAGE NAME TYPE CODE WEIGHT MOLDING COMPOUND FLAMMABILITY RATING MOISTURE SENSITIVITY LEVEL SOLDERING CONDITIONS VCUT05B1-DD1 LLP1006-2M P 0.72 mg UL 94 V-0 MSL level 1 (according J-STD-020) 260 °C/10 s at terminals ABSOLUTE MAXIMUM RATINGS VCUT05B1-DD1 PARAMETER TEST CONDITIONS SYMBOL VALUE UNIT Peak pulse current Acc. IEC 61000-4-5, 8/20 μs/single shot IPPM 3 A Peak pulse power Pin 1 to pin 2 acc. IEC 61000-4-5; tp = 8/20 μs; single shot PPP 38 W Contact discharge acc. IEC61000-4-2; 10 pulses VESD ± 30 Air discharge acc. IEC61000-4-2; 10 pulses VESD ± 30 Junction temperature TJ -55 to +145 °C Tstg -55 to +150 °C ESD immunity Operating temperature Storage temperature kV PATENT(S): www.vishay.com/patents This Vishay product is protected by one or more United States and International patents. Rev. 1.4, 04-Feb-16 Document Number: 81149 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VCUT05B1-DD1 www.vishay.com Vishay Semiconductors CUT THE SPIKES WITH VCUT05B1-DD1 The VCUT05B1-DD1 is a Bidirectional and Symmetrical (BiSy) ESD-protection device which clamps positive and negative overvoltage transients to ground. Connected between the signal or data line and the ground the VCUT05B1-DD1 offers a high isolation (low leakage current, low capacitance) within the specified working range. Due to the short leads and small package size of the tiny LLP1006-2M package the line inductance is very low, so that fast transients like and ESD-strike can be clamped with minimal over- or undershoots. ELECTRICAL CHARACTERISTICS VCUT05B1-DD1 (Tamb = 25 °C, unless otherwise specified) PARAMETER TEST CONDITIONS/REMARKS SYMBOL MIN. TYP. MAX. UNIT Number of lines which can be protected Nchannel - - 1 lines Max. reverse working voltage VRWM - - 5.5 V Reverse voltage at I = 0.1 μA VR 5.5 - - V Reverse current at V = 5.5 V IR - - 0.1 μA Reverse breakdown voltage at I = 1 mA VBR 6 7.5 8.5 V at IPP = 1 A VC - 8.3 10.5 V Protection paths Reverse stand-off voltage Reverse clamping voltage Capacitance at IPP = IPPM = 3 A VC - 10.3 12.5 V at V = 0 V; f = 1 MHz CD - 10 13 pF at V = 2.5 V; f = 1 MHz CD - 8 - pF TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) 120 % 12 f = 1 MHz Rise time = 0.7 ns to 1 ns 80 % 8 CD (pF) 10 Discharge Current IESD 100 % 60 % 53 % 6 40 % 4 27 % 20 % 2 0% -10 0 10 20 30 40 50 60 70 80 90 100 0 1 2 21792 Time (ns) 20557 0 Fig. 1 - ESD Discharge Current Wave Form acc. IEC 61000-4-2 (330 /150 pF) 3 4 5 6 VR (V) Fig. 3 - Typical Capacitance CD vs. Reverse Voltage VR 9 8 µs to 100 % 100 % 8 7 80 % VR (V) 6 IPPM 60 % 20 µs to 50 % BiAs-mode 5 4 40 % 3 2 20 % 1 0% 0 20548 10 20 30 Time (µs) Fig. 2 - 8/20 μs Peak Pulse Current Wave Form acc. IEC 61000-4-5 Rev. 1.4, 04-Feb-16 0 10-2 10-1 40 21793 1 101 102 103 104 105 IR (µA) Fig. 4 - Typical Reverse Voltage VR vs. Reverse Current IR Document Number: 81149 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VCUT05B1-DD1 www.vishay.com Vishay Semiconductors 12 10 VC (V) 8 VC 6 4 Measured acc. IEC 61000-4-5 (8/20 µs - wave form) 2 0 0 1 2 21794 3 4 5 IPP (A) Fig. 5 - Typical Peak Clamping Voltage VC vs. Peak Pulse Current IPP 60 Acc. IEC 61000-4-2 ± 8 kV contact discharge 50 40 VC-ESD (V) 30 20 10 0 - 10 - 20 - 30 - 10 0 10 20 30 40 50 60 70 80 90 t (ns) 21795 Fig. 6 - Typical Clamping Performance at + 8 kV Contact Discharge (acc. IEC 61000-4-2) 250 Acc. IEC 61000-4-2 contact discharge VC-ESD (V) 200 150 100 VC-ESD 50 0 0 21796 5 10 15 20 25 30 VESD (kV) Fig. 7 - Typical Peak Clamping Voltage at ESD Contact Discharge (acc. IEC 61000-4-2) Rev. 1.4, 04-Feb-16 Document Number: 81149 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VCUT05B1-DD1 www.vishay.com Vishay Semiconductors 0.25 [0.010] 0.15 [0.006] PACKAGE DIMENSIONS in millimeters (inches): LLP1006-2M 0.65 [0.026] 0.55 [0.022] 0.05 [0.002] 0 [0.000] 0.4 [0.016] 0.33 [0.013] 0.45 [0.018] 0.35 [0.014] Orientation identification 0.125 [0.005] ref. 0.55 [0.022] 0.45 [0.018] 0.3 [0.012] 0.2 [0.008] 1.05 [0.041] 0.95 [0.037] 0.6 [0.024] 1 [0.039] solder resist mask solder pad 0.05 [0.002] Document no.: S8-V-3906.04-019 (4) Rev. 1 - Date: 15.July 2015 21798 0.2 [0.008] 0.5 [0.020] Foot print recommendation: 0.25 [0.010] 0.05 [0.002] Soldermask opening ± 0.03 measured middle of the package Unreeling direction Bidirectional LLP1006-xx Pin 1 mark Top view Rev. 1.4, 04-Feb-16 Pad layout - view from top seen at bottom side Document Number: 81149 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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