VCUT07B1-HD1 Datasheet

VCUT07B1-HD1
www.vishay.com
Vishay Semiconductors
Bidirectional Symmetrical (BiSy) Single Line ESD-Protection Diode
in LLP1006-2L
FEATURES
• Ultra compact LLP1006-2L package
• Low package profile < 0.4 mm
2
1
• 1-line ESD-protection
• Working range ± 7 V
21129
• Low leakage current IR < 0.1 μA
20855
• Low load capacitance CD = 14 pF
• ESD-protection acc. IEC 61000-4-2
± 30 kV contact discharge
± 30 kV air discharge
MARKING (example only)
• Soldering can be checked by standard vision inspection;
no X-ray necessary
XY
• Pin plating NiPdAu (e4) no whisker growth
21121
• e4 - precious metal (e.g. Ag, Au, NiPd, NiPdAu) (no Sn)
Bar = pin 1marking
X = date code
Y = type code (see table below)
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
ORDERING INFORMATION
DEVICE NAME
ORDERING CODE
TAPED UNITS PER REEL
(8 mm TAPE ON 7" REEL)
MINIMUM ORDER QUANTITY
VCUT07B1-HD1
VCUT07B1-HD1-G4-08
8000
8000
PACKAGE DATA
DEVICE NAME
PACKAGE
NAME
TYPE
CODE
WEIGHT
MOLDING COMPOUND
FLAMMABILITY RATING
MOISTURE
SENSITIVITY LEVEL
SOLDERING
CONDITIONS
VCUT07B1-HD1
LLP1006-2L
U
0.72 mg
UL 94 V-0
MSL level 1
(according J-STD-020)
260 °C/10 s at terminals
ABSOLUTE MAXIMUM RATINGS VCUT07B1-HD1
PARAMETER
TEST CONDITIONS
SYMBOL
VALUE
UNIT
Peak pulse current
Acc. IEC 61000-4-5; tp = 8/20 μs; single shot
IPPM
4
A
Peak pulse power
Pin 1 to pin 2
acc. IEC 61000-4-5; tp = 8/20 μs; single shot
PPP
60
W
ESD immunity
Operating temperature
Storage temperature
Contact discharge acc. IEC 61000-4-2; 10 pulses
Air discharge acc. IEC 61000-4-2; 10 pulses
Junction temperature
± 30
kV
± 30
kV
TJ
-40 to +125
°C
Tstg
-55 to +150
°C
VESD

PATENT(S): www.vishay.com/patents 
This Vishay product is protected by one or more United States and International patents.
Rev. 1.3, 04-Feb-16
Document Number: 84137
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VCUT07B1-HD1
www.vishay.com
Vishay Semiconductors
ELECTRICAL CHARACTERISTICS VCUT07B1-HD1 (pin 1 to pin 2 or pin 2 to pin1)
(Tamb = 25 °C, unless otherwise specified)
TEST CONDITIONS/REMARKS
SYMBOL
MIN.
TYP.
MAX.
UNIT
Number of lines which can be protected
Nchannel
-
-
1
lines
Max. reverse working voltage
VRWM
-
-
7
V
Reverse voltage
at IR = 0.1 μA
VR
7
-
-
V
Reverse current
at VRWM = 7 V
IR
-
-
0.1
μA
at IR = 1 mA
VBR
7.3
-
-
V
-
9
12
V
-
-
15
V
-
14
16
pF
-
11
-
pF
PARAMETER
Protection paths
Reverse stand-off voltage
Reverse breakdown voltage
at IPP = 1 A
Reverse clamping voltage
VC
at IPP = IPPM = 4 A
at VR = 0 V; f = 1 MHz
Capacitance
CD
at VR = 2.5 V; f = 1 MHz
CUT THE SPIKES WITH VCUT07B1-HD1:
The VCUT07B1-HD1 is a bidirectional and symmetrical (BiSy) ESD-protection device which clamps positive and negative
overvoltage transients to ground. Connected between the signal or data line and the ground the VCUT07B1-HD1 offers a high
isolation (low leakage current, low capacitance) within the specified working range. Due to the short leads and small package
size of the tiny LLP1006-2L package the line inductance is very low, so that fast transients like an ESD-strike can be clamped
with minimal over- or undershoots.
TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
120 %
Rise time = 0.7 ns to 1 ns
8 µs to 100 %
100 %
80 %
80 %
60 %
60 %
IPPM
Discharge Current IESD
100 %
53 %
40 %
27 %
20 %
20 %
0%
-10 0 10 20 30 40 50 60 70 80 90 100
20557
Time (ns)
Fig. 1 - ESD Discharge Current Wave Form
acc. IEC 61000-4-2 (330 /150 pF)
Rev. 1.3, 04-Feb-16
20 µs to 50 %
40 %
0%
0
20548
10
20
30
40
Time (µs)
Fig. 2 - 8/20 μs Peak Pulse Current Wave Form
acc. IEC 61000-4-5
Document Number: 84137
2
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VCUT07B1-HD1
www.vishay.com
Vishay Semiconductors
16
14
70
f = 1 MHz
Pin 2 - 1
acc. IEC 61000-4-2
+ 8 kV
contact discharge
50
12
40
VC-ESD (V)
10
CD (pF)
Pin 2-1
60
8
6
30
2
20
10
4
0
2
0
-8
- 10
-6
-4
-2
0
2
4
6
VR (V)
22630
- 20
- 10 0
8
Fig. 3 - Typical Capacitance CD vs. Reverse Voltage VR
Fig. 6 - Typical Clamping Performance at + 8 kV
Contact Discharge (acc. IEC 61000-4-2)
20
8
10
6
- 10
0
VC-ESD (V)
2
VR (V)
acc. IEC 61000-4-2
- 8 kV
contact discharge
Pin 2-1
0
4
Pin 2 - 1
-2
- 20
- 30
-4
- 40
-6
- 50
-8
- 60
- 70
0.1
1
10
100
1000 10 000
IR (µA)
22631
-10 0 10 20 30 40 50 60 70 80 90
t (ns)
22634
Fig. 4 - Typical Reverse Voltage VR vs. Reverse Current IR
Fig. 7 - Typical Clamping Performance at + 8 kV
Contact Discharge (acc. IEC 61000-4-2)
15
60
Measured acc. IEC 6100-4-5
(8/20 μs - wave form)
10 positive surge
acc. IEC 61000-4-2 contact discharge
Pin 2-1
positive discharge
40
5
20
0
Pin 2-1
VC-ESD (V)
VC (V)
t (ns)
10
- 10
0.01
10 20 30 40 50 60 70 80 90
22633
VC
-5
- 10
0
VC-ESD
30 ns
- 20
- 40
negative surge
- 15
negative discharge
- 60
0
22632
1
2
3
4
5
IPP (A)
Fig. 5 - Typical Peak Clamping Voltage VC vs.
Peak Pulse Current IPP
Rev. 1.3, 04-Feb-16
0
22635
5
10
15
20
25
VESD (kV)
Fig. 8 - Typical Peak. Clamping Voltage at ESD Contact Discharge
(acc. IEC 61000-4-2)
Document Number: 84137
3
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VCUT07B1-HD1
www.vishay.com
Vishay Semiconductors
0.25 [0.010]
0.15 [0.006]
PACKAGE DIMENSIONS in millimeters (Inches): LLP1006-2L
0.65 [0.026]
0.55 [0.022]
Orientation identification
0.05 [0.002]
0 [0.000]
0.4 [0.016]
0.33 [0.013]
0.45 [0.018]
0.35 [0.014]
0.125 [0.005] ref.
0.55 [0.022]
0.45[0.018]
0.3 [0.012]
0.2 [0.008]
1.05 [0.041]
0.95 [0.037]
1 [0.039]
solder resist mask
solder pad
0.05 [0.002]
Document no.: S8-V-3906.04-005 (4)
Rev. 6 - Date: 15.July 2015
20812
0.2 [0.008]
0.5 [0.020]
0.6 [0.024]
Foot print recommendation:
0.25 [0.010]
0.5 [0.020]
soldermask opening ± 0.03
measured middle of the package
Unreeling direction
Bidirectional
LLP1006-xx
Pin 1 mark
Top view
Rev. 1.3, 04-Feb-16
Pad layout - view from top
seen at bottom side
Document Number: 84137
4
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 02-Oct-12
1
Document Number: 91000