DG408LE, DG409LE www.vishay.com Vishay Siliconix 17 , +12 V / ± 5 V / +5 V / +3 V, 8-Ch / Dual 4-Ch High Performance Analog Multiplexers DESCRIPTION FEATURES The DG408LE, DG409LE are monolithic analog multiplexers / demultiplexers designed to operate on single and dual supplies. Single supply voltage ranges from 3 V to 16 V while dual supply operation is recommended with ± 3 V to ± 8 V. • Pin-for-pin compatibility with DG408, DG409, and DG508, DG509 Available • 3 V to 16 V single supply or ± 3 V to ± 8 V dual supply operation • Low power consumption: 6 μA/max., EN = Vx = 5 V Available • Lower on-resistance: RDS(on) - 17 typ. Available • Fast switching: tON - 55 ns, tOFF - 36 ns • Break-before-make guaranteed • Low leakage: IS(OFF) - 1 nA max. • TTL, CMOS, LV logic (3 V) compatible • -99 dB off-isolation and -98 dB crosstalk at 100 kHz • Low parasitic capacitances: CS(OFF) = 5.5 pF, CD(ON) = 35 pF (DG408LE) • ESD Protection: ± 2.5 kV human body model ± 100 V machine model • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 The DG408LE is an 8 channel single-ended analog multiplexer designed to connect one of eight inputs to a common output as determined by a 3 bit binary address (A0, A1, A2). The DG409LE is a dual 4 channel differential analog multiplexer designed to connect one of four differential inputs to a common dual output as determined by its 2 bit binary address (A0, A1). Break-before-make switching action to protect against momentary crosstalk between adjacent channels. An on channel conducts current equally well in both directions. In the off state each channel blocks voltages up to the power supply rails. An enable (EN) function allows the user to reset the multiplexer / demultiplexer to all switches off for stacking several devices. All control inputs, address (Ax) and enable (EN) are TTL compatible over the full specified operating temperature range. The DG408LE, DG409LE feature low on-resistance, fast switching time, and low leakage. They are ideal for data acquisition, control and automation, test instrument, and healthcare products. The DG408LE, DG409LE has an internal regulator powers the logic circuit. Such design reduces device power consumption and makes them ideal for battery operated applications. The DG408LE, DG409LE are available in TSSOP16, SOIC16, and QFN16 packages. Note * This datasheet provides information about parts that are RoHS-compliant and / or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details. BENEFITS • • • • High accuracy Single and dual power rail capacity Wide operating voltage range Simple logic interface APPLICATIONS • • • • • • • • • • Automatic test equipment Data acquisition systems Meters and instruments Medical and healthcare systems Communication systems Audio and video signal routing Relay replacement Battery powered systems Computer peripherals Audio and video signal routing FUNCTIONAL BLOCK DIAGRAMS AND PIN CONFIGURATIONS DG408LE A0 EN VS1 S2 S3 S4 D Dual-In- Line, SOIC and TSSOP 16 1 2 Decoders/Drivers 15 3 14 4 13 5 12 6 11 7 10 8 9 Top View S16-0389-Rev.A, 07-Mar-16 DG409LE Dual-In- Line, SOIC and TSSOP A1 A0 A2 EN GND V- V+ S1a S5 S2a S6 S3a S7 S4a S8 Da 16 1 2 Decoders/Drivers 15 3 14 4 13 5 12 6 11 7 10 8 9 A1 GND V+ S1b S2b S3b S4b Db Top View Document Number: 78084 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408LE, DG409LE www.vishay.com Vishay Siliconix QFN OUTLINE DG408LE QFN16 (3 mm x 3 mm) EN A0 A1 A2 16 15 14 13 Decoder/Driver DG409LE QFN16 (3 mm x 3 mm) EN A0 A1 GND 16 15 14 13 Decoder/Driver 12 GND V- 1 S1 2 11 V+ S1a 2 11 S1b S2 3 10 S5 S2a 3 10 S2b S3 4 9 S6 S3a 4 9 V- 1 12 V+ 5 6 7 8 5 6 7 8 S4 D S8 S7 S4a Da Db S4b TRUTH TABLE (DG408LE) S3b TRUTH TABLE (DG409LE) A2 A1 A0 EN ON SWITCH A1 A0 EN ON SWITCH X X X 0 None X X 0 None 0 0 0 1 1 0 0 1 1 0 0 1 1 2 0 1 1 2 0 1 0 1 3 1 0 1 3 0 1 1 1 4 1 1 1 4 1 0 0 1 5 1 0 1 1 6 1 1 0 1 7 1 1 1 1 8 Note • For low and high voltage levels for VAX and VEN consult “Digital Control” parameters for specific V+ operation. ORDERING INFORMATION TEMP. RANGE CONFIGURATION PACKAGE 16-pin TSSOP 8 Channel Single Ended DG408LE -40 °C to +85 °C Lead-free 16-pin SOIC 16-pin QFN (3 mm x 3 mm) Variation 2 16-pin TSSOP Dual 4 Channel Differential DG409LE 16-pin SOIC 16-pin QFN (3 mm x 3 mm) Variation 2 PART NUMBER MIN. ORDER / PACK. QUANTITY DG408LEDQ-GE3 Tube 360 units DG408LEDQ-T1-GE3 Tape and reel, 3000 units DG408LEDY-GE3 Tube 500 units DG408LEDY-T1-GE3 Tape and reel, 2500 units DG408LEDN-T1-GE4 Tape and reel, 2500 units DG409LEDQ-GE3 Tube 360 units DG409LEDQ-T1-GE3 Tape and reel, 3000 units DG409LEDY-GE3 Tube 500 units DG409LEDY-T1-GE3 Tape and reel, 2500 units DG409LEDN-T1-GE4 Tape and reel, 2500 units Note • -T1 indicates tape and reel, -GE3 indicates lead (Pb)-free and RoHS-compliant, NO -GE3 indicates standard tin/lead finish. • Exposed pad of QFN package can be connected to GND, V-, or left floating. S16-0389-Rev.A, 07-Mar-16 Document Number: 78084 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408LE, DG409LE www.vishay.com Vishay Siliconix ABSOLUTE MAXIMUM RATINGS PARAMETER V+ to LIMIT V- e 18 GND to VDigital Inputs a, UNIT -18 VS, VD (V-) - 0.3 to (V) + 0.3 Current (any terminal) 30 Peak Current, S or D (pulsed at 1 ms, 10 % duty cycle max.) 100 Storage Temperature Power Dissipation (package) b V (D suffix) -65 to +125 16-pin plastic TSSOP c 600 16-pin narrow SOIC c 600 16-pin miniQFN d mA °C mW 1385 ESD Human Body Model (HBM); per ANSI / ESDA / JEDEC® JS-001 2500 V Latch Up Current, per JESD78D 300 mA Notes a. Signals on SX, DX, AX, or EN exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads soldered or welded to PC board. c. Derate 8 mW/°C above 75 °C. d. Derate 17.3 mW/°C above 70 °C e. Also applies when V- = GND Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S16-0389-Rev.A, 07-Mar-16 Document Number: 78084 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408LE, DG409LE www.vishay.com Vishay Siliconix SPECIFICATIONS (Single Supply 12 V) PARAMETER Analog Switch Analog Signal Range e Drain-Source On-Resistance RDS(on) Matching Between Channels g On-Resistance Flatness Switch Off Leakage Current a Channel On Leakage Current a Digital Control Logic High Input Voltage Logic Low Input Voltage Input Current a Dynamic Characteristics SYMBOL TEST CONDITIONS UNLESS OTHERWISE SPECIFIED V+ = 12 V, ± 10 %, V- = 0 V VEN = 0.8 V or 2.4 V f VANALOG RDS(on) RDS RFLAT(on) IS(off) ID(on) ID(on) VINH VINL IIN VD = 10.8 V, VD = 2 V or 9 V, IS = 10 mA sequence each switch on VD = 10.8 V, VD = 2 V or 9 V IS = 10 mA VEN = 0 V, VD = 11 V or 1 V VS = 1 V or 11 V VS = VD = 1 V or 11 V VAX = VEN = 2.4 V or 0.8 V TEMP. b TYP. d D SUFFIX -40 °C to +85 °C MIN. c MAX. c Full Room Full 17 - 0 - 12 23 27 Room 1 - 3 Room Room Full Room Full Room Full 3 - -1 -5 -1 -5 -1 -5 6.5 1 5 1 5 1 5 Full Full Full - 2.4 -1 0.8 1 85 - 100 tTRANS VS1 = 8 V, VS8 = 0 V, (DG408LE) VS1b = 8 V, VS4b = 0 V, (DG409LE) see figure 2 Room Transition Time Full - - 110 Break-Before-Make Time tOPEN VS(all) = VDA = 5 V see figure 4 Room Full Room Full Room Full Room Room Room Room Room Room 34 55 36 -11 -10 -99 -87 -98 -109 1 - 72 82 47 50 - Enable Turn-On Time tON(EN) Enable Turn-Off Time tOFF(EN) VAX = 0 V, VS1 = 5 V (DG408LE) VAX = 0 V, VS1b = 5 V (DG409LE) see figure 3 UNIT V nA V μA ns Charge Injection e (DG408LE) Q CL = 1 nF, VGEN = 6 V, RGEN = 0 pC Charge Injection e (DG409LE) Off Isolation e, h (DG408LE) OIRR Off Isolation e, h (DG409LE) f = 100 kHz, RL = 50 dB e Crosstalk (DG408LE) X TALK Crosstalk e (DG409LE) Source Off Capacitance e Room 5.5 (DG408LE) CS(off) f = 1 MHz, VS = 0 V, VEN = 0 V e Source Off Capacitance Room 5.5 (DG409LE) e Drain Off Capacitance Room 25 (DG408LE) CD(off) f = 1 MHz, VD = 2.4 V, VEN = 0 V pF Drain Off Capacitance e Room 13.5 (DG409LE) Drain On Capacitance Room 35 (DG408LE) f = 1 MHz, VD = 0 V, VEN = 2.4 V CD(on) (DG409LE only) Drain On Capacitance e Room 23.5 (DG409LE) Power Supplies Power Supply Range V+ 3 12 V Power Supply Current I+ VEN = VA = 0 V or 5 V Room 3.5 6 μA Notes a. Leakage parameters are guaranteed by worst case test condition and not subject to production test. b. Room = 25 °C, Full = as determined by the operating temperature suffix. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. RDS(on) = RDS(on) max. - RDS(on) min. h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin. S16-0389-Rev.A, 07-Mar-16 Document Number: 78084 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408LE, DG409LE www.vishay.com Vishay Siliconix SPECIFICATIONS (Dual Supply V+ = 5 V, V - = -5 V) PARAMETER SYMBOL TEST CONDITIONS UNLESS OTHERWISE SPECIFIED V+ = 5 V, ± 10 %, V- = -5 V VEN = 0.6 V or 2.4 V f TEMP. b TYP. d D SUFFIX -40 °C to +85 °C MIN. c UNIT MAX. c Analog Switch Analog Signal Range e Drain-Source On-Resistance Switch Off Leakage Current a VANALOG RDS(on) IS(off) ID(off) Channel On Leakage Current a ID(on) VD = ± 3.5 V, IS = 10 mA sequence each switch on V+ = 5.5, V- = 5.5 V VEN = 0 V, VD = ± 4.5 V, VS = ± 4.5 V V+ = 5.5 V, V- = -5.5 V VEN = 2.4 V, VD = ± 4.5 V, VS = ± 4.5 V Full - -5 5 V Room 15 - 25 Full - - 30 Room - -1 1 Full - -5 5 Room - -1 1 Full - -5 5 Room - -1 1 Full - -5 5 nA Digital Control Logic High Input Voltage VINH Full - 2.4 - Logic Low Input Voltage VINL Full - - 0.6 Input Current a IIN VAX = VEN = 2.4 V or 0.6 V Full - -1 1 VS1 = 3.5 V, VS8 = -3.5 V, (DG408LE) VS1b = 3.5 V, VS4b = -3.5 V, (DG409LE) see figure 2 Room 87 - 100 tTRANS Full - - 120 VS(all) = VDA = 3.5 V see figure 4 Room 84 1 - V μA Dynamic Characteristics Transition Time Break-Before-Make Time Enable Turn-On Time Enable Turn-Off Time Source Off Capacitance e (DG408LE) Source Off Capacitance e (DG409LE) tOPEN tON(EN) tOFF(EN) CS(off) VAX = 0 V, VS1 = 3.5 V (DG408LE) VAX = 0 V, VS1b = 3.5 V (DG409LE) see figure 3 Drain Off Capacitance e (DG409LE) Drain On Capacitance e (DG408LE) Drain On Capacitance e (DG409LE) CD(off) CD(on) - - - 58 - 73 80 Full - - Room 31 - 46 Full - - 51 Room 6 - - Room 5.5 - - Room 26 - - Room 14 - - Room 36 - - Room 24 - - ns f = 1 MHz, VS = 0 V, VEN = 0 V Capacitance e Drain Off (DG408LE) Full Room pF f = 1 MHz, VD = 0 V, VEN = 0 V f = 1 MHz, VD = 0 V, VEN = 2.4 V Notes a. Leakage parameters are guaranteed by worst case test condition and not subject to production test. b. Room = 25 °C, full = as determined by the operating temperature suffix. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet. d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. RDS(on) = RDS(on) max. - RDS(on) min. h. Worst case isolation occurs on channel 4 do to proximity to the drain pin. S16-0389-Rev.A, 07-Mar-16 Document Number: 78084 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408LE, DG409LE www.vishay.com Vishay Siliconix SPECIFICATIONS (Single Supply 5 V) PARAMETER SYMBOL TEST CONDITIONS UNLESS OTHERWISE SPECIFIED V+ = 5 V, ± 10 %, V- = 0 V VEN = 0.6 V or 2.4 V f TEMP. b TYP. d D SUFFIX -40 °C to +85 °C MIN. c UNIT MAX. c Analog Switch Analog Signal Range e Drain-Source On-Resistance RDS(on) Matching Between Channels g On-Resistance Flatness Switch Off Leakage Current a VANALOG RDS(on) RDS RFLAT(on) IS(off) ID(off) Channel On Leakage Current a ID(on) Full - 0 5 V+ = 4.5 V, VD or VS = 1 V or 3.5 V, IS = 5 mA Room 28 - 36 Full - - 41 V+ = 4.5 V, VD = 1 V or 3.5 V, IS = 5 mA Room 1 - 3 V+ = 5.5 V, VS = 1 V or 4 V VD = 4 V or 1 V V+ = 5.5 V, VD = VS = 1 V or 4 V sequence each switch on Room - - 4 Room - -1 1 Full - -5 5 Room - -1 1 Full - -5 5 Room - -1 1 Full - -5 5 Full - 2.4 - Full - - 0.6 V nA Digital Control Logic High Input Voltage VINH Logic Low Input Voltage VINL Input Current a V+ = 5 V IIN VAX = VEN = 2.4 V or 0.6 V Full - -1 1 113 - 135 tTRANS VS1 = 3.5 V, VS8 = 0 V, (DG408LE) VS1b = 3.5 V, VS4b = 0 V, (DG409LE) see figure 2 Room Transition Time Full - - 165 Break-Before-Make Time tOPEN VS(all) = VDA = 3.5 V, see figure 4 Room 75 1 - Full - - - Room 77 - 89 Full - - 110 Room 43 - 50 V μA Dynamic Characteristics Enable Turn-On Time Enable Turn-Off Time Charge Injection e (DG408LE) Charge Injection e (DG409LE) Off Isolation e, h (DG408LE) Off Isolation e, h (DG409LE) Crosstalk e (DG408LE) tON(EN) tOFF(EN) Q VAX = 0 V, VS1 = 3.5 V (DG408LE) VAX = 0 V, VS1b = 3.5 V (DG409LE) see figure 3 CL = 1 nF, RGEN = 0 , VGEN = 2.5 V OIRR f = 100 kHz, RL = 50 XTALK Full - - 53 Room -2 - - Room -2 - - Room -100 - - Room -83 - - Room -101 - - ns pC dB Crosstalk e (DG409LE) Room -108 Source Off Capacitance e Room 6.5 (DG408LE) f = 1 MHz, VS = 0 V, VEN = 0 V CS(off) Source Off Capacitance e Room 6.5 (DG409LE) Drain Off Capacitance e Room 30 (DG408LE) CD(off) pF f = 1 MHz, VD = 0 V, VEN = 0 V Drain Off Capacitance e Room 16 (DG409LE) Drain On Capacitance e Room 40 (DG408LE) CD(on) f = 1 MHz, VD = 0 V, VEN = 2.4 V Drain On Capacitance e Room 26.5 (DG409LE) Notes a. Leakage parameters are guaranteed by worst case test condition and not subject to production test. b. Room = 25 °C, full = as determined by the operating temperature suffix. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. RDS(on) = RDS(on) max. - RDS(on) min. h. Worst case isolation occurs on channel 4 do to proximity to the drain pin. S16-0389-Rev.A, 07-Mar-16 Document Number: 78084 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408LE, DG409LE www.vishay.com Vishay Siliconix SPECIFICATIONS (Single Supply 3 V) PARAMETER SYMBOL TEST CONDITIONS UNLESS OTHERWISE SPECIFIED V+ = 3 V, ± 10 %, V- = 0 V VEN = 0.4 V or 2 V f TEMP. b TYP. d D SUFFIX -40 °C to +85 °C MIN. c UNIT MAX. c Analog Switch Analog Signal Range e Drain-Source On-Resistance Switch Off Leakage Current a VANALOG RDS(on) V+ = 2.7 V, VD = 0.5 or 2.2 V, IS = 5 mA IS(off) V+ = 3.3 V, VS = 2 or 1 V, VD = 1 or 2 V ID(off) Channel On Leakage Current a ID(on) V+ = 3.3 V, VD = VS = 1 V or 2 V sequence each switch on Full - 0 3 V Room 63 - 80 Full - - 92 Room - -1 1 Full - -5 5 Room - -1 1 Full - -5 5 Room - -1 1 Full - -5 5 nA Digital Control Logic High Input Voltage VINH Full - 2 - Logic Low Input Voltage VINL Full - - 0.4 Input Current a IIN VAX = VEN = 2.4 V or 0.4 V Full - -1 1 VS1 = 1.5 V, VS8 = 0 V, (DG408LE) VS1b = 1.5 V, VS4b = 0 V, (DG409LE) see figure 2 Room 211 - 275 tTRANS Full - - 300 VS(all) = VDA = 1.5 V, see figure 4 Room 209 1 - Full - - - Room 125 - 150 V μA Dynamic Characteristics Transition Time Break-Before-Make Time Enable Turn-On Time Enable Turn-Off Time Charge Injectione (DG408LE) Charge Injectione (DG409LE) Off Isolation e, h (DG408LE) Off Isolation e, h (DG409LE) Crosstalk e (DG408LE) Crosstalk e (DG409LE) Source Off Capacitance e (DG408LE) Source Off Capacitance e (DG409LE) Drain Off Capacitance e (DG408LE) Drain Off Capacitance e (DG409LE) Drain On Capacitance e (DG408LE) Drain On Capacitance e (DG409LE) tOPEN tON(EN) tOFF(EN) Q VAX = 0 V, VS1 = 1.5 V (DG408LE) VAX = 0 V, VS1b = 1.5 V (DG409LE) see figure 3 CL = 1 nF, RGEN = 0 , VGEN = 1.5 V OIRR f = 100 kHz, RL = 50 XTALK CS(off) CD(off) CD(on) Full - - 180 Room 45 - 75 Full - - 95 Room 0 - - Room -0.4 - - Room -90 - - Room -95 - - Room -95 - - Room -93 - - Room 7 - - Room 7 - - Room 33 - - Room 18 - - Room 43 - - Room 28 - - ns pC dB f = 1 MHz, VS = 0 V, VEN = 0 V pF f = 1 MHz, VD = 0 V, VEN = 0 V f = 1 MHz, VD = 0 V, VEN = 2 V Notes a. Leakage parameters are guaranteed by worst case test condition and not subject to production test. b. Room = 25 °C, full = as determined by the operating temperature suffix. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. RDS(on) = RDS(on) max. - RDS(on) min. h. Worst case isolation occurs on channel 4 do to proximity to the drain pin. S16-0389-Rev.A, 07-Mar-16 Document Number: 78084 7 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408LE, DG409LE www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 25 65 RDS(on) - Drain-Source On-Resistance () RDS(on) - Drain-Source On-Resistance () 70 V+ = 3.3 V 60 55 50 45 40 35 V+ = 5 V 30 V+ = 12 V 25 20 15 10 V+ = +5 V V- = -5 V 20 15 10 0 1 2 3 4 5 6 7 8 9 VD - Drain Voltage (V) -5 10 11 12 -4 -2 -1 0 1 2 3 4 5 VD - Drain Voltage (V) RDS(on) vs. VD and Power Supply RDS(on) vs. VD and Power Supply 30 50 V+ = 5 V, V- = - 5 V 45 V+ = 5 V, V- = 0 V 25 RDS - On-Resistance () RDS(on) - Drain-Source On-Resistance () -3 25 °C 85 °C 20 15 40 85 C 35 30 25 C 25 10 - 40 C 20 -40 °C 5 15 VD - Drain Voltage (V) 2 3 4 VD - Drain Voltage (V) RDS(on) vs. VD and Temperature (Dual Supply) RDS(on) vs. VD and Temperature -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 0 6 1.8 1 5 6 180 160 Switching Speed (ns) 1.7 1.6 VT (V) Upper Threshold Limit 1.5 Lower Threshold Limit 1.4 140 tTRANS tON 120 100 80 60 1.3 tOFF 40 20 1.2 3 4 5 6 7 8 9 10 11 12 13 14 3 4 5 6 7 8 9 10 11 V+ - Positive Supply Voltage (V) V+ - Positive Supply Voltage(V) Input Threshold vs. V+ Supply Voltage Switching Time vs. Supply Voltage S16-0389-Rev.A, 07-Mar-16 12 Document Number: 78084 8 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408LE, DG409LE www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 5 100 0 Q - Charge Injection (pC) Leakage Current (pA) 50 Is(off) 0 Id(on) -50 Id(off) V+ = 5 V -5 V+ = +/- 5 V -10 V+ = 12 V -100 -15 -150 -5.5 -4.5 -3.5 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 VD, VS – Analog Voltage (V) -20 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 Vs - Source Voltage (V) Leakage Current vs. Analog Voltage Charge Injection vs. Analog Voltage (DG408LE) 10 10 Insertion Loss (-3 dB = 39 MHz) -10 V+ = 5 V, V- = 0 -30 0 Loss (dB) Q - Charge Injection (pC) 5 V+ = 5 V -5 Off Isolation -50 Crosstalk V+ = 12 V -70 V+ = +/- 5 V -10 -90 -110 -15 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 Vs - Source Voltage (V) Charge Injection vs. Analog Voltage (DG409LE) 0 1 10 Frequency (MHz) 100 1000 Insertion Loss, Off Isolation, and Crosstalk vs. Frequency CD, CS – Drain/SourceCapacitance (pF) 50 V+ = 12 V, V- = 0 V 45 Id(on) 40 35 30 25 20 Id(off) 15 Is(off) 10 5 0 0 1 2 3 4 5 6 7 8 9 10 11 12 Drain/Source Capacitance vs. Analog Voltage (DG408L) Drain/Source Capacitance vs. Analog Voltage (DG408LE) S16-0389-Rev.A, 07-Mar-16 Document Number: 78084 9 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408LE, DG409LE www.vishay.com Vishay Siliconix SCHEMATIC DIAGRAM (Typical Channel) V+ Voltage Regulator D A0 VBody Snatcher GND Level Shift AX V+ V- Decode/ Drive S1 VEN Sn V- V- Fig. 1 TEST CIRCUITS V+ V+ A2 S1 A1 50 A0 3V EN VS1 S2 - S7 DG408LE S8 VS8 VO D GND V35 pF 300 Logic Input VAX tr < 20 ns tf < 20 ns 3V 50 % 0V VVS8 VO A1 A0 50 90 % VS1 S1a - S4a, Da V+ S4b tTRANS VSB4 VO Db EN GND 50 % VS1 S1b DG409LE 3V 90 % Switch Output V+ V300 35 pF S1 ON tTRANS S8 ON (DG408LE) or S4 ON (DG409LE) V- Fig. 2 - Transition Time S16-0389-Rev.A, 07-Mar-16 Document Number: 78084 10 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408LE, DG409LE www.vishay.com Vishay Siliconix TEST CIRCUITS V+ V+ VS1 S1 EN S2 - S8 A0 DG408LE A1 A2 GND VO D V- 50 300 Logic Input tr < 20 ns tf < 20 ns 50 % 3V 50 % 0V 35 pF VVO 90 % 90 % V+ Switch Output VO V+ VS1 S1b 0V EN tON(EN) S1a - S4a, Da S2b - S4b A0 tOFF(EN) DG409LE A1 Db GND VO V- 50 300 35 pF V- Fig. 3 - Enable Switching Time bbm.5 3V V+ EN 4/9 VS1 All S and Da A0 Logic Input tr < 20 ns tf < 20 ns 3V 50 % 0V DG408LE DG409LE A1 A2 Db, D GND 50 VO VS V- V- 300 80 % Switch Output 35 pF VO 0V tOPEN Fig. 4 - Break-Before-Make Interval S16-0389-Rev.A, 07-Mar-16 Document Number: 78084 11 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408LE, DG409LE www.vishay.com Vishay Siliconix TEST CIRCUITS V+ Rg V+ SX Logic Input EN Vg A0 Channel Select D A1 GND ON OFF 0V VO CL 1 nF A2 3V Switch Output V- VO VO VO is the measured voltage due to charge transfer error Q, when the channel turns off. V- Q = CL x VO Fig. 5 - Charge Injection V+ V+ VIN VIN V+ SX VS SX VS Rg = 50 S8 A0 D A2 GND RL 50 V- EN S8 VO A1 V+ S1 A0 Rg = 50 D VO A1 A2 EN GND RL 50 V- VV- VOUT Off Isolation = 20 log Crosstalk = 20 log VIN VOUT VIN Fig. 6 - Off Isolation Fig. 7 - Crosstalk V+ V+ VS V+ S1 V+ Rg = 50 A0 D VO A1 A2 GND EN V- S1 Meter A2 Channel Select A0 RL 50 D GND VInsertion Loss = 20 log S8 A1 VOUT EN V- HP4192A Impedance Analyzer or Equivalent f = 1 MHz V- VIN Fig. 8 - Insertion Loss Fig. 9 - Source Drain Capacitance Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?78084. S16-0389-Rev.A, 07-Mar-16 Document Number: 78084 12 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix SOIC (NARROW): 16ĆLEAD JEDEC Part Number: MS-012 MILLIMETERS 16 15 14 13 12 11 10 Dim A A1 B C D E e H L Ĭ 9 E 1 2 3 4 5 6 7 8 INCHES Min Max Min Max 1.35 1.75 0.053 0.069 0.10 0.20 0.004 0.008 0.38 0.51 0.015 0.020 0.18 0.23 0.007 0.009 9.80 10.00 0.385 0.393 3.80 4.00 0.149 0.157 1.27 BSC 0.050 BSC 5.80 6.20 0.228 0.244 0.50 0.93 0.020 0.037 0_ 8_ 0_ 8_ ECN: S-03946—Rev. F, 09-Jul-01 DWG: 5300 H D C All Leads e Document Number: 71194 02-Jul-01 B A1 L Ĭ 0.101 mm 0.004 IN www.vishay.com 1 Package Information www.vishay.com Vishay Siliconix QFN-16 Lead (3 x 3) D2 D2/2 Terminal Tip D (3) - B- D/2 L E/2 E2/2 e E E2 C 3xe 0.25 - A- Exposed Pad (4) 4xb 0.10 M C A B (3) 0.25 C 3xe TOP VIEW BOTTOM VIEW // 0.10 C 0.08 C A (4) NX A1 SEATING PLANE - C- A3 SIDE VIEW Notes (1) All dimensions are in millimeters. (2) N is the total number of terminals. (3) Dimension b applies to metallized terminal and is measured between 0.25 and 0.30 mm from terminal tip. (4) Coplanarity applies to the exposed heat sink slug as well as the terminal. (5) The pin #1 identifier may be either a mold or marked feature, it must be located within the zone indicated. VARIATION 1 DIM. MILLIMETERS VARIATION 2 INCHES MILLIMETERS INCHES MIN. NOM MAX. MIN. NOM MAX. MIN. NOM MAX. MIN. NOM MAX. A 0.80 0.90 1.00 0.031 0.035 0.039 0.80 0.90 1.00 0.031 0.035 0.039 0.012 b 0.18 0.23 0.30 0.007 0.009 0.012 0.18 0.25 0.30 0.007 0.010 D 2.90 3.00 3.10 0.114 0.118 0.122 2.90 3.00 3.10 0.114 0.118 0.122 D2 1.00 1.15 1.25 0.039 0.045 0.049 1.50 1.70 1.80 0.059 0.067 0.071 E 2.90 3.00 3.10 0.114 0.118 0.122 2.90 3.00 3.10 0.114 0.118 0.122 E2 1.00 1.15 1.25 0.039 0.045 0.049 1.50 1.70 1.80 0.059 0.067 0.071 0.50 0.012 0.020 0.30 0.50 0.012 e L 0.50 BSC 0.30 0.40 0.020 BSC 0.50 BSC 0.016 0.40 0.020 BSC 0.016 0.020 ECN: T16-0233-Rev. D, 09-May-16 DWG: 5899 Revision: 09-May-16 1 Document Number: 72208 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix TSSOP: 16-LEAD DIMENSIONS IN MILLIMETERS Symbols Min Nom Max A - 1.10 1.20 A1 0.05 0.10 0.15 A2 - 1.00 1.05 0.38 B 0.22 0.28 C - 0.127 - D 4.90 5.00 5.10 E 6.10 6.40 6.70 E1 4.30 4.40 4.50 e - 0.65 - L 0.50 0.60 0.70 L1 0.90 1.00 1.10 y - - 0.10 θ1 0° 3° 6° ECN: S-61920-Rev. D, 23-Oct-06 DWG: 5624 Document Number: 74417 23-Oct-06 www.vishay.com 1 PAD Pattern www.vishay.com Vishay Siliconix RECOMMENDED MINIMUM PAD FOR TSSOP-16 0.193 (4.90) 0.171 0.014 0.026 0.012 (0.35) (0.65) (0.30) (4.35) (7.15) 0.281 0.055 (1.40) Recommended Minimum Pads Dimensions in inches (mm) Revision: 02-Sep-11 1 Document Number: 63550 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR SO-16 RECOMMENDED MINIMUM PADS FOR SO-16 0.372 (9.449) 0.152 0.022 0.050 0.028 (0.559) (1.270) (0.711) (3.861) 0.246 (6.248) 0.047 (1.194) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index APPLICATION NOTE Return to Index www.vishay.com 24 Document Number: 72608 Revision: 21-Jan-08 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000