Si8441DB Datasheet

Si8441DB
Vishay Siliconix
P-Channel 20-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
RDS(on) (Ω)
ID (A)e
0.080 at VGS = - 4.5 V
- 10.5
0.102 at VGS = - 2.5 V
- 9.3
0.128 at VGS = - 1.8 V
- 3.5
0.198 at VGS = - 1.5 V
- 2.5
0.600 at VGS = - 1.2 V
- 0.5
VDS (V)
- 20
Qg (Typ.)
• TrenchFET® Power MOSFET
RoHS
APPLICATIONS
7.7 nC
COMPLIANT
• Low Threshold Load Switch for Portable Devices
- Low Power Consumption
- Increased Battery Life
MICRO FOOT
Bump Side View
S
Backside View
G
2
6
XXX
S
3
S
8441
S
1
G
D
D
4
5
Device Marking: 8441
xxx = Date/Lot Traceability Code
D
Ordering Information: Si8441DB-T2-E1 (Lead (Pb)-free)
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Symbol
Limit
Drain-Source Voltage
VDS
- 20
Gate-Source Voltage
VGS
±5
TC = 25 °C
Continuous Drain Current (TJ = 150 °C)
TC = 70 °C
TA = 25 °C
ID
Continuous Source-Drain Diode Current
Maximum Power Dissipation
TA = 25 °C
IS
- 4.8a, b
- 15
- 2.3a, b
13
TC = 70 °C
8.4
TA = 25 °C
PD
IR/Convection
2.77a, b
W
1.77a, b
TJ, Tstg
Operating Junction and Storage Temperature Range
A
- 10.8
TC = 25 °C
TA = 70 °C
Package Reflow Conditionsc
- 8.4
- 3.9a, b
IDM
TC = 25 °C
V
- 10.5
TA = 70 °C
Pulsed Drain Current
Unit
- 55 to 150
260
°C
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. t = 10 s.
c. Refer to IPC/JEDEC (J-STD-020C), no manual or hand soldering.
d. In this document, any reference to case represents the body of the MICRO FOOT device and foot is the bump.
e. Based on TC = 25 °C.
Document Number: 74668
S-82119-Rev. C, 08-Sep-08
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Si8441DB
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Parameter
a, b
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
Steady State
Symbol
Typical
RthJA
Maximum
37
45
RthJC
7
9.5
Unit
°C/W
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. Maximum under Steady State conditions is 85 °C/W.
c. Case is defined as top surface of the package.
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
VDS
VGS = 0 V, ID = - 250 µA
- 20
Typ.
Max.
Unit
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
ΔVDS/TJ
VGS(th) Temperature Coefficient
ΔVGS(th)/TJ
Gate-Source Threshold Voltage
ID = - 250 µA
VGS(th)
VDS = VGS, ID = - 250 µA
Gate-Source Leakage
IGSS
VDS = 0 V, VGS = ± 5 V
Zero Gate Voltage Drain Current
IDSS
On-State Drain Currenta
ID(on)
Drain-Source On-State
Resistancea
a
Forward Transconductance
RDS(on)
gfs
V
- 20
mV/°C
2.2
- 0.35
- 0.7
V
± 100
nA
VDS = - 20 V, VGS = 0 V
-1
VDS = - 20 V, VGS = 0 V, TJ = 70 °C
- 10
VDS ≤ - 5 V, VGS = - 4.5 V
-5
µA
A
VGS = - 4.5 V, ID = - 1 A
0.066
0.080
VGS = - 2.5 V, ID = - 1 A
0.085
0.102
VGS = - 1.8 V, ID = - 1 A
0.105
0.128
VGS = - 1.5 V, ID = - 1 A
0.145
0.198
VGS = - 1.2 V, ID = - 0.5 A
0.200
0.600
VDS = - 10 V, ID = - 1 A
7
VDS = - 10 V, VGS = 0 V, f = 1 MHz
130
VDS = - 10 V, VGS = - 5 V, ID = - 1 A
8.5
13
7.7
12
Ω
S
b
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
Rg
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
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2
600
70
VDS = - 10 V, VGS = - 4.5 V, ID = 1 A
0.85
VGS = - 0.1 V, f = 1 MHz
6.2
td(off)
tf
nC
1.6
td(on)
tr
pF
VDD = - 10 V, RL = 10 Ω
ID ≅ - 1 A, VGEN = - 4.5 V, Rg = 1 Ω
Ω
15
25
30
45
35
55
10
15
ns
Document Number: 74668
S-82119-Rev. C, 08-Sep-08
Si8441DB
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
IS
TC = 25 °C
Min.
Typ.
Max.
Unit
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulse Diode Forward Current
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Reverse Recovery Fall Time
ta
Reverse Recovery Rise Time
tb
- 10.5
- 15
IS = - 1 A, VGS = 0 V
IF = - 1 A, dI/dt = 100 A/µs, TJ = 25 °C
A
- 0.7
- 1.2
V
20
40
ns
7
15
nC
11
9
ns
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Document Number: 74668
S-82119-Rev. C, 08-Sep-08
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Si8441DB
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
5
15
VGS = 4.5 thru 2.5 V
4
I D - Drain Current (A)
I D - Drain Current (A)
12
VGS = 2 V
9
6
VGS = 1.5 V
3
TC = 125 °C
2
TC = 25 °C
1
3
TC = - 55 °C
VGS = 1 V
0
0
0
0.5
1.0
1.5
2.0
2.5
0
3.0
0.5
1.0
1.5
2.0
VDS - Drain-to-Source Voltage (V)
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
1000
0.40
800
0.30 VGS = 1.5 V
0.25
C - Capacitance (pF)
RDS(on) - On-Resistance (W)
0.35
VGS = 1.8 V
0.20
0.15
VGS = 2.5 V
Ciss
600
400
0.10
Coss
200
0.05
VGS = 4.5 V
Crss
0
0.00
0
3
6
9
12
0
15
8
12
16
ID - Drain Current (A)
VDS - Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current and Gate Voltage
Capacitance
5
20
1.6
ID = 1 A
ID = 1 A
4
1.4
RDS(on) - On-Resistance
(Normalized)
VGS - Gate-to-Source Voltage (V)
4
VDS = 10 V
3
VDS = 16 V
2
VGS = 4.5 V, 2.5 V, 1.8 V
1.2
VGS = 1.5 V
1.0
0.8
1
0
0
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4
2
4
6
8
10
0.6
- 50
- 25
0
25
50
75
100
125
Qg - Total Gate Charge (nC)
TJ - Junction Temperature (°C)
Gate Charge
On-Resistance vs. Junction Temperature
150
Document Number: 74668
S-82119-Rev. C, 08-Sep-08
Si8441DB
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
0.25
100
RDS(on) - On-Resistance (W)
I S - Source Current (A)
ID = 1 A
10
TJ = 150 °C
TJ = 25 °C
0.20
0.15
125 °C
0.10
25 °C
1
0.0
0.05
0.2
0.4
0.6
0.8
1.0
1.2
0
1.4
1
2
3
4
5
VGS - Gate-to-Source Voltage (V)
VSD - Source-to-Drain Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
30
0.7
ID = 250 µA
25
0.6
Power (W)
VGS(th) (V)
20
0.5
0.4
15
10
0.3
0.2
- 50
5
- 25
0
25
50
75
100
125
0
0.001
150
0.01
0.1
1
10
100
1000
Pulse (s)
TJ - Temperature (°C)
Single Pulse Power, Junction-to-Ambient
Threshold Voltage
100
Limited by R DS(on)*
I D - Drain Current (A)
10
100 µs
1 ms
1
10 ms
100 ms
1 s, 10 s
DC
0.1
TC = 25 °C
Single Pulse
BVDSS Limited
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which R DS(on) is specified
Safe Operating Area, Junction-to-Ambient
Document Number: 74668
S-82119-Rev. C, 08-Sep-08
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Si8441DB
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
15
12
12
Power Dissipation (W)
I D - Drain Current (A)
10
8
6
4
9
6
3
2
0
0
0
25
50
75
100
125
150
25
50
75
100
TC - Case Temperature (°C)
TC - Case Temperature (°C)
Current Derating*
Power Derating
125
150
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
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Document Number: 74668
S-82119-Rev. C, 08-Sep-08
Si8441DB
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
Notes:
0.1
PDM
0.05
t1
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = RthJA = 65 °C/W
0.02
Single Pulse
3. TJM - TA = PDMZthJA(t)
4. Surface Mounted
0.01
10-4
10-3
10-2
10-1
1
Square Wave Pulse Duration (s)
10
100
1000
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
Single Pulse
0.1
10-4
10-3
10-2
10-1
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Case
Document Number: 74668
S-82119-Rev. C, 08-Sep-08
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Si8441DB
Vishay Siliconix
PACKAGE OUTLINE
MICRO FOOT: 6-BUMP (2 x 3, 0.5 mm PITCH)
6 x Ø 0.24 to 0.26 Note 3
Solder Mask ~ Ø 0.25
A1
e
A2
1
A
C
B
A
2
Bump Note 2
e
e
Recommended Land
S
S
D
S
G
e
8441
Mark on Backside of Die
s
XXX
D
D
s
6xØb
s
e
e
s
E
Notes (Unless Otherwise Specified):
1. All dimensions are in millimeters.
2. Six (6) solder bumps are lead (Pb)-free 95.5Sn, 3.8Ag, 0.7Cu with diameter ∅ 0.30 to 0.32 mm.
3. Backside surface is coated with a Ti/Ni/Ag layer.
4. Non-solder mask defined copper landing pad.
5. is location of Pin 1.
·
Dim.
Millimetersa
Inches
Min.
Nom.
Max.
Min.
Nom.
Max.
A
0.510
0.575
0.590
0.0201
0.0224
0.0232
A1
0.220
0.250
0.280
0.0087
0.0098
0.0110
A2
0.290
0.300
0.310
0.0114
0.0118
0.0122
b
0.300
0.310
0.320
0.0118
0.0122
0.0126
e
0.500
0.0197
s
0.230
0.250
0.270
0.0090
0.0098
0.0106
D
0.920
0.960
1.000
0.0362
0.0378
0.0394
E
1.420
1.460
1.500
0.0559
0.0575
0.0591
Notes:
a. Use millimeters as the primary measurement.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?74668.
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Document Number: 74668
S-82119-Rev. C, 08-Sep-08
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Revision: 02-Oct-12
1
Document Number: 91000