VISHAY SI8467DB

Si8467DB
Vishay Siliconix
P-Channel 20 V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
RDS(on) (Ω)
- 20
ID
(A)a, e
0.073 at VGS = - 4.5 V
- 3.4
0.125 at VGS = - 2.5 V
- 2.6
Qg (Typ.)
6.9 nC
• Halogen-free According to IEC 61249-2-21
Definition
• TrenchFET® Power MOSFET
• Ultra-Small 1 mm x 1 mm Maximum Outline
• Ultra-Thin 0.548 mm Maximum Height
• Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
• Load Switches, Battery Switches and Charger Switches
in Portable Device Applications
• DC/DC Converters
MICRO FOOT
Bump Side View
Backside View
S
G
1
D
S
3
4
XXX
2
8 467
S
G
Device Marking: 8467
xxx = Date/Lot Traceability Code
D
P-Channel MOSFET
Ordering Information: Si8467DB-T2-E1 (Lead (Pb)-free and Halogen-free)
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Symbol
Limit
Drain-Source Voltage
VDS
- 20
Gate-Source Voltage
VGS
± 12
Continuous Drain Current (TJ = 150 °C)
TA = 25 °C
ID
Continuous Source-Drain Diode Current
IDM
TC = 25 °C
TA = 25 °C
IS
TA = 70 °C
TA = 25 °C
PD
Package Reflow Conditionsc
A
- 15
- 1.5a
- 0.65b
1.1a
0.78b
W
0.5b
TA = 70 °C
Operating Junction and Storage Temperature Range
- 2.5b
1.8a
TA = 25 °C
Maximum Power Dissipation
- 2.7a
- 2.0b
TA = 70 °C
Pulsed Drain Current
V
- 3.7a
TA = 25 °C
TA = 70 °C
Unit
TJ, Tstg
- 55 to 150
VPR
260
IR/Convection
260
°C
Notes:
a. Surface mounted on 1" x 1" FR4 board with full copper, t = 10 s.
b. Surface mounted on 1" x 1" FR4 board with minimum copper, t = 10 s.
c. Refer to IPC/JEDEC (J-STD-020C), no manual or hand soldering.
d. In this document, any reference to case represents the body of the MICRO FOOT device and foot is the bump.
e. Based on TA = 25 °C.
Document Number: 65930
S10-0643-Rev. A, 22-Mar-10
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1
Si8467DB
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Maximum Junction-to-Ambienta, b
t = 10 s
Maximum Junction-to-Ambientc, d
t = 10 s
Typical
Maximum
55
70
125
160
RthJA
Unit
°C/W
Notes:
a. Surface mounted on 1" x 1" FR4 board with full copper.
b. Maximum under steady state conditions is 100 °C/W.
c. Surface mounted on 1" x 1" FR4 board with minimum copper.
d. Maximum under steady state conditions is 190 °C/W.
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
VDS
VGS = 0 V, ID = - 250 µA
- 20
Typ.
Max.
Unit
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
ΔVDS/TJ
VGS(th) Temperature Coefficient
ΔVGS(th)/TJ
ID = - 250 µA
Gate-Source Threshold Voltage
VGS(th)
VDS = VGS, ID = - 250 µA
Gate-Source Leakage
IGSS
VDS = 0 V, VGS = ± 12 V
Zero Gate Voltage Drain Current
IDSS
a
Drain-Source On-State Resistancea
RDS(on)
a
Forward Transconductance
gfs
mV/°C
3.1
- 0.6
- 1.5
V
± 100
nA
VDS = - 20 V, VGS = 0 V
-1
VDS = - 20 V, VGS = 0 V, TJ = 70 °C
- 10
VDS ≤ - 5 V, VGS = - 4.5 V
ID(on)
On-State Drain Current
V
- 13
- 10
µA
A
VGS = - 4.5 V, ID = - 1 A
0.06
0.073
VGS = - 2.5 V, ID = - 1 A
0.102
0.125
VDS = - 10 V, ID = - 1 A
6
Ω
S
Dynamicb
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
Rg
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
475
VDS = - 10 V, VGS = 0 V, f = 1 MHz
135
pF
110
VDS = - 10 V, VGS = - 10 V, ID = - 1 A
VDS = - 10 V, VGS = - 4.5 V, ID = - 1 A
14
21
6.9
11
1
nC
2.4
VGS = - 0.1 V, f = 1 MHz
td(on)
VDD = - 10 V, RL = 10 Ω
ID ≅ - 1 A, VGEN = - 4.5 V, Rg = 1 Ω
tr
Ω
6
25
50
22
45
25
50
tf
10
20
td(on)
7
15
10
20
td(off)
VDD = - 10 V, RL = 10 Ω
ID ≅ - 1 A, VGEN = - 10 V, Rg = 1 Ω
tr
td(off)
tf
22
45
10
20
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
TA = 25 °C
IS
Pulse Diode Forward Current
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Reverse Recovery Fall Time
ta
Reverse Recovery Rise Time
tb
- 1.5
- 15
IS = - 1 A, VGS = 0 V
IF = - 1 A, dI/dt = 100 A/µs, TJ = 25 °C
A
- 0.8
- 1.2
V
22
40
ns
10
20
nC
8
14
ns
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Document Number: 65930
S10-0643-Rev. A, 22-Mar-10
Si8467DB
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
15
5
V GS = 5 V thru 3.5 V
V GS = 3 V
4
I D - Drain Current (A)
I D - Drain Current (A)
12
9
V GS = 2.5 V
6
3
2
T C = 25 °C
V GS = 2 V
3
1
T C = 125 °C
0
0.0
V GS = 1.5 V
0.5
1.0
1.5
2.0
2.5
T C = - 55 °C
0
0.0
3.0
0.5
V DS - Drain-to-Source Voltage (V)
2.0
2.5
Transfer Characteristics
800
0.16
600
C - Capacitance (pF)
0.20
V GS = 2.5 V
0.12
Ciss
400
Coss
200
0.08
V GS = 4.5 V
Crss
0
0.04
0
3
6
9
12
0
15
4
8
12
16
20
V DS - Drain-to-Source Voltage (V)
ID - Drain Current (A)
Capacitance
On-Resistance vs. Drain Current and Gate Voltage
1.5
10
ID = 1 A
ID = 1 A
1.4
V GS = 4.5 V
8
V DS = 5 V
6
V DS = 10 V
V DS = 16 V
4
1.3
(Normalized)
R DS(on) - On-Resistance
VGS - Gate-to-Source Voltage (V)
1.5
V GS - Gate-to-Source Voltage (V)
Output Characteristics
R DS(on) - On-Resistance (Ω)
1.0
1.2
V GS = 2.5 V
1.1
1.0
0.9
2
0.8
0
0
3
6
9
12
15
0.7
- 50
- 25
0
25
50
75
100
125
Qg - Total Gate Charge (nC)
T J - Junction Temperature (°C)
Gate Charge
On-Resistance vs. Junction Temperature
Document Number: 65930
S10-0643-Rev. A, 22-Mar-10
150
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Si8467DB
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
100
0.20
R DS(on) - On-Resistance (Ω)
I S - Source Current (A)
ID = 1.5 A
T J = 150 °C
10
T J = 25 °C
1
0.1
0.0
0.16
0.12
T J = 125 °C
0.08
T J = 25 °C
0.04
0.00
0.2
0.4
0.6
0.8
1.0
0
1.2
1
2
3
4
5
V GS - Gate-to-Source Voltage (V)
V SD - Source-to-Drain Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
25
1.4
1.3
ID = 250 μA
20
1.2
Power (W)
VGS(th) (V)
1.1
1.0
0.9
15
10
0.8
5
0.7
0.6
- 50
- 25
0
25
50
75
100
125
0
0.001
150
0.01
0.1
1
10
100
1000
Time (s)
T J - Temperature (°C)
Single Pulse Power, Junction-to-Ambient
Threshold Voltage
100
Limited by R DS(on)*
I D - Drain Current (A)
10
100 μs
1
1 ms
10 ms
0.1
100 ms, 1 s
10 s, DC
TA = 25 °C
Single Pulse
BVDSS Limited
0.01
0.1
1
10
100
V DS - Drain-to-Source Voltage (V)
* V GS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Ambient
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Document Number: 65930
S10-0643-Rev. A, 22-Mar-10
Si8467DB
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
4
1.5
1.2
Power Dissipation (W)
I D - Drain Current (A)
3
2
1
0.9
0.6
0.3
0
0.0
0
25
50
75
100
T A - Ambient Temperature (°C)
Current Derating*
125
150
25
50
75
100
125
150
TA - Ambient Temperature (°C)
Power Derating
Note:
When mounted on 1" x 1" FR4 with full copper.
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Document Number: 65930
S10-0643-Rev. A, 22-Mar-10
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Si8467DB
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
Notes:
0.1
0.05
PDM
0.02
t1
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = R thJA = 100 °C/W
3. T JM - TA = PDMZthJA(t)
Single Pulse
4. Surface Mounted
0.01
10 -4
10 -3
10 -2
10 -1
1
100
10
1000
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient (1" x 1" FR4 Board with Full Copper)
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
Notes:
0.1
0.1
PDM
0.05
t1
t2
1. Duty Cycle, D =
0.02
t1
t2
2. Per Unit Base = R thJA = 190 °C/W
3. T JM - TA = PDMZthJA(t)
Single Pulse
4. Surface Mounted
0.01
10 -4
10 -3
10 -2
10 -1
1
Square Wave Pulse Duration (s)
10
100
1000
Normalized Thermal Transient Impedance, Junction-to-Ambient (1" x 1" FR4 Board with Minimum Copper)
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Document Number: 65930
S10-0643-Rev. A, 22-Mar-10
Si8467DB
Vishay Siliconix
PACKAGE OUTLINE
MICRO FOOT: 4-BUMP (2 x 2, 0.5 mm PITCH)
3
1
4
A1 A2
e
2
A
4 x Ø 0.24 to 0.26 Note 4
Solder Mask ~ Ø 0.25
Bump Note 2
Recommended Land
S
S
D
G
e
8467
s
XXX
D
4xØb
s
Mark on Backside of Die
e
D
Notes (Unless otherwise specified):
1. All dimensions are in millimeters.
2. Four (4) solder bumps are lead (Pb)-free 95.5Sn/3.8Ag/0.7Cu with diameter ∅ 0.30 mm to 0.32 mm.
3. Backside surface is coated with a Ti/Ni/Ag layer.
4. Non-solder mask defined copper landing pad.
5. • is location of pin 1.
Dim.
Millimetersa
Inches
Min.
Nom.
Max.
Min.
Nom.
Max.
A
0.462
0.505
0.548
0.0181
0.0198
0.0215
A1
0.220
0.250
0.280
0.0086
0.0098
0.0110
A2
0.242
0.255
0.268
0.0095
0.0100
0.0105
b
0.300
0.310
0.320
0.0118
0.0122
0.0126
e
0.500
0.0197
s
0.230
0.250
0.270
0.0090
0.0098
0.0106
D
0.920
0.960
1.000
0.0362
0.0378
0.0394
Notes:
a. Use millimeters as the primary measurement.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?65930.
Document Number: 65930
S10-0643-Rev. A, 22-Mar-10
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Disclaimer
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Material Category Policy
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.
Revision: 02-Oct-12
1
Document Number: 91000