Voltage Regulator VRG8691/92 7.5 Amp LDO Adjustable Positive Voltage Regulators Released Datasheet Cobham.com/HiRel March 24, 2016 The most important thing we build is trust FEATURES Radiation performance Enable Input - TTL / CMOS Compatible Slow Start capability Stable with multiple ceramic output capacitors Packaging – Hermetic metal - Thru-hole or Surface mount - 12 Leads, 0.900"L x 1.000"W x .205"Ht - Power package - Weight - 18 gm max Designed for aerospace and high reliability space applications - Total dose: 100 krad(Si), Dose rate = 50-300 rad(Si)/s Output voltage adjustable: 1.0V to 3.3V Output current: 7.5A Dropout voltage: 0.5V at 7.5Amps Voltage reference: 1.0V ±0.5% Load regulation: 0.5% max Line regulation: 0.2% max Ripple rejection: >80dB Radiation Hardness Assurance Plan: DLA Certified to MIL-PRF-38534, Appendix G. DESCRIPTION The VRG8691/92 is capable of supplying in excess of 7.5Amps over the output voltage range as defined under recommended operating conditions. The regulator is exceptionally easy to set-up, requiring only 2 external resistors to set the output voltage. The module design has been optimized for excellent regulation and low drop-out voltage. Figures 2 through 5 illustrate setting output voltage, setting current limits and choosing a slow start capacitor. The VRG8691/92 serves a wide variety of applications including local on-card regulation, programmable output voltage regulation or precision current regulation. The VRG8691/92 has been specifically designed to meet exposure to radiation environments. The VRG8691 is configured for a Thru-Hole 12 lead metal power package and the VRG8692 is configured for a Surface Mount 12 lead metal power package. It is guaranteed operational from -55°C to +125°C. Available screened to MIL-STD-883, the VRG8691/92 is ideal for demanding military and space applications. CURRENT LIMIT (ICL) The VRG8691/92 features internal current limiting making them virtually blowout-proof against overloads. The limit is nominally 11.5A @ Vin = 5V (see Table 2), but may be increased or decreased with the addition of one external resistor (see Application Note 2). VIN 1 12 2 11 3 10 VBIAS 4 ENABLE GND VRG8691/92 VOUT 9 VSENSE 5 8 Current Limit 6 7 Slow Start FIGURE 1 – BLOCK DIAGRAM / SCHEMATIC SCD8691 Rev J 1 Cobham Semiconductor Solutions www.cobham.com/HiRel ABSOLUTE MAXIMUM RATINGS PARAMETER RANGE UNITS -55 to +150 °C 300 °C -65 to +150 °C VBIAS, VIN 7 V Thermal Resistance (Junction to case JC) 1 °C/W 25 1/ W Operating (Junction) Temperature Range Lead Temperature (soldering, 10 sec) Storage Temperature Range Power 1/ Based on pass transistor limitations of (VIN - VO) x IO and JC < 1°C/W with 25°C max TJ rise and TC = +125°C. NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; functional operation beyond the “Operation Conditions” is not recommended and extended exposure beyond the “Operation Conditions” may effect device reliability. RECOMMENDED OPERATING CONDITIONS PARAMETER RANGE UNITS 1.0 to 3.3 -55 to +125 VDC °C 0 to 7.5 A VBIAS 3.3 to 5.5 1/ VDC VIN 1.8 to 5.5 2/ VDC Output Voltage Range Case Operating Temperature Range Output Current 1/ VBIAS must maintain a level equal or above VIN but not fall below 3.3V 2/ Depending upon VOUT setting. ELECTRICAL PERFORMANCE CHARACTERISTICS 1/ PARAMETER SYM Reference Voltage VREF VIN = VBIAS = 5V, ENABLE = 0, 0A < IOUT < 7.5A Line Regulation VOUT VIN 2V < VIN < 3V, VOUT = 1.0V, CIN > 47µF, Load Regulation VOUT IOUT 4.3V < VIN < 5.3V, VOUT = 3.3V, COUT > 47µF, 0A < IOUT < 7.5A, CIN > 47µF, COUT > 47µF, f = 120Hz, CLOAD = 47µF, VIN + VRIP > VOUT + VDROP(MAX) @ 5A, VIN = 4.3V, VRIP = 1VP-P, VOUT = 3.3V Ripple Rejection Ratio Dropout Voltage CONDITIONS VDROP @VOUT = 1%, 0A < IOUT < 7.5A MIN MAX UNITS 0.985 1.015 V - 0.2 %/V - 0.5 % 80 - dB - 0.5 V - 100 pA Adjustment Pin Current IADJ Minimum Load Current IMIN - 0 mA Current Limit 2/ ICL 9.5 13.5 A Long Term Stability 3/ VOUT TIME - 1 % Supply Current (VBIAS) IBIAS - 15 mA Notes: 1/ Unless otherwise specified, these specifications apply for post radiation: VBIAS = VIN = 5V, VOUT = 3.3V, IOUT = 7.5A and -55°C < Tc <+125°C, Min Input/Output capacity of 47µF Tant with 1µF ceramic in parallel. 2/ Current Limit is adjustable as shown in Application Note 2, Figures 3 and 4. 3/ Not tested. Shall be guaranteed to the specified limits after 1000hr life test. SCD8691 Rev J 3/24/2016 2 Cobham Semiconductor Solutions www.cobham.com/HiRel APPLICATION NOTE 1 BASIC SET-UP Setting the output voltage (VOUT): 4 VBIAS VBIAS 0.1µF VRG8691/92 1 VIN 2 1µF CER + 47µF 10 VIN VOUT 3 12 TANT CURR. LIMIT 8 ENABLE 1/ 5 VOUT 11 CURR. LIMIT SLOW START 1µF 7 R1 0.1µF ENABLE GND CER + CLOAD 47µF TANT VSENSE 6 9 IADJ VREF (=1V) R2 To set the output voltage for a particular Vout: - Choose an R2 value. (Recommended value = 1k - Then use the following formula to determine the value of R1. R1 = R2 x VOUT - VREF (R2 x IADJ) + VREF , where VREF = 1v, IADJ typ = 10pA Table 1 shows example values for R1 and R2 to achieve some standard voltages. Table 2 shows the nominal current limit settings if the ’CURR. LIMIT’ function (pin 8) is left open. Table 2 2/ Table 1 Example R1 & R2 for typical VOUT VOUT R2 R1 VIN ICL NOM 3.3V 1k 2.3k 5V 11.5A 2.5V 1k 1.5k 3.3V 7.5A 1.8V 1k 800 2.5V 5.7A 1.0V 1k 0 1.8V 4.1A Notes: 1/ ENABLE should be asserted after both VIN and VBIAS are applied. (See Application Note 3, Figure 5 for the configuration where a separate ENABLE control line is NOT required). 2/ ICL varies directly with VIN. (See Application Note 2 for adjusting the Current Limit, ICL). FIGURE 2 –SETTING OUTPUT VOLTAGE SCD8691 Rev J 3/24/2016 3 Cobham Semiconductor Solutions www.cobham.com/HiRel APPLICATION NOTE 2 SETTING THE CURRENT LIMIT To Increase the Current Limit (ICL): 4 VBIAS VBIAS 0.1µF VRG8691/92 1 VIN 2 1µF CER + 47µF VOUT VOUT 11 12 TANT 8 R INC VIN 3 5 ENABLE 10 ENABLE SLOW START 1µF 7 0.1µF CURR. LIMIT GND R1 + CER CLOAD 47µF TANT VSENSE 6 9 IADJ VREF (=1V) R2 - If the ’CURR. LIMIT’ function (pin 8) is left open, the ICL decreases from 11.5 A(NOM) as VIN is decreased from 5V (Table 3). Table 3 VIN RINC ICL NOM 5V Open 11.5 A 3.3V Open 7.5 A 2.5V Open 5.7 A 1.8V Open 4.1 A - To increase the current limit above the nominal setting for any VIN and ICL combination, use the following formula: RINC(K-OHMS) = ( 30 x VIN 30 x ICL - VIN 69 ) - To maintain ICL at the 11.5 A setting, for commonly found VIN voltages, apply RINC value found in Table 4. Table 4 VIN RINC ICL NOM 5V Open 11.5 A 3.3V 56k 11.5 A 2.5V 30k 11.5 A 1.8V 16k 11.5 A FIGURE 3 – INCREASING THE CURRENT LIMIT (ICL) SCD8691 Rev J 3/24/2016 4 Cobham Semiconductor Solutions www.cobham.com/HiRel APPLICATION NOTE 2 (CONTINUED) SETTING THE CURRENT LIMIT To Decrease the Current Limit (ICL): 4 VBIAS VBIAS 0.1µF VIN R DEC CURR. LIMIT ENABLE VRG8691/92 1 1µF + 47µF CER 2 10 VIN VOUT 3 12 TANT 8 5 VOUT 11 CURR. LIMIT SLOW START 1µF 7 0.1µF ENABLE GND R1 CER + CLOAD 47µF TANT VSENSE 6 9 IADJ VREF (=1V) R2 - As shown in Table 3, if the ’CURR. LIMIT’ function (pin 8) is left open, the ICL decreases from 11.5 A(NOM) as VIN is decreased from 5V. - To achieve any ICL, less than nominal, use RDEC which can be calculated using the following formula: RDEC(K-OHMS) = ( 31 x VIN 69 x VIN - ICL 30 ) FIGURE 4 – DECREASING THE CURRENT LIMIT (ICL) SCD8691 Rev J 3/24/2016 5 Cobham Semiconductor Solutions www.cobham.com/HiRel APPLICATION NOTE 3 START UP SEQUENCE Recommended Power Supply Sequencing Options: - OPTION 1: Controlling the ENABLE line with a Digital signal (TTL / CMOS compatible). - Prior to applying power, disable the regulator by setting the ENABLE control line to a HIGH state. - Apply VIN and VBIAS. 1/ - Wait until both VIN and VBIAS supplies have reached their operating levels. - Toggle the ENABLE control line to a LOW state to turn on VOUT of the regulator. - OPTION 2: Controlling the ENABLE line using the CDELAY feature. - Connect a CDELAY capacitor between VBIAS and the ENABLE as shown in Figure 5 below. 2/ - Apply VIN and VBIAS. 1/ - CDELAY causes the regulator to self-enable after VBIAS has reached operating level. NOTE: The ENABLE should always be asserted AFTER VIN and VBIAS have reached operating level. 4 VBIAS VBIAS 0.1µF CDELAY VRG8691/92 1 VIN 2/ 2 + 1/ 1µF + 47µF CER 10 VIN VOUT 3 12 TANT 8 5 VOUT 11 CURR. LIMIT SLOW START 1µF 7 0.1µF ENABLE GND R1 CER + CLOAD 47µF TANT VSENSE 6 9 IADJ VREF (=1V) R2 NOTES: 1/ VIN should be applied before VBIAS if the Slow Start feature is used. 2/ CDELAY capacitor of 10uF is adequate for VBIAS rise times of up to 50ms. FIGURE 5 – DELAYED ENABLE SCD8691 Rev J 3/24/2016 6 Cobham Semiconductor Solutions www.cobham.com/HiRel APPLICATION NOTE 4 VOUT START UP RISE TIME CONTROL Utilizing the Slow Start option: When the VRG8691/92 is first powered up, using the Slow Start function controls the rate at which VOUT rises to the required voltage set by R1 and R2. Note: VIN should be applied before VBIAS when the Slow Start feature is used. 4 VBIAS VBIAS 0.1µF 1µF + 47µF CER 2 10 VIN VOUT 12 TANT 5 0 VOUT 11 3 8 ENABLE VRG8691/92 1 VIN CURR. LIMIT SLOW START 1µF 7 0.1µF R1 ENABLE + GND VSENSE 6 CER + CLOAD 47µF TANT CSS 9 IADJ VREF (=1V) R2 If it is desirable to control the output rise time, a capacitor (CSS) can be asserted on the Slow Start pin to adjust the rise time for the following: A. Large load capacitance will cause high surge currents which will trip the current limit circuitry. The use of CSS will allow the output voltage to rise slowly thus mitigate the surge current phenomenon. VOUT NOM CSS > ICL - ILOAD NOM CLOAD X (0.4 X 0.0014) B. CSS may be used solely to control VOUT RISE TIME (Tr), when CLOAD is not an issue. TR = ( C0.00142.5 ) SS X Note: CSS in Farads and TR in seconds. C. CSS is effective only when VIN is applied prior to VBIAS or ENABLE. FIGURE 6 – SLOW START SCD8691 Rev J 3/24/2016 7 Cobham Semiconductor Solutions www.cobham.com/HiRel PIN NUMBERS vs FUNCTION PIN FUNCTION PIN FUNCTION 1 VIN 7 Slow Start 2 VIN 8 Current Limit 3 VIN 9 VSENSE 4 VBIAS 10 VOUT 5 ENABLE 11 VOUT 6 GROUND 12 VOUT Notes: 1. Dimension Tolerance: ±.005 inches 2. Package contains BeO substrate 3. Case electrically isolated FIGURE 7– PACKAGE OUTLINE — VRG8691 THRU-HOLE POWER PACKAGE SCD8691 Rev J 3/24/2016 8 Cobham Semiconductor Solutions www.cobham.com/HiRel PIN NUMBERS vs FUNCTION PIN FUNCTION PIN FUNCTION 1 VIN 7 Slow Start 2 VIN 8 Current Limit 3 VIN 9 VSENSE 4 VBIAS 10 VOUT 5 ENABLE 11 VOUT 6 GROUND 12 VOUT Notes: 1. Dimension Tolerance: ±.005 inches 2. Package contains BeO substrate 3. Case electrically isolated FIGURE 8– PACKAGE OUTLINE — VRG8692 SURFACE MOUNT POWER PACKAGE SCD8691 Rev J 3/24/2016 9 Cobham Semiconductor Solutions www.cobham.com/HiRel ORDERING INFORMATION MODEL DLA SMD # SCREENING PACKAGE VRG8691 - 7 - Commercial Flow, +25°C testing only VRG8691 - S - Military Temperature, -55°C to +125°C Screened in accordance with the individual Test Methods of MIL-STD-883 for Space Applications VRG8691- 201-1S 5962-0923701KXC VRG8691- 201-2S 5962-0923701KXA VRG8691- 901-1S 5962R0923701KXC VRG8691- 901-2S 5962R0923701KXA In accordance with DLA Certified RHA Program Plan to RHA Level "R", 100 krad(Si) VRG8692 - 7 - Commercial Flow, +25°C testing only VRG8692 - S - Military Temperature, -55°C to +125°C Screened in accordance with the individual Test Methods of MIL-STD-883 for Space Applications VRG8692- 201-1S 5962-0923701KYC VRG8692- 201-2S 5962-0923701KYA VRG8692- 901-1S 5962R0923701KYC VRG8692- 901-2S 5962R0923701KYA SCD8691 Rev J 3/24/2016 In accordance with DLA SMD In accordance with DLA SMD 12 Lead Thru-Hole Power Pkg 12 Lead Surface Mount Power Pkg In accordance with DLA Certified RHA Program Plan to RHA Level "R", 100 krad(Si) 10 Cobham Semiconductor Solutions www.cobham.com/HiRel REVISION HISTORY Date Revision 03/24/2016 J SCD8691 Rev J 3/24/2016 Change Description Import into Cobham format 11 Cobham Semiconductor Solutions www.cobham.com/HiRel Datasheet Definition Advanced Datasheet - Product In Development Preliminary Datasheet - Shipping Prototype Datasheet - Shipping QML & Reduced Hi-Rel EXPORT CONTROL: This product is controlled for export under the Export Administration Regulations (EAR), 15 CFR Parts 730-774. A license from the Department of Commerce may be required prior to the export of this product from the United States. Cobham Semiconductor Solutions 35 S. Service Road Plainview, NY 11803 E: [email protected] T: 800 645 8862 Aeroflex Plainview Inc., DBA Cobham Semiconductor Solutions, reserves the right to make changes to any products and services described herein at any time without notice. Consult Aeroflex or an authorized sales representative to verify that the information in this data sheet is current before using this product. Aeroflex does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by Aeroflex; nor does the purchase, lease, or use of a product or service from Aeroflex convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual rights of Aeroflex or of third parties. SCD8691 Rev J 3/24/2016 12 Cobham Semiconductor Solutions www.cobham.com/HiRel