SIPEX SP514CF

®
SP514
WAN Multi-Mode Serial Transceiver
■ +5V Only
■ Seven (7) Drivers and Seven (7) Receivers
■ Driver and Receiver Tri-State Control
■ Reduced V.35 Termination Network
■ Pin Compatible with the SP504
■ Improved Propagation Delays
■ Software Selectable Interface Modes:
-RS-232E (V.28)
-RS-422A (V.11, X.21)
-RS-449 (V.11 & V.10)
-RS-485
-V.35
-EIA-530 (V.11 & V.10)
-EIA-530A (V.11 & V.10)
-V.36
DESCRIPTION
The SP514 is a single chip devices that supports eight (8) physical serial interface standards
for Wide Area Network connectivity. The product is fabricated using a low power BiCMOS
process technology, and incorporates a Sipex patented (5,306,954) charge pump allowing
+5V only operation. The SP514 is 100% compatible with the SP504 multi-protocol serial
transceiver IC. All applications using the SP504 can also use the SP514. The SP514 has
slightly improved AC performance for its V.35 and V.11 drivers and receivers.
V.35
EIA-530
WAN
Rev. 3/05/04
SP514 Multi–Mode Serial Transceiver
1
© Copyright 2004 Sipex Corporation
ABSOLUTE MAXIMUM RATINGS
STORAGE CONSIDERATIONS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability.
Due to the relatively large package size of the 80-pin
quad flat-pack, storage in a low humidity environment
is preferred. Large high density plastic packages are
moisture sensitive and should be stored in Dry Vapor
Barrier Bags. Prior to usage, the parts should remain
bagged and stored below 40°C and 60%RH. If the
parts are removed from the bag, they should be used
within 48 hours or stored in an environment at or below
20%RH. If the above conditions cannot be followed,
the parts should be baked for four hours at 125°C in
order remove moisture prior to soldering. Sipex ships
the 80-pin QFP in Dry Vapor Barrier Bags with a
humidity indicator card and desiccant pack.The
humidity indicator should be below 30%RH.
VCC............................................................................+7V
Input Voltages:
Logic...............................-0.3V to (VCC+0.5V)
Drivers............................-0.3V to (VCC+0.5V)
Receivers........................................±15.5V
Output Voltages:
Logic................................-0.3V to (VCC+0.5V)
Drivers................................................±15V
Receivers........................-0.3V to (VCC+0.5V)
Storage Temperature..........................-65˚C to +150˚C
Power Dissipation.........................................2000mW
Package Derating:
øJA....................................................46 °C/W
øJC...................................................16 °C/W
SPECIFICATIONS
TA = +25°C and VCC = +4.75V to +5.25V unless otherwise noted.
MIN.
TYP.
MAX.
UNITS
CONDITIONS
0.8
Volts
Volts
0.4
Volts
Volts
IOUT= –3.2mA
IOUT= 1.0mA
+15
+15
+100
Volts
Volts
mA
Ω
per Figure 1
per Figure 2
per Figure 4
per Figure 5
LOGIC INPUTS
VIL
VIH
2.0
LOGIC OUTPUTS
VOL
VOH
2.4
V.28 DRIVER
DC Parameters
Outputs
Open Circuit Voltage
Loaded Voltage
Short-Circuit Current
Power-Off Impedance
AC Parameters
Outputs
Transition Time
Instantaneous Slew Rate
Propagation Delay
tPHL
tPLH
Max.Transmission Rate
+5.0
300
VCC = +5V & TA = +25°C for AC parameters
0.5
0.5
120
1
1
230
1.5
30
µs
V/µs
5
5
µs
µs
kbps
7
+2.0
3.0
kΩ
Volts
Volts
Volts
per Figure 6; +3V to -3V
per Figure 3
V.28 RECEIVER
DC Parameters
Inputs
Input Impedance
Open-Circuit Bias
HIGH Threshold
LOW Threshold
AC Parameters
Propagation Delay
tPHL
tPLH
Rev. 3/05/04
3
0.8
1.7
1.2
per Figure 7
per Figure 8
VCC = +5V & TA = +25°C for AC parameters
50
50
100
100
500
500
ns
ns
SP514 Multi–Mode Serial Transceiver
2
© Copyright 2004 Sipex Corporation
SPECIFICATIONS
TA = +25°C and VCC = +4.75V to +5.25V unless otherwise noted.
MIN.
TYP.
MAX.
UNITS
CONDITIONS
V.28 RECEIVER (continued)
AC Parameters (cont.)
Max.Transmission Rate
120
230
kbps
V.10 DRIVER
DC Parameters
Outputs
Open Circuit Voltage
Test-Terminated Voltage
Short-Circuit Current
Power-Off Current
AC Parameters
Outputs
Transition Time
Propagation Delay
tPHL
tPLH
Max.Transmission Rate
+4.0
0.9VOC
+6.0
+150
+100
Volts
Volts
mA
µA
per Figure 9
per Figure 10
per Figure 11
per Figure 12
VCC = +5V & TA = +25°C for AC parameters
50
50
120
200
200
100
ns
1000
1000
ns
ns
kbps
+3.25
mA
kΩ
Volts
per Figure 13; 10% to 90%
V.10 RECEIVER
DC Parameters
Inputs
Input Current
Input Impedance
Sensitivity
AC Parameters
Propagation Delay
tPHL
tPLH
Max.Transmission Rate
–3.25
4
+0.3
per Figures 14 and 15
VCC = +5V & TA = +25°C for AC parameters
50
50
120
120
120
250
250
ns
ns
kbps
+6.0
Volts
Volts
Volts
Volts
Volts
mA
µA
V.11 DRIVER
DC Parameters
Outputs
Open Circuit Voltage
Test Terminated Voltage
Balance
Offset
Short-Circuit Current
Power-Off Current
AC Parameters
Outputs
Transition Time
Propagation Delay
tPHL
tPLH
Differential Skew
Max.Transmission Rate
+2.0
0.5VOC
0.67VOC
+0.4
+3.0
+150
+100
per Figure 16
per Figure 17
per Figure 17
per Figure 17
per Figure 18
per Figure 19
VCC = +5V & TA = +25°C for AC parameters
50
50
20
40
ns
75
75
20
95
95
40
ns
ns
ns
Mbps
+7
+0.3
Volts
Volts
10
per Figures 21 and 36; 10% to 90%
Using RL = 100Ω and CL = 50pF;
per Figures 32 and 36
per Figures 32 and 36
per Figures 32 and 36
V.11 RECEIVER
DC Parameters
Inputs
Common Mode Range
Sensitivity
Rev. 3/05/04
–7
SP514 Multi–Mode Serial Transceiver
3
© Copyright 2004 Sipex Corporation
SPECIFICATIONS
TA = +25°C and VCC = +4.75V to +5.25V unless otherwise noted.
MIN.
TYP.
MAX.
UNITS
+3.25
+60.75
mA
mA
kΩ
CONDITIONS
V.11 RECEIVER (continued)
DC Parameters (cont.)
Input Current
Current w/ 100Ω Termination
Input Impedance
AC Parameters
Propagation Delay
tPHL
tPLH
Differential Skew
Max. Transmission Rate
–3.25
4
per Figure 20 and 22
per Figure 23 and 24
VCC = +5V & TA = +25°C for AC parameters
60
60
100
100
20
125
125
ns
ns
ns
Mbps
+0.66
+0.6
150
165
Volts
Volts
Ω
Ω
10
Using RL = 100Ω and CL = 50pF;
per Figures 32 and 38
per Figures 32 and 38
per Figure 32
V.35 DRIVER
DC Parameters
Outputs
Test Terminated Voltage
Offset
Source Impedance
Short-Circuit Impedance
AC Parameters
Outputs
Transition Time
Propagation Delay
tPHL
tPLH
Differential Skew
Max.Transmission Rate
+0.44
50
135
per Figure 25
per Figure 26
per Figure 27
per Figure 28
VCC = +5V & TA = +25°C for AC parameters
50
50
30
60
ns
75
75
20
95
95
40
ns
ns
ns
Mbps
10
per Figure 29; 10% to 90%
per Figures 33 and 36
per Figures 33 and 36
per Figures 33 and 36
V.35 RECEIVER
DC Parameters
Inputs
Sensitivity
Source Impedance
Short-Circuit Impedance
AC Parameters
Propagation Delay
tPHL
tPLH
Differential Skew
Max. Transmission Rate
80
90
135
110
165
mV
Ω
Ω
per Figure 30
per Figure 31
VCC = +5V & TA = +25°C for AC parameters
60
60
115
115
20
125
125
ns
ns
ns
Mbps
5.00
30
130
280
250
180
5.25
Volts
mA
mA
mA
mA
mA
10
per Figures 33 and 38
per Figures 33 and 38
per Figure 33
POWER REQUIREMENTS
VCC
ICC
4.75
(No Mode Selected)
(V.28/RS-232)
(V.11/RS-422)
(EIA-530 & RS-449)
(V.35)
All ICC values are with VCC = +5V
fIN = 120kbps; Drivers active & loaded.
fIN = 2.1Mbps; Drivers active & loaded.
fIN = 2.1Mbps; Drivers active & loaded.
V.35 @ fIN = 2.1Mbps, V.28 @ 20kbps;
Drivers active & loaded.
ENVIRONMENTAL AND MECHANICAL
Operating Temperature Range
Storage Temperature Range
Rev. 3/05/04
0
–65
+70
+150
°C
°C
SP514 Multi–Mode Serial Transceiver
4
© Copyright 2004 Sipex Corporation
OTHER AC CHARACTERISTICS
TA = +25°C and VCC = +5.0V unless otherwise noted.
PARAMETER
MIN.
TYP.
MAX.
UNITS
DRIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE
RS-232/V.28 MODE
tPZL; Tri-state to Output LOW
0.70
5.0
µs
tPZH; Tri-state to Output HIGH
0.40
2.0
µs
tPLZ; Output LOW to Tri-state
0.20
2.0
µs
tPHZ; Output HIGH to Tri-state
0.40
2.0
µs
RS-423/V.10 MODE
tPZL; Tri-state to Output LOW
0.15
2.0
µs
tPZH; Tri-state to Output HIGH
0.20
2.0
µs
tPLZ; Output LOW to Tri-state
0.20
2.0
µs
tPHZ; Output HIGH to Tri-state
0.15
2.0
µs
RS-422/V.11 MODE
tPZL; Tri-state to Output LOW
2.80
10.0
µs
tPZH; Tri-state to Output HIGH
0.10
2.0
µs
tPLZ; Output LOW to Tri-state
0.10
2.0
µs
tPHZ; Output HIGH to Tri-state
0.10
2.0
µs
V.35 MODE
tPZL; Tri-state to Output LOW
2.60
10.0
µs
tPZH; Tri-state to Output HIGH
0.10
2.0
µs
tPLZ; Output LOW to Tri-state
0.10
2.0
µs
tPHZ; Output HIGH to Tri-state
0.15
2.0
µs
CONDITIONS
CL = 100pF, Fig. 34 ; S1 closed
CL = 100pF, Fig. 34 ; S2 closed
CL = 100pF, Fig. 34 ; S1 closed
CL = 100pF, Fig. 34 ; S2 closed
CL = 100pF, Fig. 34 ; S1 closed
CL = 100pF, Fig. 34 ; S2 closed
CL = 100pF, Fig. 34 ; S1 closed
CL = 100pF, Fig. 34 ; S2 closed
CL = 100pF, Fig. 34 & 37; S1 closed
CL = 100pF, Fig. 34 & 37; S2 closed
CL = 15pF, Fig. 34 & 37; S1 closed
CL = 15pF, Fig. 34 & 37; S2 closed
CL = 100pF, Fig. 34 & 37; S1 closed
CL = 100pF, Fig. 34 & 37; S2 closed
CL = 15pF, Fig. 34 & 37; S1 closed
CL = 15pF, Fig. 34 & 37; S2 closed
RECEIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE
RS-232 MODE
tPZL; Tri-state to Output LOW
0.12
2.0
µs
CL = 100pF, Fig. 35 ; S1 closed
tPZH; Tri-state to Output HIGH
0.10
2.0
µs
CL = 100pF, Fig. 35 ; S2 closed
tPLZ; Output LOW to Tri-state
0.10
2.0
µs
CL = 100pF, Fig. 35 ; S1 closed
tPHZ; Output HIGH to Tri-state
0.10
2.0
µs
CL = 100pF, Fig. 35 ; S2 closed
RS-423 MODE
tPZL; Tri-state to Output LOW
0.10
2.0
µs
CL = 100pF, Fig. 35 ; S1 closed
tPZH; Tri-state to Output HIGH
0.10
2.0
µs
CL = 100pF, Fig. 35 ; S2 closed
tPLZ; Output LOW to Tri-state
0.10
2.0
µs
CL = 100pF, Fig. 35 ; S1 closed
tPHZ; Output HIGH to Tri-state
0.10
2.0
µs
CL = 100pF, Fig. 35 ; S2 closed
RS-422/RS-485 MODES
tPZL; Tri-state to Output LOW
0.10
2.0
µs
CL = 100pF, Fig. 35 & 39; S1 closed
tPZH; Tri-state to Output HIGH
0.10
2.0
µs
CL = 100pF, Fig. 35 & 39; S2 closed
tPLZ; Output LOW to Tri-state
0.10
2.0
µs
CL = 15pF, Fig. 35 & 39; S1 closed
tPHZ; Output HIGH to Tri-state
0.10
2.0
µs
CL = 15pF, Fig. 35 & 39; S2 closed
V.35 MODE
tPZL; Tri-state to Output LOW
0.10
2.0
µs
CL = 100pF, Fig. 35 & 39; S1 closed
tPZH; Tri-state to Output HIGH
0.10
2.0
µs
CL = 100pF, Fig. 35 & 39; S2 closed
tPLZ; Output LOW to Tri-state
0.10
2.0
µs
CL = 15pF, Fig. 35 & 39; S1 closed
tPHZ; Output HIGH to Tri-state
0.10
2.0
µs
CL = 15pF, Fig. 35 & 39; S2 closed
Rev. 3/05/04
SP514 Multi–Mode Serial Transceiver
5
© Copyright 2004 Sipex Corporation
OTHER AC CHARACTERISTICS (Continued)
TA = +25°C and VCC = +5.0V unless otherwise noted.
TRANSCEIVER TO TRANSCEIVER SKEW
RS-232 Driver
100
100
RS-232 Receiver
20
20
RS-422 Driver
2
2
RS-422 Receiver
3
RS-423 Driver
RS-423 Receiver
V.35 Driver
V.35 Receiver
Rev. 3/05/04
(PER FIGURES 32, 33, 36, 38)
ns
[ (tphl )Tx1 – (tphl )Tx6,7 ]
ns
[ (tplh )Tx1 – (tplh )Tx6,7 ]
ns
[ (tphl )Rx1 – (tphl )Rx2,7 ]
ns
[ (tphl )Rx1 – (tphl )Rx2,7 ]
ns
[ (tphl )Tx1 – (tphl )Tx6,7 ]
ns
[ (tplh )Tx1 – (tplh )Tx6,7 ]
ns
[ (tphl )Rx1 – (tphl )Rx2,7 ]
3
5
5
5
5
4
4
6
6
ns
ns
ns
ns
ns
ns
ns
ns
ns
SP514 Multi–Mode Serial Transceiver
6
[ (tphl )Rx1 – (tphl )Rx2,7 ]
[ (tphl )Tx2 – (tphl )Tx3,4,5 ]
[ (tplh )Tx2 – (tplh )Tx3,4,5 ]
[ (tphl )Rx2 – (tphl )Rx3,4,5 ]
[ (tphl )Rx2 – (tphl )Rx3,4,5 ]
[ (tphl )Tx1 – (tphl )Tx6,7 ]
[ (tplh )Tx1 – (tplh )Tx6,7 ]
[ (tphl )Rx1 – (tphl )Rx2,7 ]
[ (tphl )Rx1 – (tphl )Rx2,7 ]
© Copyright 2004 Sipex Corporation
TEST CIRCUITS...
A
A
VOC
VT
3kΩ
C
C
Figure 1. V.28 Driver Output Open Circuit Voltage
Figure 2. V.28 Driver Output Loaded Voltage
A
A
VT
7kΩ
Isc
Oscilloscope
C
C
Scope used for slew rate
measurement.
Figure 3. V.28 Driver Output Slew Rate
Figure 4. V.28 Driver Output Short-Circuit Current
VCC = 0V
A
A
Ix
3kΩ
2500pF
Oscilloscope
±2V
C
C
Figure 6. Driver Output Rise/Fall Times
Figure 5. V.28 Driver Output Power-Off Impedance
Rev. 3/05/04
SP514 Multi–Mode Serial Transceiver
7
© Copyright 2004 Sipex Corporation
A
A
Iia
±15V
Voc
C
C
Figure 7. V.28 Receiver Input Impedance
Figure 8. V.28 Receiver Input Open Circuit Bias
A
A
3.9kΩ
Vt
450Ω
VOC
C
C
Figure 9. V.10 Driver Output Open-Circuit Voltage
Figure 10. V.10 Driver Output Test Terminated Voltage
VCC = 0V
A
A
Ix
±0.25V
Isc
C
C
Figure 11. V.10 Driver Output Short-Circuit Current
Rev. 3/05/04
Figure 12. V.10 Driver Output Power-Off Current
SP514 Multi–Mode Serial Transceiver
8
© Copyright 2004 Sipex Corporation
A
A
Iia
±10V
Oscilloscope
450Ω
C
C
Figure 13. V.10 Driver Output Transition Time
Figure 14. V.10 Receiver Input Current
V.10 RECEIVER
A
+3.25mA
VOCA
3.9kΩ
–10V
VOC
VOCB
–3V
B
+3V
+10V
Maximum Input Current
versus Voltage
C
–3.25mA
Figure 15. V.10 Receiver Input IV Graph
Figure 16. V.11 Driver Output Open-Circuit Voltage
A
Isa
A
50Ω
VT
50Ω
Isb
B
B
VOS
C
C
Figure 17. V.11 Driver Output Test Terminated Voltage
Rev. 3/05/04
Figure 18. V.11 Driver Output Short-Circuit Current
SP514 Multi–Mode Serial Transceiver
9
© Copyright 2004 Sipex Corporation
VCC = 0V
A
Iia
A
Ixa
±10V
±0.25V
B
B
C
C
VCC = 0V
A
A
±0.25V
±10V
Ixb
Iib
B
B
C
C
Figure 19. V.11 Driver Output Power-Off Current
Figure 20. V.11 Receiver Input Current
V.11 RECEIVER
+3.25mA
A
50Ω
Oscilloscope
50Ω
B
–10V
50Ω
–3V
VE
+3V
C
+10V
Maximum Input Current
versus Voltage
–3.25mA
Figure 21. V.11 Driver Output Rise/Fall Time
Rev. 3/05/04
Figure 22. V.11 Receiver Input IV Graph
SP514 Multi–Mode Serial Transceiver
10
© Copyright 2004 Sipex Corporation
V.11 RECEIVER
w/ Optional Cable Termination
(100Ω to 150Ω)
i [mA] = V [V] / 0.1
A
Iia
i [mA] = (V [V] – 3) / 4.0
±6V
100Ω to
150Ω
–6V
–3V
+3V
B
+6V
i [mA] = (V [V] – 3) / 4.0
C
Maximum Input Current
versus Voltage
i [mA] = V [V] / 0.1
Figure 24. V.11 Receiver Input Graph w/ Termination
A
A
±6V
50Ω
100Ω to
150Ω
VT
50Ω
Iib
B
VOS
B
C
C
Figure 23. V.11 Receiver Input Current w/ Termination
Figure 25. V.35 Driver Output Test Terminated Voltage
V1
A
A
50Ω
24kHz, 550mVp-p
Sine Wave
50Ω
V2
VT
50Ω
B
VOS
B
C
C
Figure 26. V.35 Driver Output Offset Voltage
Rev. 3/05/04
Figure 27. V.35 Driver Output Source Impedance
SP514 Multi–Mode Serial Transceiver
11
© Copyright 2004 Sipex Corporation
A
A
50Ω
Oscilloscope
50Ω
ISC
B
B
50Ω
±2V
C
C
Figure 29. V.35 Driver Output Rise/Fall Time
Figure 28. V.35 Driver Output Short-Circuit Impedance
V1
A
A
50Ω
24kHz, 550mVp-p
Sine Wave
V2
Isc
B
B
±2V
C
C
Figure 30. V.35 Receiver Input Source Impedance
CL1
DI
A
RL
Figure 31. V.35 Receiver Input Short-Circuit Impedance
DI
A
RO
B
B
CL2
A
B
B
RO
15pF
15pF
Figure 33. Timing Test Ckt. (V.35 mode only for SP514)
Figure 32. Driver/Receiver Timing Test Circuit
Rev. 3/05/04
A
SP514 Multi–Mode Serial Transceiver
12
© Copyright 2004 Sipex Corporation
Output
Under
Test
500Ω
1KΩ
S2
S2
Figure 34. Driver Timing Test Load Circuit
Figure 35. Receiver Timing Test Load Circuit
f ≥ 5MHz; tR ≤ 10ns; tF ≤ 10ns
+3V
1.5V
DRIVER INPUT
1.5V
0V
A
DRIVER
OUTPUT
VCC
S1
CRL
CL
1KΩ
Test Point
Receiver
Output
VCC
S1
tPLH
tPHL
VO 1/2VO
1/2VO
B
DIFFERENTIAL VO+
OUTPUT 0V
VA – VB VO–
tSKEW
tSKEW
tF
tR
Figure 36. Driver Propagation Delays
TXENABLE +3V
f = 1MHz; tR ≤ 10ns; tF ≤ 10ns
1.5V
DECX
0V
1.5V
tZL
tLZ
5V
2.3V
A, B
VOL
VOH
A, B
2.3V
0V
Output normally LOW
0.5V
Output normally HIGH
0.5V
tZH
tHZ
Figure 37. Driver Enable and Disable Times
Note: Figure 36 shown above is corrected from Figure 5 in SP504 Datasheet. Figure 5 in the SP504 Datasheet is incorrect where A and B are
reversed and the VA –VB output should be inverted.
Rev. 3/05/04
SP514 Multi–Mode Serial Transceiver
13
© Copyright 2004 Sipex Corporation
f = 1MHz; tR ≤ 10ns; tF ≤ 10ns
VOD2+
0V
A–B
VOD2–
VOH
RECEIVER OUT
VOL
0V
INPUT
1.5V
1.5V
OUTPUT
tPHL
tPLH
Figure 38. Receiver Propagation Delays
+3V
RDECX
0V
5V
RECEIVER OUT
VIL
1.5V
f = 1MHz; tR < 10ns; tF < 10ns
tZL
1.5V
1.5V
tLZ
Output normally LOW
0.5V
Output normally HIGH
0.5V
VIH
RECEIVER OUT
0V
1.5V
tZH
tHZ
Figure 39. Receiver Enable and Disable Times
Note: Figure 38 shown above is corrected from Figure 7 in the original SP504 Datasheet. Figure 7 in the original SP504 Datasheet is incorrect where
the RECEIVER OUTPUT should be inverted.
Rev. 3/05/04
SP514 Multi–Mode Serial Transceiver
14
© Copyright 2004 Sipex Corporation
Pin 61 — SD(a) — Analog Out — Send data,
inverted; sourced from TxD.
Pin 63 — TT(a) — Analog Out — Terminal
Timing, inverted; sourced from TxC
61 SD(a)
62 VCC
63 TT(a)
64 GND
65 TT(b)
66 CS(a)
67 CS(b)
68 DM(a)
69 DM(b)
70 RD(a)
71 RD(b)
72 GND
73 VCC
74 VCC
75 GND
76 SCT(a)
77 SCT(b)
78 DSR
79 SCT
80 CTS
PINOUT…
RxD 1
Pin 65 — TT(b) — Analog Out — Terminal
Timing, non–inverted; sourced from TxC.
60 GND
RDEC0 2
59 SD(b)
RDEC1 3
58 TR(a)
RDEC2 4
57 GND
RDEC3 5
56 TR(b)
Pin 70 — RD(a) — Receive Data, analog input;
inverted; source for RxD.
55 VCC
TTEN 6
SCTEN 7
54 RS(a)
53 GND
N/C 8
TDEC3 9
TDEC2 10
TDEC1 11
TDEC0 12
DTR 13
TxD 14
SP504
52 RS(b)
SP514
49 LL(b)
50 GND
48 VCC
47 RL(a)
Pin 76 — SCT(a) — Serial Clock Transmit;
analog input, inverted; source for SCT.
Pin 77 — SCT(b) — Serial Clock Transmit:
analog input, non–inverted; source for SCT
IC(b) 40
IC(a) 39
RT(b) 38
RT(a) 37
RR(b) 36
RR(a) 35
GND 34
VCC 33
41 VCC
VSS 32
42 ST(a)
RxC 20
GND 29
C1– 30
C2– 31
DCD 19
VDD 27
C2+ 28
43 GND
VCC 25
C1+ 26
44 ST(b)
LL 24
45 RL(b)
V35_STAT 18
RI 21
46 GND
RL 17
ST 22
TxC 15
RTS 16
STEN 23
Pin 71 — RD(b) — Receive Data; analog input;
non-inverted; source for RxD.
51 LL(a)
Pin 79 — SCT — Serial Clock Transmit; TTL
output; sources from SCT(a) and SCT(b) inputs.
CONTROL LINE GROUP
Pin 13 — DTR — Data Terminal Ready; TTL
input; source for TR(a) and TR(b) outputs.
PIN ASSIGNMENTS…
CLOCK AND DATA GROUP
Pin 1 — RxD — Receive Data; TTL output,
sourced from RD(a) and RD(b) inputs.
Pin 16 — RTS — Ready To Send; TTL input;
source for RS(a) and RS(b) outputs.
Pin 14 — TxD — TTL input ; transmit data
source for SD(a) and SD(b) outputs.
Pin 17 — RL — Remote Loopback; TTL input;
source for RL(a) and RL(b) outputs.
Pin 15 — TxC — Transmit Clock; TTL input for
TT driver outputs.
Pin 18 — V35_STAT — V.35 Status; TTL
output; outputs logic high when in V.35 mode.
Pin 20 — RxC — Receive Clock; TTL output
sourced from RT(a) and RT(b) inputs.
Pin 19 — DCD— Data Carrier Detect; TTL
output; sourced from RR(a) and RR(b) inputs.
Pin 22 — ST — Send Timing; TTL input; source
for ST(a) and ST(b) outputs.
Pin 21 — RI — Ring Indicate; TTL output;
sourced from IC(a) and IC(b) inputs.
Pin 37 — RT(a) — Receive Timing; analog
input, inverted; source for RxC.
Pin 24 — LL — Local Loopback; TTL input;
source for LL(a) and LL(b) outputs.
Pin 38 — RT(b) — Receive Timing; analog
input, non-inverted; source for RxC.
Pin 35 — RR(a)— Receiver Ready; analog
input, inverted; source for DCD.
Pin 42 — ST(a) — Send Timing; analog output,
inverted; sourced from ST.
Pin 36 — RR(b)— Receiver Ready; analog
input, non-inverted; source for DCD.
Pin 44 — ST(b) — Send Timing; analog output,
non-inverted; sourced from ST.
Pin 39 — IC(a)— Incoming Call; analog input,
inverted; source for RI.
Pin 59 — SD(b) — Analog Out — Send data,
non-inverted; sourced from TxD.
Rev. 3/05/04
SP514 Multi–Mode Serial Transceiver
15
© Copyright 2004 Sipex Corporation
Pins 12–9 — TDEC0 – TDEC3 — Transmitter
decode register; configures transmitter modes;
TTL inputs.
Pin 40 — IC(b)— Incoming Call; analog
input,non-inverted; source for RI.
Pin 45 — RL(b) — Remote Loopback; analog
output, non-inverted; sourced from RL.
Pin 23 — STEN — Enables ST driver; active
low; TTL input.
Pin 47 — RL(a) — Remote Loopback; analog
output inverted; sourced from RL.
POWER SUPPLIES
Pins 25, 33, 41, 48, 55, 62, 73, 74 — VCC — +5V
input.
Pin 49— LL(b) — Local Loopback; analog
output, non-inverted; sourced from LL.
Pin 51 — LL(a) — Local Loopback; analog
output, inverted; sourced from LL.
Pins 29, 34, 43, 46, 50, 53, 57, 60, 64, 72, 75 —
GND — Ground.
Pin 52 — RS(b) — Ready To Send; analog
output, non-inverted; sourced from RTS.
Pin 27 — VDD +10V Charge Pump Capacitor —
Connects from VDD to VCC. Suggested capacitor size is 22µF, 16V.
Pin 54 — RS(a) — Ready To Send; analog
output, inverted; sourced from RTS.
Pin 32 — VSS –10V Charge Pump Capacitor —
Connects from ground to VSS. Suggested capacitor size is 22µF, 16V.
Pin 56 — TR(b) — Terminal Ready; analog
output, non-inverted; sourced from DTR.
Pin 58 — TR(a) — Terminal Ready; analog
output, inverted; sourced from DTR.
Pins 26 and 30 — C1+ and C1– — Charge Pump
Capacitor — Connects from C1+ to C1–. Suggested capacitor size is 22µF, 16V.
Pin 66 — CS(a)— Clear To Send; analog input,
inverted; source for CTS.
Pins 28 and 31 — C2+ and C2– — Charge Pump
Capacitor — Connects from C2+ to C2–. Suggested capacitor size is 22µF, 16V.
Pin 67 — CS(b)— Clear To Send; analog input,
non-inverted; source for CTS.
Pin 68 — DM(a)— Data Mode; analog input,
inverted; source for DSR.
NOTE: NC pins should be left floating; internal
signals may be present.
Pin 69 — DM(b)— Data Mode; analog input,
non-inverted; source for DSR
Pin 78 — DSR— Data Set Ready; TTL output;
sourced from DM(a), DM(b) inputs.
Pin 80 — CTS— Clear To Send; TTL output;
sourced from CS(a) and CS(b) inputs.
CONTROL REGISTERS
Pins 2–5 — RDEC0 – RDEC3 — Receiver
decode register; configures receiver modes; TTL
inputs.
Pin 6 — TTEN — Enables TT driver, active
low; TTL input.
Pin 7 — SCTEN — Enables SCT receiver;
active high; TTL input.
Rev. 3/05/04
SP514 Multi–Mode Serial Transceiver
16
© Copyright 2004 Sipex Corporation
SP514
ModeSelection
Selection
SP504 Driver
Driver Mode
Pin Label
Mode:
RS232
V.35
RS422
RS485
RS449
EIA530
EIA-530A
TDEC 3–TDEC0
0000
0010
1110
0100
0101
1100
1101
1111
0110
SD(a)
tri-state
V.28
V.35–
V.11–
RS485–
V.11–
V.11–
V.11–
V.11–
SD(b)
tri-state
tri-state
V.35+
V.11+
RS485+
V.11+
V.11+
V.11+
V.11+
TR(a)
tri-state
V.28
V.28
V.11–
RS485–
V.11–
V.11–
V.10
V.10
TR(b)
tri-state
tri-state
tri-state
V.11+
RS485+
V.11+
V.11+
tri-state
tri-state
V.36
RS(a)
tri-state
V.28
V.28
V.11–
RS485–
V.11–
V.11–
V.11–
V.10
RS(b)
tri-state
tri-state
tri-state
V.11+
RS485+
V.11+
V.11+
V.11+
tri-state
RL(a)
tri-state
V.28
V.28
V.11–
RS485–
V.10
V.11–
V.10
RL(b)
tri-state
tri-state
tri-state
V.11+
RS485+
V.11+
tri-state
V.10
tri-state
tri-state
LL(a)
tri-state
V.28
V.28
V.11–
RS485–
V.10
V.10
V.10
V.10
LL(b)
tri-state
tri-state
tri-state
V.11+
RS485+
tri-state
tri-state
tri-state
tri-state
ST(a)
tri-state
V.28
V.35–
V.11–
RS485–
V.11–
V.11–
V.11–
V.11–
ST(b)
tri-state
tri-state
V.35+
V.11+
RS485+
V.11+
V.11+
V.11+
V.11+
TT(a)
tri-state
V.28
V.35–
V.11–
RS485–
V.11–
V.11–
V.11–
V.11–
TT(b)
tri-state
tri-state
V.35+
V.11+
RS485+
V.11+
V.11+
V.11+
V.11+
SP514
ModeSelection
Selection
SP504Receiver
Receiver Mode
Mode:
RS232
V.35
RS422
RS485
RS449
EIA530
EIA-530A
V.36
0000
0010
1110
0100
0101
1100
1101
1111
0110
RD(a)
>12kΩ to GND
V.28
RD(b)
>12kΩ to GND >12kΩ to GND
RT(a)
>12kΩ to GND
RT(b)
>12kΩ to GND >12kΩ to GND
CS(a)
>12kΩ to GND
CS(b)
>12kΩ to GND >12kΩ to GND >12kΩ to GND
DM(a)
>12kΩ to GND
DM(b)
>12kΩ to GND >12kΩ to GND >12kΩ to GND
RR(a)
>12kΩ to GND
RR(b)
>12kΩ to GND >12kΩ to GND >12kΩ to GND
IC(a)
>12kΩ to GND
IC(b)
>12kΩ to GND >12kΩ to GND
Pin Label
RDEC3–RDEC 0
V.28
V.28
V.28
V.28
V.28
SCT(a)
>12kΩ to GND
SCT(b)
>12kΩ to GND >12kΩ to GND
Rev. 3/05/04
V.28
V.35–
V.11–
RS485–
V.11–
V.11–
V.11–
V.11–
V.35+
V.11+
RS485+
V.11+
V.11+
V.11+
V.11+
V.35–
V.11–
RS485–
V.11–
V.11–
V.11–
V.11–
V.35+
V.11+
RS485+
V.11+
V.11+
V.11+
V.11+
V.28
V.11–
RS485–
V.11–
V.11–
V.11–
V.11+
RS485+
V.11+
V.11+
V.11+
>12kΩ to GND
V.11–
RS485–
V.11–
V.11–
V.10
V.10
V.11+
RS485+
V.11+
V.11+
V.11–
RS485–
V.11–
V.11–
V.11–
V.10
V.11+
RS485+
V.11+
V.11+
V.11+
>12kΩ to GND
V.28
V.28
V.10
>12kΩ to GND >12kΩ to GND
V.28
V.11–
RS485–
V.10
V.10
V.10
V.10
>12kΩ to GND
V.11+
RS485+
>12kΩ to GND
>12kΩ to GND
>12kΩ to GND
>12kΩ to GND
V.35–
V.11–
RS485–
V.11–
V.11–
V.11–
V.11–
V.35+
V.11+
RS485+
V.11+
V.11+
V.11+
V.11+
SP514 Multi–Mode Serial Transceiver
17
© Copyright 2004 Sipex Corporation
1N5819
22µF
22µF
22µF
+5V
27
25
10µF
VCC
26
31
30 28
VDD C1+
C1- C2+
Charge Pump
C2VSS
22µF
32
B
A
14 TxD
RD(a) 70
61 SD(a)
RxD 1
59 SD(b)
RD(b) 71
RT(a) 37
150Ω
13 DTR
①
58 TR(a)
RxC 20
56 TR(b)
RT(b) 38
CS(a) 66
16 RTS
54 RS(a)
CTS 80
52 RS(b)
CS(b) 67
17 RL
DM(a) 68
47 RL(a)
DSR 78
45 RL(b)
DM (b) 69
24 LL
RR(a) 35
51 LL(a)
DCD 19
A — Receiver Tri-State circuitry & V.35
termination resistor circuitry for
RxD, RxC & SCT.
B — Driver Tri-State circuitry & V.35
termination circuitry for TxD,
TxC & ST.
49 LL(b)
RR(b) 36
22 ST
IC(a) 39
42 ST(a)
RI 21
44 ST(b)
IC(b) 40
23 STEN
①
SCT(a) 76
15 TxC
SCT 79
63 TT(a)
65 TT(b)
SCTEN 7
SCT(b) 77
6
TTEN
150Ω
RDEC
X
External
Latch
TDEC
5
4
3
2
9
10
11
12
X
①
RS-422 Mode
Input Word
0
1
0
0
0
1
0
0
150Ω
SP514
SP504
(SEE PAGE 12 FOR GROUND PINS)
① ☛ For V.35 Termination, needs to be connected
for proper V.35 operation. A low onresistance (≤1Ω) FET or switch can be used
to connect and disconnect the resistor from
the non-inverting output.
Figure 40. SP514 Typical Operating Circuit
Rev. 3/05/04
SP514 Multi–Mode Serial Transceiver
18
© Copyright 2004 Sipex Corporation
PACKAGE: 80 Pin LQFP
D
D1
0.2 RAD MAX.
c
0.08 RAD MIN.
PIN 1
11° - 13°
0° Min
E1
CL
E
0°–7°
11° - 13°
L
L1
CL
A2
A
b
DIMENSIONS
Minimum/Maximum
(mm)
SYMBOL
A1
e
80-PIN LQFP
JEDEC MS-026
(BEC) Variation
MIN
NOM
Seating
Plane
COMMON DIMENTIONS
MAX
SYMBL MIN
1.60
A
c
0.11
0.45
A1
0.05
0.15
L
A2
1.35
1.40
1.45
L1
b
0.22
0.32
0.38
D
16.00 BSC
D1
14.00 BSC
e
0.65 BSC
E
16.00 BSC
E1
14.00 BSC
N
80
NOM
MAX
23.00
0.60
0.75
1.00 BASIC
80 PIN LQFP
Rev. 3/05/04
SP514 Multi–Mode Serial Transceiver
19
© Copyright 2004 Sipex Corporation
ORDERING INFORMATION
Model
Temperature Range
Package Types
SP514CF ........................................................................... 0°C to +70°C ....................................................... 80–pin JEDEC (BE-2 Outline) LQFP
REVISION HISTORY
DATE
3/05/04
REVISION
A
DESCRIPTION
Implemented tracking revision.
Corporation
ANALOG EXCELLENCE
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-8700
FAX: (408) 946-9001
Sales Office
22 Linnell Circle
Billerica, MA 01821
TEL: (978) 667-8700
FAX: (978) 670-9001
e-mail: [email protected]
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.
Rev. 3/05/04
SP514 Multi–Mode Serial Transceiver
20
© Copyright 2004 Sipex Corporation