DEMO MANUAL DC2191A RF Transmitter Using LTC2000 16-Bit, 2.5Gsps to 2.7Gsps DAC DESCRIPTION Demonstration circuit 2191A supports the LTC®2000, a high speed, high dynamic range DAC driving the LT5579 upconverting mixer. The circuitry on the DAC IF output is optimized for analog frequencies from DC to 500MHz. The circuitry on the LO input is optimized for frequencies from 1000MHz to 4300MHz. PERFORMANCE SUMMARY The circuitry on the RF output is optimized for frequencies from 2200MHz to 2600MHz. Design files for this circuit board are available at http://www.linear.com/demo/DC2191 L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Specifications are at TA = 25°C PARAMETER CONDITIONS Supply Voltage – DC2191 This supply must provide up to 1100mA Sampling Frequency (Sample Clock Frequency)* Sample Clock Level (Single-Ended) Use a 50Ω Source LVDS Inputs Differential Input Voltage Range Common Mode Voltage Range LO Input Frequency Range MIN TYP 4.8 5.0 MAX 5.2 UNITS V 300 2500 or 2700 MHz 0 15 dBm ±0.2 0.4 ±0.6 1.8 V V 750 4300 MHz *DC2191A-A Features the LTC2000-16, 16-Bit, 2.5Gsps DAC dc2191afa 1 DEMO MANUAL DC2191A QUICK START PROCEDURE DC2191 is easy to set up to evaluate the performance of the LTC2000 + LT5579. Refer to Figure 1 for proper measurement equipment set-up and follow the procedure below. installed in flash memory and will begin to operate when the board is powered on. If an unprogrammed FPGA board is used, refer to the Stratix IV GX Development Board Reference Manual on how to program it. SOFTWARE Power should be applied to the system in this order: The software for the DC2191, LTDACGen is available at www.linear.com/LTDACGEN free of charge. It simplifies the creation of complex waveforms and loading them into the FPGA to test the DC2191. For more information about how to use the LTDACGen software, refer to the help files that come with the software. 1. Connect the Altera board to the provided power supply. 2. Connect the USB cable to J7. 3. Apply a clock to J4. 4. Connect an LO source to J6. 5. Turn on the voltage to the Altera board. APPLYING POWER AND SIGNALS TO THE DC2191 DEMONSTRATION CIRCUIT 6. Connect the 5V from a bench supply to the +5V turret on the DC2191. If a Stratix IV demo board is used to supply data to the DC2191, the two boards should first be bolted together and a proper connection should be made. If Linear Technology provided the Stratix IV board the proper bit file is already 7. Open the LTDACGen software and hit connect. 2 LTDACGen should report back that it is connected to the FPGA. See Figure 2: dc2191afa DEMO MANUAL DC2191A QUICK START PROCEDURE 5V + SINGLE-ENDED SAMPLE CLOCK INPUT RF OUTPUT LO INPUT JUMPERS SHOWN IN THEIR DEFAULT POSITIONS THE DC2191 CONNECTS TO THE ALTERA STRATIX IV GX FPGA DEVELOPMENT BOARD VIA HSMC CONNECTORS CONNECT USB TO PC RUNNING LTDACGen SOFTWARE Figure 1. DC2191 Setup (zoom for details) dc2191afa 3 DEMO MANUAL DC2191A QUICK START PROCEDURE Figure 2. LTDACGen Connected to FPGA 4 dc2191afa DEMO MANUAL DC2191A QUICK START PROCEDURE Figure 3. Default Frequency dc2191afa 5 DEMO MANUAL DC2191A QUICK START PROCEDURE ANALOG OUTPUT NETWORK The analog output network of the DC2191 has been designed to maximize the performance of the LTC2000. The LTC2000 drives a chebyshev lowpass filter with a corner at 500MHz. SAMPLE CLOCK The sample clock to the DC2191 demonstration circuit board is marked J4. As a default it is a single-ended 50Ω input port. There is an onboard balun that does a singleended to differential translation. For the best noise performance, the sample input must be driven with a very low jitter signal generator source. The amplitude should be as large as possible up to ±1.8V or 9dBm. RESULTS After everything is set up and the software is connected to the DAC demo system, a sine wave can be added to the output waveform. The default frequency is 399.932861328MHz (Figure 3). By clicking Update FPGA, the data is sent to the FPGA and is then used to program the DAC. A spectrum analyzer can then be used to view the results at J5. HARDWARE SETUP SMAs J2 & J3:Differential Trigger Input. Apply a signal to J2 from a 50Ω driver. Absorptive filters are required for data sheet performance. Use J2 and J3 if the trigger is a differential signal. J4:Sample Clock Input. Apply a clock signal to this SMA connector from a 50Ω driver. A 0dBm clock source should be sufficient, but for best phase noise and jitter performance, use the highest possible amplitude and slew rate. J5: RF Output Signal. This is the upconverted output of the DAC if the output impedance is 50Ω. Connect to a spectrum analyzer. 6 J6: LO Input Signal. This is the local oscillator input to the upconverting mixer. Nominal power level is 0dBm. J8:SYNC. This SMA is to provide access to the sync pin of the LT8614. It is not used in normal use. Turrets +5V:Positive Input Voltage for the DAC, Mixer, and Digital Circuits. This voltage feeds a series of regulators that supply the proper voltages for the DAC. The voltage range for this turret is 4.8V to 5.2V. Note: For close-in phase noise plots, driving this voltage is not ideal. There is a known 20kHz noise hump in the spectrum that is generated by the regulators. For the best phase noise performance, back drive the onboard regulators with the provided turrets from a low noise supply. GND: Ground Connection. This demo board has only a single ground plane. This turret should be tied to the GND terminal of the power supply being used. SVDD3V0: Optional 3.0V Input. This pin is connected directly to the SVDD pin of the DAC. It requires a supply that can deliver up to 100mA. Driving this pin will shut down the onboard regulator. AVDD3V3: Optional 3.3V Input. This pin is connected directly to the AVDD33 pin of the DAC. It requires a supply that can deliver up to 450mA. Driving this pin will shut down the onboard regulator. DVDD3V3: Optional 3.3V Input. This pin is connected directly to the DVDD33 pin of the DAC. It requires a supply that can deliver up to 50mA. Driving this pin will shut down the onboard regulator. AVDD1V8: Optional 1.8V Input. This pin is connected directly to the AVDD18 pin of the DAC. It requires a supply that can deliver up to 1A. Driving this pin will shut down the onboard regulator. DVDD1V8: Optional 1.8V Input. This pin is connected directly to the DVDD18 pin of the DAC. It requires a supply that can deliver up to 500mA. Driving this pin will shut down the onboard regulator. dc2191afa DEMO MANUAL DC2191A VP1: This is a test point that is at the output of the onboard switching regulator. It is meant for test purposes. It can also be driven to 2.5V to shut down the output of the switching regulator. TSTP & TSTN: These pins are tied directly to the TSTP and TSTN pins of the DAC. They can be used to measure the internal temperature and timing of the LVDS inputs. FSADJ:This is an optional pin that is tied directly to the FSADJ pin of the DAC. It can be used to set the full-scale output current of the DAC. In normal operation this pin is tied to GND through 500Ω to set a current of 40mA at the output. REFIO: This pin is tied directly to the REFIO pin of the DAC and is used to set the reference voltage for the DAC. Normally it is internally set to 1.25V but can be overdriven with an external voltage from 1.1V to 1.4V. Jumpers The DC2191 demonstration circuit should have the following jumper settings as default positions. JP2:SPI and JTAG. This jumper selects how the FPGA is programmed. In the SPI position the FPGA is programmed from the onboard FTDI chip and the LTDACGen software. In the JTAG position the J9 is used with a JTAG programmer to program the FPGA. (Default:SPI or down) Connectors J1: DC590. This is an optional header that can be used to program the DAC with the DC590. (Default:removed) J9:JTAG. This is an optional header that can be used to program the FPGA through a JTAG programmer. (Default: removed) J7:USB. Connect a USB cable from J7 to a computer with the LTDACGen software installed. J10 & J11: HSMC Connectors. These connectors are designed to connect to the Altera Stratix IV development board. All of the communication between the FPGA and the DAC is routed through these connectors. JP1: PD. In the RUN position this pin results in normal operation of the DAC. In the SHDN position the DAC is powered down. (Default:RUN or up) dc2191afa 7 DEMO MANUAL DC2191A PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER Required Circuit Components 1 13 C1, C25, C26, C29, C31, C32, C33, C34, C35, C36, C37, C71, C72 CAP., X7R, 0.1µF, 16V 10% 0402 AVX, 0402YC104KAT2A 2 4 C2, C3, C8, C19, C78, C94 CAP., NPO, 0.01µF, 25V, 5%, 0603 TDK, C1608C0G1H103J 3 9 C4, C6, C9, C11, C14, C18, C67, C68, C69, C76, C77, C81 CAP., X7R, 1µF, 16V 10% 0603 AVX, 0603YC105KAT2A 4 5 C5, C7, C10, C12, C15 CAP., TANT., 47µF, 16V, 10%, 7343 AVX, TAJD476K016RNJ 5 6 C13, C16, C27, C28, C73, C74 CAP., X5R, 4.7µF, 16V, 20%, 1206 TDK, C3216X5R1C475M 6 3 C17, C40, C82 CAP., X5R, 10µF, 10V, 20%, 0603 AVX, 0603ZD106MA2T 7 1 C20 CAP., C0G, 4.7pF, 50V ± 0.25pF, 0603 AVX, 06035A4R7CAT2A 8 2 C21, C24 CAP., X7R, 0.1µF, 16V, 10%, 0603 TDK, C1608X7R1C104K 9 1 C22 CAP., X7R, 1µF, 25V, 10%, 0603 TDK, C1608X7R1E105K 10 2 C23, C70 CAP., X7R, 47µF, 10V, 10%, 1210 MURATA, GRM32ER71A476KE15L 11 1 C30 CAP., X5R, 3.3µF, 16V, 10%, 0603 TDK, C1608X5R1C335K 12 2 C38, C39 CAP., COG, 27pF, 50V, 5%, 0402 TDK, C1005C0G1H270J 13 2 C89, C88 CAP., COG, 5.6pF, 50V, 5%, 0402 TDK, C1005C0G1H5R6J 14 2 C90, C93 CAP., COG, 22pF, 50V, 5%, 0402 TDK, C1005C0G1H220J 15 1 C83 CAP., COG, 2.7pF, 50V, 5%, 0402 TDK, C1005C0G1H2R7J 16 1 C85 CAP., COG, 1.2pF, 50V, 5%, 0402 TDK, C1005C0G1H1R2J 17 1 C79 CAP., COG, 10pF, 50V, 5%, 0402 TDK, C1005C0G1H100J 18 1 C80 CAP., COG, 100pF, 50V, 5%, 0402 TDK, C1005C0G1H101J 19 2 C41, C42 CAP., COG, 100pF, 25V, 5%, 0201 TDK, C0603C0G1E101J 20 1 C43 CAP., X5R, 0.01µF, 16V, 10%, 0402 MURATA, GRM155R61C103KA01D 21 1 C44 CAP., X7R, 47nF, 25V, 10%, 0402 MURATA, GRM155R71E473KA88D 22 9 C45, C48, C49, C53, C54, C58, C61, C62, CAP., X5R, 100µF, 6.3V, 20%, 1206 C64 TDK, C3216X5R0J107M 23 10 C46, C50, C51, C52, C55, C56, C57, C59, CAP., X7S, 2.2µF, 4V, 20%, 0306 C60, C63 MURATA, LLL185C70G225ME01L 24 1 C47 CAP., COG, 10pF, 25V, 5%, 0201 MURATA, GRM0335C1E100JA01D 25 0 C65, C84, C86, C91, C92 CAP., OPT, 0402 OPTION 26 1 C66 CAP., NP0, 1pF, 25V ±.25pF, 0402 AVX, 04023A1R0CAT2A 27 1 C75 CAP., X7R, 10µF, 50V, 10%, 1210 MURATA, GRM32ER71H106KA12L 28 1 D1 DIODE, TVS, 70V, SMA DIODES INC./ ZETEX, SMAT70A-13-F 29 1 D2 DIODE, TVS, 24V, SMA DIODES INC./ ZETEX, SMAJ24A-13-F 30 1 D3 LED,RED, WATERCLEAR, 0805 WURTH, 150080RS75000 31 10 E1, E2, E3, E5-E11 TEST POINT, TURRET, .061, PBF MILL-MAX, 2308-2-00-80-00-00-07-0 32 2 E4, E12 TEST POINT, TURRET, .094, PBF MILL-MAX, 2501-2-00-80-00-00-07-0 33 2 JP1, JP2 HEADER, 3 PIN, .079 SULLINS, NRPN031PAEN-RC 34 1 J1 HEADER, 2 × 7 DUAL ROW MOLEX 87831-1420 35 3 J2, J3, J8 CON.,SMA JACK, STRAIGHT, THRU-HOLE AMPHENOL CONNEX, 132134 36 1 J4 CON., SMA PCB TOP MOUNT AEP, 9650-1113-005 37 2 J5, J6 CON., SMA 50 OHM EDGE-LAUNCH EMERSON, 142-0701-851 8 dc2191afa DEMO MANUAL DC2191A PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER 38 1 J7 CONNECTOR, USB TYPE B, RIGHT ANGLE PCB MOUNT FCI, 61729-0010BLF 39 1 J9 HEADER, 2 × 5, 0.100 SAMTEC, TSW-105-07-L-D 40 2 J10, J11 CONNECTOR, HSMC SAMTEC, ASP-122952-01 41 6 L1, L2, L3, L4, L6, L7 FERRITE BEAD, 33Ω at 100mhz, 1206 MURATA, BLM31PG330SN1L 42 1 L5 INDUCTOR, 2.2µH, 20% HIGH CURRENT, SMT VISHAY, IHLP2020BZER2R2M11 43 1 L8 INDUCTOR, CERAMIC CHIP, 1nH, 5%, 0402 COILCRAFT, 0402CS-1N0XJLU 44 1 L9 FERRITE BEAD, 30Ω at 100Mhz, 0805 TDK, MPZ2012S300A 45 1 L10 INDUCTOR, 6.8µH, 20% HIGH CURRENT, SMT VISHAY, IHLP2020BZER6R8M11 46 2 L18, L19 IND, 3.3nH, 5%, 0402 TOKO, LL1005-FHL3N3S 47 2 L16, L17 IND, 3.9nH, 5%, 0402 TOKO, LL1005-FHL3N9S 48 1 L13 IND, 1.8nH, 5%, 0402 TOKO, LL1005-FHL1N8S 49 1 L12 IND, 2.7nH, 5%, 0402 TOKO, LL1005-FHL2N7S 50 2 L20, L21 IND, 560nH, 5%, 0603 COILCRAFT, 0603HL-561XJR 51 2 L14, L15 RES., CHIP, 0Ω, JUMPER, 1/16W, 0402 VISHAY, CRCW04020000Z0ED 52 5 MP1-MP5 MACHINE SCREW, NYLON, #4-40 × 1/2 IN., SLOTTED EAGLE PLASTIC DEVICES, 561-J440.5 53 2 MP6-MP7 HEX STANDOFF, NYLON, #4-40 × 1/2 IN., THREADED KEYSTONE, 1902C 54 4 MP8-MP11 SPACER, NYLON, 5mm L × 3.2mm DIA. BIVAR, 9908-5MM 55 2 MP12-MP13 STANDOFF, NYLON, 3/4 IN. KEYSTONE, 8834 56 4 MP14-MP17 STANDOFF, NYLON, #4-40 × 1/4 IN. MICROPLASTICS, #14HTSP101 57 2 MP18, MP19 STANDOFF, NYLON 3/4" KEYSTONE, 8834 58 2 Q1, Q2 TRANSISTOR, N-CH. POWER MOSFET, SOIC 8L FAIRCHILD, FDS8870 59 6 R1, R2, R3, R13, R17, R30 RES., CHIP, 1k, 1/16W, 5%, 0402 VISHAY, CRCW04021K00JNED 60 1 R4 RES., CHIP, 4.7k, 1/16W, 5%, 0402 YAGEO, RC0402JR-074K7L 61 4 R5, R14, R15, R16 RES., CHIP, 10k, 1/16W, 5%, 0402 YAGEO, RC0402JR-0710KL 62 2 R6, R8 RES., CHIP, 2k, 1/16W, 5%, 0402 VISHAY, CRCW04022K00JNED 63 0 R7, R10, R36, R37, R38, R39 RES., CHIP, DNI, 0402 OPTION 64 1 R9 RES., CHIP, 39Ω, 1/16W, 1%, 0402 VISHAY, CRCW040239R0FKED 65 3 R11, R57, R58 RES., CHIP, 0Ω JUMPER, 1/16W, 0402 VISHAY, CRCW04020000Z0ED 66 1 R12 RES., CHIP, 12k, 1/16W, 5%, 0402 VISHAY, CRCW040212K0JNED 67 1 R18 RES., CHIP, 2.2k, 1/16W, 5%, 0402 VISHAY, CRCW04022K20JNED 68 2 R19, R20 RES., CHIP, 3.24k, 1/16W, 1%, 0402 VISHAY, CRCW04023K24FKED 69 1 R21 RES., CHIP, 1k, 1/16W, 1%, 0402 YAGEO, RC0402FR-071KL 70 1 R22 RES., CHIP, 7.15k, 1/16W, 1%, 0402 VISHAY, CRCW04027K15FKED 71 2 R26, R29 RES., CHIP, 49.9Ω, 1/6W, 1%, 0201 VISHAY, CRCW020149R9FNED 72 7 R31, R32, R33, R34, R35, R41, R42 RES., CHIP, 10Ω, 1/16W, 1%, 0402 VISHAY, CRCW040210R0FKED 73 1 R45 RES., CHIP, 499Ω, 1/16W, 1%, 0402 VISHAY, CRCW0402499RFKED 74 1 R49 RES., CHIP, 41.2k, 1/10W, 1%, 0603 VISHAY, CRCW060341K2FKEA 75 1 R50 RES., CHIP, 309k, 1/10W, 1%, 0603 VISHAY, CRCW0603309KFKEA 76 1 R51 RES., CHIP, 243k, 1/10W, 1%, 0603 VISHAY, CRCW0603243KFKEA dc2191afa 9 DEMO MANUAL DC2191A PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER 77 1 R52 RES., CHIP, 50Ω, 1/8W, 5%, 0603 VISHAY, FC0603E50R0JST1 78 1 R53 RES., CHIP, 560Ω, 1/10W, 5%, 0603 VISHAY, CRCW0603560RJNEA 79 1 R54 RES., CHIP, 10k, 1/10W, 1%, 0603 VISHAY, CRCW060310K0FKEA 80 4 R55, R56, R59, R60 RES., CHIP, 20Ω, 1/16W, 1%, 0402 VISHAY, CRCW040220R0FKED 81 2 R61, R62 RES., CHIP, 11Ω, 1/16W, 1%, 0402 VISHAY, CRCW040211R0FKED 82 1 T1 TRANSFORMER, BALUN ANAREN, B0430J50100AHF 83 1 U2 IC, USB TO MULTIPURPOSE UART/FIFO, TQFP FTDI, FT2232HL 84 1 U3 IC, QUAD MUX/DEMUX, TSSOP-16 FAIRCHILD, FST3257MTCX 85 1 U4 IC, EEPROM 1KBIT 3MHz, 8TSSOP MICROCHIP, 93LC46C-I/ST 86 1 U5 IC, MICROPOWER REGULATOR, SO-8 LINEAR TECH., LT1763CS8-3#PBF 87 2 U6, U7 IC, MICROPOWER REGULATOR, SO-8 LINEAR TECH., LT1763CS8-3.3#PBF 88 1 U8 IC, BUCK REGULATOR, QFN LINEAR TECH., LT8614IUDC#PBF 89 1 U9 IC, VOLTAGE REFERENCE, MSOP LINEAR TECH., LTC6655CHMS82.048#PBF 90 2 U10, U11 I.C., LOW DROPOUT REGULATOR, 3mm × 3mm, DFN LINEAR TECH., LT3080EDD#PBF 91 1 U12 I.C., 80V IDEAL DIODE, DFN-6L LINEAR TECH.,LTC4359HDCB#TRPBF 92 1 U13 IC, MIXER LINEAR TECH, LTC5579IUH 93 2 XJP1, XJP2 SHUNT, 2mm SAMTEC, 2SN-BK-G 94 1 Y1 CRYSTAL, 12.0MHz, SMT ABRACON, ABMM2-12.000MHZ-E2-T GENERAL BOM DC2191A IC, 16-BIT 2.5Gsps DAC LINEAR TECH. LTC2000IY-16 DC2191A-A Required Circuit Components 1 1 2 1 10 U1 dc2191afa A B C DCKIP CK J4 1 TRIG P J3 1 1 TRIG N J2 GND GND GND GPIO DCKIN (FROM PAGE 4) DC590 14 3 8 13 J10 J9 DCKIP DCKIN DIGITAL INPUTS [DA0..DA15] AND [DB0..DB15] FROM PAGE 4 0402 NP0 2 C65 DNI 1nH (T0 PAGE 4) C66 1pF 1 L8 TRIGGER_P TRIGGER_N DBN0 S9 S10 DBP0 10 9 11 12 DBN1 EEVCC EESDA EESCL EEGND DBN2 J1 DBP1 6 4 7 5 DBP2 CS SCK/SCL MOSI/SDA MISO DBN3 SVDD3V0 DBN4 1 DAP1 DAN0 DAP0 DBP3 0201 COG C47 10pF DAP9 2 DAP0 DAN0 DAP3 DBN0 DBP0 DBP4 R9 R10 DAN1 DAP1 DBN5 Q9 Q10 DBN1 DBP1 S7 S8 DAN1 DAP2 DAN2 DAP5 DAN2 DAP2 DBN6 P9 P10 DBN2 DBP2 R7 R8 DAP6 DAN3 DAP3 DBP5 N9 N10 DBN3 DBP3 Q7 Q8 DAN3 DAP4 DAN4 DAP7 DAN4 DAP4 P7 P8 DAN5 DBN4 DBP4 N7 N8 DAN6 DAN5 DAP5 DBP6 M9 M10 DBN5 DBP5 DBN7 L9 L10 DAN6 DAP6 M7 M8 DAP8 DAN8 DBN6 DBP6 L7 L8 DAN7 K7 K8 DAN7 DAP7 DBN7 DBP7 DBN8 K9 K10 DBP7 DAN9 G7 G8 C43 0201 COG 2 GND IN 4 5 0201 COG C42 100pF 0402 X5R 0.01uF 0201 1% R26 49.9 0201 1% 3 2 GND R29 49.9 6 C41 100pF 1 T1 E11 TSTP TSTN E10 ANAREN XINGER U1* DAN9 DAP9 H7 H8 DAN8 DAP8 DBN8 DBP8 VCCIO DBN10 DBN9 DBP9 DBN9 DAP12 VUNREG DBN11 H9 H10 DBP8 DAP10 DBP10 G9 G10 DBP9 DAN10 DAP11 DAN11 DBP11 D DBN12 F9 F10 DAN10 DAP10 DBN13 E9 E10 DBN10 DBP10 F7 F8 DAP14 DAN11 DAP11 DBP12 D9 D10 DBN11 DBP11 E7 E8 DAN12 DAP13 DAN13 DBP13 C9 C10 DAN12 DAP12 D7 D8 DAP15 DAN15 DBN12 DBP12 C7 C8 DAN14 B7 B8 DAN13 DAP13 DBN13 DBP13 DBN14 SVDD3V0 S6 SVDD A7 A8 DAN14 DAP14 DBN14 DBP14 DBN15 B9 B10 DBP14 A9 A10 DAN15 DAP15 DBN15 DBP15 DBP15 E8 499 DCKOP DCKON IOUTN IOUTP J8 J7 J1 H1 M2 M1 FSADJ FSADJ REFIO R45 E9 10 R42 R41 RUN SHDN PD_ALT PD JP1 (T0 PAGE 4) R60 20 560nH L21 560nH L20 C78 0.01uF C94 0.01uF 1 1 2 2 1 1 L17 3.9nH C90 22pF C93 22pF L16 3.9nH 1 1 L14 0 C92 DNI C91 DNI 2 2 R61 11 R62 11 2 1 3 4 GND GND IF+ IF- U13 LT5579 C79 10pF 10 OPT 10 OPT 10 OPT 10 2 2 L15 0 10 OPT C80 100pF 21 23 24 15 C82 10uF 1 1 C85 1.2pF L12 2.7nH C83 2.7pF L13 1.8nH TO PAGE 4 GND GND GND RF C81 1.0uF PD_ALT SDO_ALT SDO_FTDI SDI_ALT SDI_FTDI SCK_ALT SCK_FTDI CS_ALT CS_FTDI M. HAWKINS C. MAYOTT L18 3.3nH C88 5.6pF C89 5.6pF L19 3.3nH 0.1dB Chebychev, BW = 500MHz AVDD3V3 R31 R37 R33 R36 R32 R38 R34 R39 R35 Figure 4. DC2191 Demo Circuit Schematic (Sheet 2) DCKON DCKOP R58 0 R57 0 R59 20 (TO PAGE 4) C40 10uF 3 2 1 SVDD3V0 REFIO 10 22 LO S1 S2 S5 S4 S3 PD CS SCK SDI SD0 CKP CKN A3 A2 TSTP TSTN R4 R3 2 1 1 2 8 VCC 9 VCC 10 VCC 11 VCC GND 25 GND 5 GND 6 GND 7 GND 12 GND 13 GND 14 GND 16 GND 17 GND 18 GND 19 GND 20 2 1 1 J6 C86 DNI J5 C84 DNI 1 LTC2000IY-14 U1 LTC2000IY-16 DEMO CIRCUIT 2191A LTC2000 HIGH SPEED DAC + LTC5579 MIXER LTC2000IY-11 -B -C -A ASSY *ASSEMBLY TABLE 2. REFER TO PAGE 4 FOR LTC2000 POWER CONNECTIONS. 1. ALL RESISTORS ARE SIZE 0402, U.O.N. NOTES: TECHNOLOGY RF Output LO Input 2 2 1 A B C D DEMO MANUAL DC2191A SCHEMATIC DIAGRAM 11 dc2191afa A B C D2 SMAJ24A D1 SMAT70A SYNC J8 +5V E4 GND 1 +5V 5 1210 C70 47uF SHDN 3 2 1 R52 0402 R30 1K 50 FERRITE BEAD, 33 OHMS L1 4 D 4 IN 1 2 2 1 3 SOURCE C9 1.0uF C6 1.0uF C4 1.0uF 5 6 7 8 R53 560 1 8 5 8 5 8 5 1.0uF 41.2K R49 L9 0.1uF C22 1.0uF C76 C24 RED D3 C73 4.7uF 1206 C44 47nF 0402 25V FERRITE BEAD SHDN IN U7 LT1763CS8-3.3 SHDN IN U6 LT1763CS8-3.3 SHDN IN POWER FAULT Q1 FDS8870 LTC4359HDCB U12 OUT 2 GATE GND GND GND 3 6 7 GND GND GND 3 6 7 GND GND GND 3 6 7 E12 VSS 6 PAD 7 2 1 BYP SEN OUT BYP SEN OUT BYP SEN OUT 1 1 15 2 16 17 19 6 7 4 C8 0.01uF L10 RT INTVCC 2 1206 C74 4.7uF FB BIAS SW SW SW SW TR/SS BST SYNC/MODE 6.8uH 1210 VIN2 20 1 9 8 22 21 3 11 10 13 C10 47uF C7 47uF C5 47uF PG GND1 GND1 VIN1 LT8614 + + + GND2 GND2 DVDD3V3 C3 0.01uF AVDD3V3 C2 0.01uF U8 C75 10uF 4 2 1 4 2 1 4 2 14 EN/UV GND 18 1 2 C20 4.7pF L5 C21 0.1uF 2.2uH 2 DVDD3V3 AVDD3V3 SVDD3V0 C77 1.0uF C69 1.0uF E3 C68 1.0uF E2 C67 1.0uF 2 5 6 7 8 2.2V 3 2 1 R51 243K R50 309K VP1 L3 +5V R55 C11 1.0uF 20 C71 0.1uF 1210 VP1 E7 R54 10K +5V R56 C14 1.0uF 5 8 7 5 8 7 U11 LT3080EDD L4 VCTRL VIN VIN LT3080EDD U10 VCTRL VIN VIN PAD VOUT VOUT VOUT PAD VOUT VOUT VOUT C18 1.0uF U9 R20 3.24K R19 3.24K 4 3 2 1 GND GND VIN SHDN GND OUTS OUTF GND LTC6655CHMS8-2.048 9 1 2 3 9 1 2 3 5 6 7 8 C16 4.7uF + + E5 C15 47uF R22 7.15K R21 1.00K DVDD1V8 E6 AVDD1V8 C12 47uF C17 10uF DVDD1V8 C13 4.7uF AVDD1V8 VBUS 4 3 2 1 R16 10K DO DI CLK CS VSS ORG NC VCC 93LC46C-I/ST U4 SVDD3V0 USBDUSBD+ SVDD3V0 NPO C39 27pF 5 6 7 12K 1 FTDI_1V8 C30 3.3uF R12 R15 10K 8 C25 0.1uF Y1 3 12.0 Mhz R13 C29 0.1uF NPO C38 27pF 1K SVDD3V0 C26 0.1uF R14 10K SVDD3V0 1 2 3 4 5 6 USB J7 L6 FERRITE BEAD, 33 OHMS 13 3 2 63 62 61 14 6 7 8 49 50 TEST OSCO OSCI EECS EECLK EEDATA RESET# REF DM DP VREGOUT VREGIN C28 4.7uF C27 4.7uF FTDI_1V8 FT2232HL U2 BCBUS0 BCBUS1 BCBUS2 BCBUS3 BCBUS4 BCBUS5 BCBUS6 BCBUS7 BDBUS0 BDBUS1 BDBUS2 BDBUS3 BDBUS4 BDBUS5 BDBUS6 BDBUS7 ACBUS0 ACBUS1 ACBUS2 ACBUS3 ACBUS4 ACBUS5 ACBUS6 ACBUS7 ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7 PWREN# SUSPEND# SVDD3V0 M. HAWKINS C. MAYOTT R18 2.2K RESET# CS CLK DATA C19 0.01uF L7 FERRITE BEAD, 33 OHMS SVDD3V0 Figure 5. DC2191 Demo Circuit Schematic (Sheet 3) FERRITE BEAD, 33 OHMS SVDD3V0 C72 0.1uF 20 FERRITE BEAD, 33 OHMS C23 47uF Q2 FDS8870 4 L2 FERRITE BEAD, 33 OHMS SET 4 SET 4 E1 4 SVDD3V0 2 12 37 64 U5 VPHY VPLL 20 31 42 56 VCCIO VCCIO VCCIO VCCIO 4 9 AGND 10 VCORE VCORE VCORE GND GND GND GND GND GND GND GND 1 5 11 15 25 35 47 51 SUSPEND# BC5 BC3 BC1 AC7 WM TXEN BC6 BC4 BC2 BC0 BD7 SPI JTAG 1 BC7 R2 1K JP2 R17 1K R3 1K SYSCLK R5 10K R4 4.7K VBUS BD6 R6 2K BD5 RXEN TDI TCK TDO TMS BD4 R7 OPT R8 2K C33 0.1uF 1 3 5 7 9 9 7 SVDD3V0 1 CS_IF 12 SDO_IF SDI_IF SCK_IF 4 S 4A 3A 2A 1A OE 4B1 4B2 3B1 3B2 2B1 2B2 1B1 1B2 U3 BD3 BD1 DEMO CIRCUIT 2191A BD2 BD0 SDO_FTDI CS_FTDI 15 14 13 TMS SDI_FTDI SCK_FTDI 11 10 TDI TDO 5 6 FST3257MTCX TCK 2 3 C1 0.1uF SVDD3V0 OEN_CTRL C37 0.1uF R11 0 OHMS R10 OPT C36 0.1uF 2 4 6 8 10 JTAG J9 SIWUA_CTRL C35 0.1uF SVDD3V0 C34 0.1uF LTC2000 HIGH SPEED DAC + LTC5579 MIXER TECHNOLOGY 3 2 1 SVDD3V0 R1 1K R9 39 FIFO_DATA_IN6 FIFO_DATA_IN4 FIFO_DATA_IN2 SVDD3V0 C32 0.1uF FTDI_1V8 C31 0.1uF FIFO_DATA_IN0 PWRENN RDN FIFO_DATA_IN7 FIFO_DATA_IN5 FIFO_DATA_IN3 FIFO_DATA_IN1 60 36 48 52 53 54 55 57 58 59 38 39 40 41 43 44 45 46 26 27 28 29 30 32 33 34 16 17 18 19 21 22 23 24 1 16 VCC GND 8 12 LT1763CS8-3 A B C D DEMO MANUAL DC2191A SCHEMATIC DIAGRAM dc2191afa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. A B C 2 162 164 38 40 34 36 30 32 26 28 22 24 18 20 14 16 10 12 6 8 2 4 162 164 38 40 34 36 30 32 26 28 22 24 18 20 14 16 10 12 6 8 2 4 GND GND JTAG_TDI CLKIN0 GND GND JTAG_TDO CLKOUT0 SDA JTAG_TCK XCVR_TXP0 XCVR_TXN0 XCVR_TXP1 XCVR_TXN1 XCVR_TXP2 XCVR_TXN2 XCVR_TXP3 XCVR_TXN3 XCVR_TXP4 XCVR_TXN4 XCVR_TXP5 XCVR_TXN5 XCVR_TXP6 XCVR_TXN6 XCVR_TXP7 XCVR_TXN7 RXEN RDN SYSCLK 29 31 33 35 37 39 161 163 WM 25 27 FIFO_DATA_IN7 17 19 TXEN FIFO_DATA_IN5 13 15 21 23 FIFO_DATA_IN1 9 11 CS_ALT 166 168 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 166 168 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 BANK 2 GND GND D0 D2 3V3 LVDS_TXP0 LVDS_TXN0 3V3 LVDS_TXP1 LVDS_TXN1 3V3 LVDS_TXP2 LVDS_TXN2 3V3 LVDS_TXP3 LVDS_TXN3 3V3 LVDS_TXP4 LVDS_TXN4 3V3 LVDS_TXP5 LVDS_TXN5 3V3 LVDS_TXP6 LVDS_TXN6 3V3 LVDS_TXP7 LVDS_TXN7 3V3 CLKOUT1P CLKOUT1N 3V3 165 167 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 165 167 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 DAP2 DBP2 DAP1 DBP1 DAP0 DBP0 PD_ALT DBP11 DAP10 DBP10 DAP9 DBP9 DAP8 DBP8 SDI_ALT TRIGGER_P DAP3 DBP3 TRIGGER_N DAN3 DBN3 DAN2 DBN2 DAN1 DBN1 DAN0 DBN0 DBN11 DAN10 DBN10 DAN9 DBN9 DAN8 DBN8 SCK_ALT GND GND GND GND D0 D2 3V3 LVDS_TXP0 LVDS_TXN0 3V3 LVDS_TXP1 LVDS_TXN1 3V3 LVDS_TXP2 LVDS_TXN2 3V3 LVDS_TXP3 LVDS_TXN3 3V3 LVDS_TXP4 LVDS_TXN4 3V3 LVDS_TXP5 LVDS_TXN5 3V3 LVDS_TXP6 LVDS_TXN6 3V3 LVDS_TXP7 LVDS_TXN7 3V3 CLKOUT1P CLKOUT1N 3V3 D1 D3 12V LVDS_RXP0 LVDS_RXN0 12V LVDS_RXP1 LVDS_RXN1 12V LVDS_RXP2 LVDS_RXN2 12V LVDS_RXP3 LVDS_RXN3 12V LVDS_RXP4 LVDS_RXN4 12V LVDS_RXP5 LVDS_RXN5 12V LVDS_RXP6 LVDS_RXN6 12V LVDS_RXP7 LVDS_RXN7 12V CLKIN1P CLKIN1N 12V GND GND D1 D3 12V LVDS_RXP0 LVDS_RXN0 12V LVDS_RXP1 LVDS_RXN1 12V LVDS_RXP2 LVDS_RXN2 12V LVDS_RXP3 LVDS_RXN3 12V LVDS_RXP4 LVDS_RXN4 12V LVDS_RXP5 LVDS_RXN5 12V LVDS_RXP6 LVDS_RXN6 12V LVDS_RXP7 LVDS_RXN7 12V CLKIN1P CLKIN1N 12V BANK 2 BD0 BD2 BD6 BC0 BC2 BC4 BC5 BC6 PWRENN CLK DCKOP 170 172 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 170 172 GND GND BANK 3 169 171 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 169 171 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 1 DCKIN DAN7 DBN7 DAN6 DBN6 DAN5 DBN5 DAN4 DBN4 DAN15 DBN15 DAN14 DBN14 DAN13 DBN13 DAN12 DBN12 DAN11 DCKIP 1 C57 2.2uF C52 2.2uF M5 N5 P5 Q5 M4 N4 P1 P2 P3 P4 Q1 Q2 Q3 Q4 DVDD33 DVDD3V3 AVDD33 AVDD3V3 AVDD18 AVDD1V8 DVDD18 DVDD33 DVDD33 DVDD33 DVDD33 AVDD33 AVDD33 AVDD33 AVDD33 AVDD33 AVDD33 AVDD33 AVDD33 AVDD33 AVDD33 U1 AVDD18 AVDD18 AVDD18 AVDD18 AVDD18 AVDD18 AVDD18 AVDD18 AVDD18 DVDD18 DVDD18 DVDD18 DVDD18 DVDD18 DVDD18 DVDD18 DVDD18 C60 2.2uF C56 2.2uF C51 2.2uF C59 2.2uF C55 2.2uF C50 2.2uF C48 100uF C53 100uF C61 100uF C63 2.2uF C62 100uF DEMO CIRCUIT 2191A LTC2000 HIGH SPEED DAC + LTC5579 MIXER C45 100uF SVDD3V0 C64 100uF DVDD3V3 C46 2.2uF C58 100uF AVDD3V3 C54 100uF DVDD1V8 C49 100uF AVDD1V8 LTC2000 POWER BYPASS CAPACITORS LTC2000 POWER CONNECTIONS C1 C2 C3 C4 D1 D2 D3 E1 E2 A5 B5 C5 D4 D5 E3 E4 E5 DVDD1V8 NET CONNECTIONS FOR LTC2000 POWER PINS TO PCB POWER NETS TECHNOLOGY DAP7 DBP7 DAP6 DBP6 DAP5 DBP5 DAP4 DBP4 DAP15 DBP15 DAP14 DBP14 DAP13 DBP13 DAP12 DBP12 DAP11 GND GND LVDS_TXP8 LVDS_TXN8 3V3 LVDS_TXP9 LVDS_TXN9 3V3 LVDS_TXP10 LVDS_TXN10 3V3 LVDS_TXP11 LVDS_TXN11 3V3 LVDS_TXP12 LVDS_TXN12 3V3 LVDS_TXP13 LVDS_TXN13 3V3 LVDS_TXP14 LVDS_TXN14 3V3 LVDS_TXP15 LVDS_TXN15 3V3 LVDS_TXP16 LVDS_TXN16 3V3 CLKOUT2P CLKOUT2N 3V3 GND GND LVDS_TXP8 LVDS_TXN8 3V3 LVDS_TXP9 LVDS_TXN9 3V3 LVDS_TXP10 LVDS_TXN10 3V3 LVDS_TXP11 LVDS_TXN11 3V3 LVDS_TXP12 LVDS_TXN12 3V3 LVDS_TXP13 LVDS_TXN13 3V3 LVDS_TXP14 LVDS_TXN14 3V3 LVDS_TXP15 LVDS_TXN15 3V3 LVDS_TXP16 LVDS_TXN16 3V3 CLKOUT2P CLKOUT2N 3V3 LVDS_RXP8 LVDS_RXN8 12V LVDS_RXP9 LVDS_RXN9 12V LVDS_RXP10 LVDS_RXN10 12V LVDS_RXP11 LVDS_RXN11 12V LVDS_RXP12 LVDS_RXN12 12V LVDS_RXP13 LVDS_RXN13 12V LVDS_RXP14 LVDS_RXN14 12V LVDS_RXP15 LVDS_RXN15 12V LVDS_RXP16 LVDS_RXN16 12V CLKIN2P CLKIN2N 12V GND GND LVDS_RXP8 LVDS_RXN8 12V LVDS_RXP9 LVDS_RXN9 12V LVDS_RXP10 LVDS_RXN10 12V LVDS_RXP11 LVDS_RXN11 12V LVDS_RXP12 LVDS_RXN12 12V LVDS_RXP13 LVDS_RXN13 12V LVDS_RXP14 LVDS_RXN14 12V LVDS_RXP15 LVDS_RXN15 12V LVDS_RXP16 LVDS_RXN16 12V CLKIN2P CLKIN2N 12V BD1 BD3 BD4 BD5 BD7 BC1 BC3 BC7 DATA CS DCKON 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 BANK 3 M. HAWKINS C. MAYOTT AC7 SUSPEND# SIWUA_CTRL OEN_CTRL FIFO_DATA_IN6 FIFO_DATA_IN4 FIFO_DATA_IN3 FIFO_DATA_IN2 SDO_ALT RESET# FIFO_DATA_IN0 5 7 1 3 161 163 37 39 33 35 29 31 25 27 21 23 17 19 13 15 9 11 5 7 1 3 HSMC CONNECTORS - MEZZANINE SIDE Figure 6. DC2191 Demo Circuit Schematic (Sheet 4) SCL JTAG_TMS BANK 1 GND GND JTAG_TDO CLKOUT0 SDA JTAG_TCK XCVR_TXP0 XCVR_TXN0 XCVR_TXP1 XCVR_TXN1 XCVR_TXP2 XCVR_TXN2 XCVR_TXP3 XCVR_TXN3 XCVR_TXP4 XCVR_TXN4 XCVR_TXP5 XCVR_TXN5 XCVR_TXP6 XCVR_TXN6 XCVR_TXP7 XCVR_TXN7 XCVR_RXPO XCVR_RXN0 XCVR_RXP1 XCVR_RXN1 XCVR_RXP2 XCVR_RXN2 XCVR_RXP3 XCVR_RXN3 XCVR_RXP4 XCVR_RXN4 XCVR_RXP5 XCVR_RXN5 XCVR_RXP6 XCVR_RXN6 XCVR_RXP7 XCVR_RXN7 GND GND JTAG_TDI CLKIN0 SCL JTAG_TMS XCVR_RXPO XCVR_RXN0 XCVR_RXP1 XCVR_RXN1 XCVR_RXP2 XCVR_RXN2 XCVR_RXP3 XCVR_RXN3 XCVR_RXP4 XCVR_RXN4 XCVR_RXP5 XCVR_RXN5 XCVR_RXP6 XCVR_RXN6 XCVR_RXP7 XCVR_RXN7 BANK 1 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND R6 R5 R2 R1 Q6 P6 N6 N3 N2 N1 M6 M3 L6 L5 L4 L3 L2 L1 K6 K5 K4 K3 K2 K1 J6 J5 J4 J3 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND A1 A4 A6 B1 B2 B3 B4 B6 C6 D6 E6 F1 F2 F3 F4 F5 F6 G1 G2 G3 G4 G5 G6 H2 H3 H4 H5 H6 J2 D 2 A B C D DEMO MANUAL DC2191A SCHEMATIC DIAGRAM 13 dc2191afa DEMO MANUAL DC2191A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 1630 McCarthy Blvd. Milpitas, CA 95035 Copyright © 2004, Linear Technology Corporation 14 Linear Technology Corporation dc2191afa LT 0416 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2015