74HC540-Q100; 74HCT540-Q100
Octal buffer/line driver; 3-state; inverting
Rev. 2 — 1 March 2016
Product data sheet
1. General description
The 74HC540-Q100; 74HCT540-Q100 is an 8-bit inverting buffer/line driver with 3-state
outputs. The device features two output enables (OE1 and OE2). A HIGH on OEn causes
the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Inverting outputs
Complies with JEDEC standard no. 7A
Input levels:
For 74HC540-Q100: CMOS level
For 74HCT540-Q100: TTL level
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
3. Ordering information
Table 1.
Ordering information
Type number
74HC540D-Q100
74HCT540D-Q100
Package
Temperature range
Name
Description
Version
40 C to +125 C
SO20
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74HC540-Q100; 74HCT540-Q100
NXP Semiconductors
Octal buffer/line driver; 3-state; inverting
4. Functional diagram
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Product data sheet
(1
Logic symbol
74HC_HCT540_Q100
<
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Fig 1.
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DDD
DDD
Fig 2.
IEC logic symbol
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
2 of 16
74HC540-Q100; 74HCT540-Q100
NXP Semiconductors
Octal buffer/line driver; 3-state; inverting
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DDD
Fig 3.
Functional diagram
74HC_HCT540_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
3 of 16
74HC540-Q100; 74HCT540-Q100
NXP Semiconductors
Octal buffer/line driver; 3-state; inverting
21(%8))(5/,1('5,9(5
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Fig 4.
DDD
Logic diagram
74HC_HCT540_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
4 of 16
74HC540-Q100; 74HCT540-Q100
NXP Semiconductors
Octal buffer/line driver; 3-state; inverting
5. Pinning information
5.1 Pinning
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Fig 5.
Pin configuration DIP20 and SO20
5.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
OE1
1
output enable input (active LOW)
A0 to A7
2, 3, 4, 5, 6, 7, 8, 9
data input
GND
10
ground (0 V)
Y0 to Y7
18, 17, 16, 15, 14, 13, 12, 11
data output
OE2
19
output enable input (active LOW)
VCC
20
supply voltage
6. Functional description
Table 3.
Functional table[1]
Control
Input
Output
OE1
OE2
An
Yn
L
L
L
H
L
L
H
L
X
H
X
Z
H
X
X
Z
[1]
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
74HC_HCT540_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
5 of 16
NXP Semiconductors
74HC540-Q100; 74HCT540-Q100
Octal buffer/line driver; 3-state; inverting
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
Min
Max
Unit
0.5
+7
V
-
20
mA
-
20
mA
-
35
mA
70
mA
IIK
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
[1]
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
[1]
IO
output current
0.5 V < VO < VCC + 0.5 V
ICC
supply current
-
IGND
ground current
70
-
mA
Tstg
storage temperature
65
+150
C
-
500
mW
total power dissipation
Ptot
[2]
SO20
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
For SO20 packages: above 70 C the value of Ptot derates linearly with 8 mW/K.
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
VCC
supply voltage
Conditions
74HC540-Q100
74HCT540-Q100
Unit
Min
Typ
Max
Min
Typ
Max
2.0
5.0
6.0
4.5
5.0
5.5
V
VI
input voltage
0
-
VCC
0
-
VCC
V
VO
output voltage
0
-
VCC
0
-
VCC
V
Tamb
ambient temperature
40
+25
+125
40
+25
+125
C
t/V
input transition rise and fall rate
-
-
625
-
-
-
VCC = 4.5 V
-
1.67
139
-
1.67
139
ns/V
VCC = 6.0 V
-
-
83
-
-
-
ns/V
74HC_HCT540_Q100
Product data sheet
VCC = 2.0 V
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
ns/V
© NXP Semiconductors N.V. 2016. All rights reserved.
6 of 16
74HC540-Q100; 74HCT540-Q100
NXP Semiconductors
Octal buffer/line driver; 3-state; inverting
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Tamb = 25 C
Conditions
Tamb = 40 C
to +85 C
Tamb = 40 C
to +125 C
Min
Typ
Max
Min
Max
Min
Max
Unit
74HC540-Q100
VIH
VIL
VOH
VOL
HIGH-level
input voltage
VCC = 2.0 V
1.5
1.2
-
1.5
-
1.5
-
V
VCC = 4.5 V
3.15
2.4
-
3.15
-
3.15
-
V
VCC = 6.0 V
4.2
3.2
-
4.2
-
4.2
-
V
LOW-level
input voltage
VCC = 2.0 V
-
0.8
0.5
-
0.5
-
0.5
V
VCC = 4.5 V
-
2.1
1.35
-
1.35
-
1.35
V
VCC = 6.0 V
-
2.8
1.8
-
1.8
-
1.8
V
IO = 20 A; VCC = 2.0 V
1.9
2.0
-
1.9
-
1.9
-
V
IO = 20 A; VCC = 4.5 V
4.4
4.5
-
4.4
-
4.4
-
V
IO = 20 A; VCC = 6.0 V
5.9
6.0
-
5.9
-
5.9
-
V
IO = 6.0 mA; VCC = 4.5 V
3.98
4.32
-
3.84
-
3.7
-
V
IO = 7.8 mA; VCC = 6.0 V
5.48
5.81
-
5.34
-
5.2
-
V
IO = 20 A; VCC = 2.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 20 A; VCC = 4.5 V
-
0
0.1
-
0.1
-
0.1
V
IO = 20 A; VCC = 6.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 6.0 mA; VCC = 4.5 V
-
0.15
0.26
-
0.33
-
0.4
V
IO = 7.8 mA; VCC = 6.0 V
-
0.16
0.26
-
0.33
-
0.4
V
A
HIGH-level
output voltage
LOW-level
output voltage
VI = VIH or VIL
VI = VIH or VIL
II
input leakage
current
VI = VCC or GND; VCC = 6.0 V
-
-
0.1
-
1.0
-
1.0
IOZ
OFF-state
output current
VI = VIH or VIL; VCC = 6.0 V;
VO = VCC or GND
-
0.5
-
5.0
-
10
-
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
8.0
-
80
-
160
A
CI
input
capacitance
-
3.5
-
-
-
-
-
pF
A
74HCT540-Q100
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
2.0
1.6
-
2.0
-
2.0
-
V
VIL
LOW-level
input voltage
VCC = 4.5 V to 5.5 V
-
1.2
0.8
-
0.8
-
0.8
V
VOH
HIGH-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
4.4
4.5
-
4.4
-
4.4
-
V
IO = 6.0 mA
3.98
4.32
-
3.84
-
3.7
-
V
IO = 20 A;
-
0
0.1
-
0.1
-
0.1
V
IO = 6.0 mA;
-
0.16
0.26
-
0.33
-
0.4
V
VOL
LOW-level
output voltage
74HC_HCT540_Q100
Product data sheet
VI = VIH or VIL; VCC = 4.5 V
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
7 of 16
74HC540-Q100; 74HCT540-Q100
NXP Semiconductors
Octal buffer/line driver; 3-state; inverting
Table 6.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Tamb = 25 C
Conditions
Tamb = 40 C
to +85 C
Tamb = 40 C
to +125 C
Min
Typ
Max
Min
Max
Min
Max
Unit
II
input leakage
current
VI = VCC or GND; VCC = 5.5 V
-
-
0.1
-
1.0
-
1.0
IOZ
OFF-state
output current
VI = VIH or VIL; VCC = 5.5 V;
VO = VCC or GND
-
-
0.5
-
5.0
-
10
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
8.0
-
80
-
160
A
ICC
additional
supply current
per input pin; IO = 0 A;
VI = VCC 2.1 V;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V
An input
-
140
504
-
630
-
686
A
OE1 input
-
150
540
-
675
-
735
A
-
100
360
-
450
-
490
A
-
3.5
-
-
-
-
-
pF
OE2 input
CI
input
capacitance
A
A
10. Dynamic characteristics
Table 7.
Dynamic characteristics
GND = 0 V; CL = 50 pF; for test circuit see Figure 8.
Symbol Parameter
Tamb = 25 C
Conditions
Tamb = 40 C to +125 C
Unit
Min
Typ
Max
Max (85 C)
Max (125 C)
-
30
100
125
150
VCC = 4.5 V
-
11
20
25
30
ns
VCC = 5.0 V; CL = 15 pF
-
9
-
-
-
ns
-
9
17
21
26
ns
VCC = 2.0 V
-
52
160
200
240
ns
VCC = 4.5 V
-
19
32
40
48
ns
-
15
27
34
41
ns
VCC = 2.0 V
-
61
160
200
240
ns
VCC = 4.5 V
-
22
32
40
48
ns
-
18
27
34
41
ns
VCC = 2.0 V
-
14
60
75
90
ns
VCC = 4.5 V
-
5
12
15
18
ns
VCC = 6.0 V
-
4
10
13
15
ns
74HC540-Q100
tpd
propagation delay An to Yn; see Figure 6
[1]
VCC = 2.0 V
VCC = 6.0 V
ten
enable time
OEn to Yn; see Figure 7
[1]
VCC = 6.0 V
tdis
disable time
OEn to Yn; see Figure 7
[1]
VCC = 6.0 V
tt
transition time
74HC_HCT540_Q100
Product data sheet
see Figure 6
ns
[2]
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
8 of 16
74HC540-Q100; 74HCT540-Q100
NXP Semiconductors
Octal buffer/line driver; 3-state; inverting
Table 7.
Dynamic characteristics
GND = 0 V; CL = 50 pF; for test circuit see Figure 8.
Symbol Parameter
CPD
power dissipation
capacitance
Tamb = 25 C
Conditions
Unit
Min
Typ
Max
Max (85 C)
Max (125 C)
-
39
-
-
-
pF
-
13
24
30
36
ns
-
11
-
-
-
ns
-
22
35
44
53
ns
[3]
per package;
VI = GND to VCC
Tamb = 40 C to +125 C
74HCT540-Q100
[1]
propagation delay An to Yn; see Figure 6
tpd
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
enable time
ten
[1]
OEn to Yn; see Figure 7
VCC = 4.5 V
[1]
tdis
disable time
OEn to Yn; see Figure 7
-
23
35
44
53
ns
tt
transition time
VCC = 4.5 V; see Figure 6
[2]
-
5
12
15
18
ns
CPD
power dissipation
capacitance
per package;
VI = GND to VCC 1.5 V
[3]
-
44
-
-
-
pF
VCC = 4.5 V
[1]
tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[2]
tt is the same as tTHL and tTLH.
[3]
CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
11. Waveforms
$QLQSXW
90
W3+/
W3/+
<QRXWSXW
90
W7+/
W7/+
DDD
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6.
Input to output propagation delays
74HC_HCT540_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
9 of 16
74HC540-Q100; 74HCT540-Q100
NXP Semiconductors
Octal buffer/line driver; 3-state; inverting
2(QLQSXW
90
W3/=
RXWSXW
/2:WR2))
2))WR/2:
W3=/
90
9;
W3=+
W3+=
9<
RXWSXW
+,*+WR2))
2))WR+,*+
90
RXWSXWV
HQDEOHG
RXWSXWV
GLVDEOHG
RXWSXWV
HQDEOHG
DDD
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 7.
Table 8.
3-state enable and disable times
Measurement points
Type
Input
Output
VM
VM
VX
VY
74HC540-Q100
0.5VCC
0.5VCC
0.1VCC
0.9VCC
74HCT540-Q100
1.3 V
1.3 V
0.1VCC
0.9VCC
74HC_HCT540_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
10 of 16
74HC540-Q100; 74HCT540-Q100
NXP Semiconductors
Octal buffer/line driver; 3-state; inverting
9,
W:
QHJDWLYH
SXOVH
90
9
WI
WU
WU
WI
9,
SRVLWLYH
SXOVH
9
90
90
90
W:
9&&
9&&
*
9,
92
5/
6
RSHQ
'87
&/
57
DDG
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistance
S1 = Test selection switch
Fig 8.
Table 9.
Test circuit for measuring switching times
Test data
Type
Input
VI
tr, tf
CL
RL
tPHL, tPLH
tPZH, tPHZ
tPZL, tPLZ
74HC540-Q100
VCC
6 ns
15 pF, 50 pF
1 k
open
GND
VCC
74HCT540-Q100
3V
6 ns
15 pF, 50 pF
1 k
open
GND
VCC
74HC_HCT540_Q100
Product data sheet
Load
S1 position
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
11 of 16
74HC540-Q100; 74HCT540-Q100
NXP Semiconductors
Octal buffer/line driver; 3-state; inverting
12. Package outline
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Package outline SOT163-1 (SO20)
74HC_HCT540_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
12 of 16
74HC540-Q100; 74HCT540-Q100
NXP Semiconductors
Octal buffer/line driver; 3-state; inverting
13. Abbreviations
Table 10.
Abbreviations
Acronym
Description
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
TTL
Transistor-Transistor Logic
MIL
Military
MM
Machine Model
14. Revision history
Table 11.
Revision history
Document ID
Release date
74HC_HCT540_Q100 v.2 20160301
Modifications:
•
Product data sheet
Change notice
Supersedes
Product data sheet
-
74HC_HCT540_Q100 v.1
Type numbers 74HC540N-Q100 and 74HCT540N-Q100 (SOT146-1) removed.
74HC_HCT540_Q100 v.1 20130121
74HC_HCT540_Q100
Data sheet status
Product data sheet
-
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
-
© NXP Semiconductors N.V. 2016. All rights reserved.
13 of 16
74HC540-Q100; 74HCT540-Q100
NXP Semiconductors
Octal buffer/line driver; 3-state; inverting
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HC_HCT540_Q100
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
14 of 16
NXP Semiconductors
74HC540-Q100; 74HCT540-Q100
Octal buffer/line driver; 3-state; inverting
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
74HC_HCT540_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
15 of 16
NXP Semiconductors
74HC540-Q100; 74HCT540-Q100
Octal buffer/line driver; 3-state; inverting
17. Contents
1
2
3
4
5
5.1
5.2
6
7
8
9
10
11
12
13
14
15
15.1
15.2
15.3
15.4
16
17
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
Functional description . . . . . . . . . . . . . . . . . . . 5
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Recommended operating conditions. . . . . . . . 6
Static characteristics. . . . . . . . . . . . . . . . . . . . . 7
Dynamic characteristics . . . . . . . . . . . . . . . . . . 8
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13
Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Contact information. . . . . . . . . . . . . . . . . . . . . 15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2016.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 1 March 2016
Document identifier: 74HC_HCT540_Q100