MIC4609 600V 3-Phase MOSFET/IGBT Driver Features General Description • Gate Drive Supply Voltage up to 20V • Overcurrent Protection with Programmable Restart Delay • 1A Gate Drivers • Dual (HI/LI) Inputs per Phase • Fault Signal Asserts on Overcurrent and VDD UVLO • TTL Input Thresholds • 300 ns Typical Input Filtering Time • Shoot-Through Protection • Low-Power Consumption • Supply Undervoltage Protection • -40°C to +125°C Junction Temperature Range The MIC4609 is a 600V 3-phase MOSFET/IGBT driver. The MIC4609 features a 300 ns typical input filtering time to prevent unwanted pulses and a 550 ns of propagation delay. The MIC4609 has TTL input thresholds. Typical Applications • • • • 3-Phase Motor Drive Field-Oriented Control (FOC) White Goods Appliances Brushless DC Fans 2016 Microchip Technology Inc. The robust operation of the MIC4609 ensures that the outputs are not affected by supply glitches, High Side (HS) ringing below ground, or HS slewing with high-speed voltage transitions. Undervoltage protection is provided on both the low-side and high-side drivers. The MIC4609 is available in a 28-pin wide SOIC package. The MIC4609 has an operating junction temperature range of -40°C to +125°C. Package Type MIC4609 28-Pin SOICW AHB AHO VDD AHI BHI 1 28 2 27 3 26 AHS CHI ALI 4 25 NC 5 24 BLI CLI FAULT ISNS EN 6 23 7 22 8 21 BHB BHO BHS NC 9 20 10 19 RCIN VSS 11 18 12 17 COM 13 16 NC ALO CLO 14 15 BLO CHB CHO CHS DS20005531A-page 1 MIC4609 Functional Block Diagram MIC4609 – Top Level Circuit VDD UVLO VDD VDD AHB UVLO AHO UVLO EN AHI Phase A Drive Circuit AHS AHI Input Filter & Anti-Shoot-Through VSS ALO ALI COM ALI VSS BHB VDD BHO UVLO EN BHI Phase B Drive Circuit BHS BHI Input Filter & Anti-Shoot-Through VSS BLO BLI COM BLI VSS CHB VDD CHO UVLO EN CHI Phase C Drive Circuit CHS CHI Input Filter & Anti-Shoot-Through VSS CLO CLI COM CLI COM VSS COM UVLO S + ISNS Input Blanking - Q Latch R FAULT _ Q VISNS VSS IRCIN RCIN + VRCIN+ EN Input Filter EN VSS VSS VSS DS20005531A-page 2 2016 Microchip Technology Inc. MIC4609 Functional Block Diagram MIC4609 – Phase x Drive Circuit xHB VDD UVLO DRIVER UVLO EN xHO LEVEL SHIFT xHS xHI xLI S Q R Q DRIVER xLO COM Note: The x in the suffix of a pin name designates any of the three phases, e.g., xHS refers to either AHS, BHS or CHS. 2016 Microchip Technology Inc. DS20005531A-page 3 MIC4609 DS20005531A-page 4 Typical Application Circuit MIC4609 – 300V, 3-Phase Motor Driver VDD VCC R3 D3 R2 D2 R1 D1 V DD 300V SUPPLY Q4 Q2 AHB Q6 AHO FAULT AHS C1 EN BHB BHO AHI C2 BHS ALI Controller MIC4609 CHB CHO BHI CHS C3 BLI ALO BLO CHI Q3 Q1 CLO CLI ISNS RCIN 2016 Microchip Technology Inc. V SS COM CDLY RS Q5 MIC4609 1.0 Operating Ratings (1) ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings † Supply Voltage (VDD, VXHB - VXHS) .................. -0.3V to +25V Input Voltages (VXLI, VXHI, VEN) .......................... -0.3V to VDD Voltage on LO (VXLO) .......................................... -0.3V to VDD Voltage on HO (VXHO) .................................VHS - 0.3V to VHB Voltage on HS .................................................... -5V to +630V Voltage on HB ...............................................................+655V Storage Temperature ...................................-60°C to +150°C ESD Rating HBM .......................................................................... 2kV CDM ...................................................................... 1.5 kV Supply Voltage (VDD) ....................................... +10V to +20V Voltage on xHS (continuous) ............................. -1V to +600V Voltage on xHS (repetitive transient) ................. -5V to +600V HS Slew Rate .............................................................. 50V/ns Voltage on xHB .............................VXHS + 10V to VXHS + 20V and/or ........................................VDD - 1V to VDD + 600V Junction Temperature (TJ) ........................... -40°C to +125°C Junction Thermal Resistance (JA).............. -40°C to +125°C SOIC Wide 28LD ................................................ 53°C/W Note 1: The device is not guaranteed to function outside its operating rating. † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. AC/DC ELECTRICAL CHARACTERISTICS (Note 1, 2) Electrical Specifications: Unless otherwise indicated, VDD = VxHB = 20V, VEN = 5V, VSS = VxHS = 0V; No load on xLO or xHO, TA = +25°C. Bold values indicate -40°C TJ +125°C. Parameter Sym. Min. Typ. Max. Unit Conditions VDD Quiescent Current IDD — 150 250 µA xLI = xHI = 0V VDD Shutdown Current IDDSH — 0.1 10 µA EN = 0V with HS = floating or ground VDD Operating Current IDDO — 240 350 µA f = 20 kHz Total xHB Quiescent Current IxHB — 81 180 µA xLI = xHI = 0V or xLI = 0V and xHI = 5V Total xHB Operating Current IxHBO — 600 1500 µA f = 20 kHz High-Side Leakage Current ILxHB — 1 10 µA VxHB = VxHS = 600V Low-Level Input Voltage VIL — — 0.8 V High-Level Input Voltage VIH 2.2 — — V VHYS — 0.2 — V RI 100 370 500 k Supply Current Input (TTL: xLI, xHI, EN) Input Voltage Hysteresis Input Pull-Down Resistance For xLI and xHI only (Note 3) Undervoltage Protection VDD Falling Threshold VDDR 7 8 9 V VDD Threshold Hysteresis VDDH — 0.5 — V xHB Falling Threshold VxHBR 7 8 9 V xHB Threshold Hysteresis VxHBH — 0.5 — V Note 1: 2: 3: Specification for packaged product only. The x in the suffix of a pin name designates any of the three phases, e.g., xHS refers to either AHS, BHS or CHS. Enable resistance is typical only and is not production tested. 2016 Microchip Technology Inc. DS20005531A-page 5 MIC4609 AC/DC ELECTRICAL CHARACTERISTICS (CONTINUED) (Note 1, 2) Electrical Specifications: Unless otherwise indicated, VDD = VxHB = 20V, VEN = 5V, VSS = VxHS = 0V; No load on xLO or xHO, TA = +25°C. Bold values indicate -40°C TJ +125°C. Parameter Sym. Min. Typ. Max. Unit VISNS+ 420 520 650 mV Conditions Overcurrent Protection Rising Overcurrent Threshold ISNS Pin Blanking Time ISNS-to-Gate Propagation Delay tISNS_BLK 270 370 470 ns tISNS_PROP 400 650 900 ns Fault Circuit Fault Pin Output Low Voltage VOLF — — 0.8 V VRCIN+ — 5 — V VRCIN_HYS — 0.6 — V RCIN Pin Current Source IRCIN 3 5 7 µA VRCIN = 0V Fault Clear Time tFCL 0.5 1 2 ms CRCIN = 1nF VxOLL — 0.5 0.9 V IxLO = 50 mA High-Level Output Voltage VxOHL — 0.6 0.9 V IxLO = -50 mA VxOHL = VDD - VxLO Peak Sink Current IxOHL — 1 — A VxLO = 0V Peak Source Current IxOLL — 1 — A VxLO = 20V VxOLH — 0.5 0.9 V IxHO = 50 mA High-Level Output Voltage VxOHH — 0.6 0.9 V IxHO = -50 mA VxOHH = VxHB - VxHO Peak Sink Current IxOHH — 1 — A VxHO = 0V Peak Source Current IxOLH — 1 — A VxHO = 20V tON 300 600 700 ns CL = 1 nF tOFF 300 550 700 ns CL = 1 nF Turn-On Rise Time tR — 20 60 ns CL = 1 nF Turn-Off Fall Time tF — 20 60 ns CL = 1 nF Input Filtering Time tFLTR 200 300 480 ns xLI, xHI, EN tD 200 300 450 ns CL = 1 nF tDLYM — 50 — ns CL = 1 nF EN-to-Gate Shutdown Delay tEN_OFF 450 650 750 ns CL = 1 nF Output Pulse Width Matching tPWN — 50 — ns tPW > 1 µs CL = 1 nF Rising VCIN Pin Threshold VCIN Hysteresis VISNS = 1V, IFAULT = 1 mA LO Gate Driver Low-Level Output Voltage HO Gate Driver Low-Level Output Voltage Switching Specifications Turn-On Propagation Delay Turn-Off Propagation Delay Dead Time Delay Matching Note 1: 2: 3: Specification for packaged product only. The x in the suffix of a pin name designates any of the three phases, e.g., xHS refers to either AHS, BHS or CHS. Enable resistance is typical only and is not production tested. DS20005531A-page 6 2016 Microchip Technology Inc. MIC4609 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, all parameters apply with 10V VDD 20V. Parameters Sym. Min. Typ. Max. Units Specified Temperature Range (Note 1) TA -40 — +125 °C Operating Temperature Range TA -40 — +125 °C Storage Temperature Range TS -60 — +150 °C JA — 53 — °C/W Conditions Temperature Ranges Thermal Package Resistances Thermal Resistance, 28LD SOICW Note 1: Operation in this range must not cause TJ to exceed Maximum Junction Temperature (+125°C). 2016 Microchip Technology Inc. DS20005531A-page 7 MIC4609 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25°C with 10V VDD 20V. 50 VHS = GND EN = VDD 120 VHB Quiescent Current (μA) VDD Quiescent Current (μA) 140 125°C 100 80 60 25°C -40°C 40 20 10 11 12 13 FIGURE 2-1: VDD Voltage. 14 15 16 VDD (V) 17 18 19 VDD Quiescent Current vs. VHB = 14V 20 10 VHB = 10V -25 0 FIGURE 2-4: Temperature. 25 50 Temperature (°C) 75 100 125 VHB Quiescent Current vs. VDD+HB Shutdown Current (μA) 10 VDD = 20V 120 100 80 60 VDD = 15V 40 VDD = 10V 20 VHS = GND EN = VDD 0 -50 -25 0 FIGURE 2-2: Temperature. 25 50 Temperature (°C) 75 100 VDD Quiescent Current vs. 0.1 HI = LI = 0V VHS = Floating EN = 0V VDD = VHB 125°C -40°C 0.01 25°C 0.001 10 11 12 13 14 15 16 VDD+HB (V) 17 18 19 20 VDD+HB Shutdown Current FIGURE 2-5: vs. Voltage. 10 VHS = GND EN = VDD 40 125°C 30 20 25°C 10 -40°C 0 10 1 125 VDD+HB Shutdown Current (μA) VDD Quiescent Current (μA) VHB = 20V 30 -50 20 140 VHB Quiescent Current (μA) 40 0 0 50 VHS = GND EN = VDD 12 14 16 18 20 1 0.1 VDD = 15V 0.01 0.001 VDD = 10V 0.0001 -50 -25 VHB (V) FIGURE 2-3: VHB Voltage. DS20005531A-page 8 VHB Quiescent Current vs. VDD = 20V FIGURE 2-6: vs. Temperature. 0 25 50 75 Temperature (°C) HI = LI = 0V VHS = Floating EN = 0V VDD = VHB 100 125 VDD+HB Shutdown Current 2016 Microchip Technology Inc. MIC4609 Note: Unless otherwise indicated, TA = +25°C with 10V VDD 20V. 200 HI = LI = 0V VHS= GND EN = 0V VDD= VHB 100 VHB Operating Current (μA) VDD+HB Shutdown Current (μA) 120 25ºC 125ºC 80 60 40 -40ºC 20 160 -40ºC 140 120 25ºC 100 80 60 40 125ºC 20 0 0 10 11 12 13 14 15 16 17 18 19 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Frequency (kHz) VDD+HB (V) FIGURE 2-7: vs. Voltage. VDD+HB Shutdown Current FIGURE 2-10: VHB Operating Current vs. Frequency – One Phase. 25 120 VDD = 20V VDD = 15V 100 RON Sink (Ω) VDD+HB Shutdown Current (μA) VHB = VDD VHS = 0V CL = 0 nF 180 80 60 40 20 0 -50 -25 0 25 50 75 100 20 125ºC 25ºC 15 10 HI = LI = 0V VHS = GND EN = 0V VDD = VHB VDD = 10V IHO = 50 mA VHS = GND EN = VHB = VDD -40ºC 5 125 10 11 12 13 Temperature (°C) 200 180 160 140 120 100 80 60 40 20 0 VDD+HB Shutdown Current 25 VHB = VDD VHS = 0V CL = 0 nF 125ºC 25ºC -40ºC 15 16 VDD (V) 17 18 19 20 FIGURE 2-11: HO Output Sink ON-Resistance vs. VDD. IHO = 50 mA VHS = GND EN = VHB = VDD 20 RON Sink (Ω) VDD Operating Current (μA) FIGURE 2-8: vs. Temperature. 14 VDD = 10V VDD = 15V 15 10 VDD = 20V 5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Frequency (kHz) FIGURE 2-9: Frequency. VDD Operating Current vs. 2016 Microchip Technology Inc. -50 -25 0 25 50 Temperature (°C) 75 100 125 FIGURE 2-12: HO Output Sink ON-Resistance vs. Temperature. DS20005531A-page 9 MIC4609 Note: Unless otherwise indicated, TA = +25°C with 10V VDD 20V. 25 20 ILO = 50 mA VHS = GND EN = VHB = VDD 125ºC RON Source (Ω) RON Sink (Ω) 20 25ºC 15 10 IHO = -50 mA VHS = GND EN = VHB = VDD VDD = 10V 15 10 VDD = 20V 5 VDD = 15V -40ºC 0 5 10 11 12 13 14 15 16 VDD (V) 17 18 19 FIGURE 2-13: LO Output Sink ON-Resistance vs. VDD. RON Sink (Ω) 20 -25 0 25 50 Temperature (°C) 75 25 ILO = 50 mA VHS = GND EN = VHB = VDD VDD = 15V 125 ILO = -50 mA VHS = GND EN = VHB = VDD 125ºC VDD = 10V 15 10 100 FIGURE 2-16: HO Output Source ON-Resistance vs. Temperature. RON Source (Ω) 25 -50 20 VDD = 20V 5 20 25ºC 15 10 -40ºC 0 5 -50 -25 0 25 50 Temperature (°C) 75 100 125 20 RON Source (Ω) RON Source (Ω) 15 25 IHO = -50 mA VHS = GND EN = VHB = VDD 125ºC 20 11 12 13 14 15 VDD (V) 16 17 18 19 20 FIGURE 2-17: LO Output Source ON-Resistance vs. VDD. FIGURE 2-14: LO Output Sink ON-Resistance vs. Temperature. 25 10 25ºC 10 ILO = -50 mA VHS = GND EN = VHB = VDD VDD = 10V VDD = 15V 15 10 VDD = 20V 5 -40ºC 5 10 11 12 13 14 15 16 VDD (V) 17 18 FIGURE 2-15: HO Output Source ON-Resistance vs. VDD. DS20005531A-page 10 19 20 0 -50 -25 0 25 50 75 Temperature (°C) 100 125 FIGURE 2-18: LO Output Source ON-Resistance vs. Temperature. 2016 Microchip Technology Inc. MIC4609 Note: Unless otherwise indicated, TA = +25°C with 10V VDD 20V. 9 VxHS = 0V VDD rising 8.6 8.4 VDD falling tR (ns) UVLO Threshold (V) 8.8 VHB rising 8.2 8 7.8 VHB falling 7.6 7.4 -50 -25 0 25 50 Temperature (°C) 700 680 660 640 620 600 580 560 540 520 500 TA = 25°C VHS = 0V CL = 1 nF LI to LO rising HI to HO rising 11 12 13 14 15 VDD (V) 16 17 18 19 tR (ns) Delay (ns) LI to LO falling 650 600 550 HI to HO rising 500 -25 FIGURE 2-21: Temperature. 0 25 50 75 Temperature (°C) 100 Propagation Delay vs. 2016 Microchip Technology Inc. 13 125 14 15 16 VDD (V) 17 18 19 20 HO Rise Time vs. VDD VHS = 0V CL = 1 nF 25°C -40°C 11 12 13 FIGURE 2-23: Voltage. LI to LO rising -50 -40°C 125°C 10 VDD = 10V VHS = 0V CL = 1 nF HI to HO falling 25°C 70 65 60 55 50 45 40 35 30 25 20 15 10 20 Propagation Delay vs. VDD 700 125°C FIGURE 2-22: Voltage. HI to HO falling FIGURE 2-20: Voltage. 750 125 VDD/VHB ULVO vs. LI to LO falling 10 800 100 tF (ns) Delay (ns) FIGURE 2-19: Temperature. 75 70 V = 0V 65 CHS= 1 nF L 60 55 50 45 40 35 30 25 20 15 10 10 11 12 70 65 60 55 50 45 40 35 30 25 20 15 10 14 15 16 VDD (V) 17 18 19 20 HO Fall Time vs. VDD VHS = 0V CL = 1 nF 125°C 25°C -40°C 10 11 12 FIGURE 2-24: Voltage. 13 14 15 16 VDD (V) 17 18 19 20 LO Rise Time vs. VDD DS20005531A-page 11 MIC4609 70 65 60 55 50 45 40 35 30 25 20 15 10 450 Dead Time (ns) 25°C -40°C HO fall to LO rise 400 350 300 LO fall to HO rise 250 200 11 12 13 14 15 VDD (V) FIGURE 2-25: Voltage. 70 65 60 55 50 45 40 35 30 25 20 15 10 16 17 18 19 20 LO Fall Time vs. VDD 10 11 12 13 14 15 16 VDD (V) 17 18 19 20 Dead Time vs. VDD Voltage. FIGURE 2-28: 500 VDD = 10V VHS = 0V CL = 1 nF VDD = 10V VHS = 0V CL = 1 nF 450 HO fall HO fall to LO rise LO fall LO rise HO rise 400 350 300 LO fall to HO rise 250 200 -50 -25 0 25 50 75 Temperature (°C) 100 125 -25 0 25 50 Temperature (°C) 75 HO fall HO fall to LO rise 400 350 300 250 LO rise 125 VDD = 20V VHS = 0V CL = 1 nF 450 HO rise 100 Dead Time vs. Temperature 500 VDD = 20V VHS = 0V CL = 1 nF Dead Time (ns) 70 65 60 55 50 45 40 35 30 25 20 15 10 -50 FIGURE 2-29: (VDD = 10V). FIGURE 2-26: Rise/Fall Time vs. Temperature (VDD = 10V). tR/tF (ns) TA = 25°C VHS = 0V CL = 1 nF 125°C 10 tR/tF (ns) 500 VHS = 0V CL = 1 nF Dead Time (ns) tF (ns) Note: Unless otherwise indicated, TA = +25°C with 10V VDD 20V. LO fall to HO rise LO fall 200 -50 -25 0 25 50 75 Temperature (°C) FIGURE 2-27: Rise/Fall Time vs. Temperature (VDD = 20V). DS20005531A-page 12 100 125 -50 -25 FIGURE 2-30: (VDD = 20V). 0 25 50 75 Temperature (°C) 100 125 Dead Time vs. Temperature 2016 Microchip Technology Inc. MIC4609 Note: Unless otherwise indicated, TA = +25°C with 10V VDD 20V. 0.5 700 OC Threshold (V) 0.49 Propagation Delay (ns) VHS = 0V CL = 0 nF 0.495 125°C 0.485 0.48 0.475 25°C 0.47 0.465 0.46 -40°C 0.455 680 VHS = 0V CL = 0 nF 660 VDD = 20V 640 620 600 VDD = 15V 580 VDD = 10V 560 0.45 10 11 12 13 FIGURE 2-31: VDD Voltage. 14 15 16 VDD (V) 17 18 19 20 Overcurrent Threshold vs. -50 -25 0 25 50 Temperature (°C) 75 100 125 FIGURE 2-34: Overcurrent Propagation Delay vs. Temperature. 0.5 OC Threshold (V) 0.495 0.49 VDD = 20V 0.485 0.48 0.475 0.47 VDD = 15V 0.465 0.46 VDD = 10V 0.455 VHS = 0V CL = 0 nF 0.45 -50 -25 0 FIGURE 2-32: Temperature. Propagation Delay (ns) 700 680 25 50 75 Temperature (°C) 100 125 Overcurrent Threshold vs. VHS = 0V CL = 0 nF 125°C 660 -40°C 640 620 25°C 600 580 560 10 11 12 13 14 15 16 VDD (V) 17 18 19 20 FIGURE 2-33: Overcurrent Propagation Delay vs. VDD Voltage. 2016 Microchip Technology Inc. DS20005531A-page 13 MIC4609 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed Table 3-1. TABLE 3-1: PIN FUNCTION TABLE SOICW-28LD Symbol I/O 1 VDD Power 2 AHI IN A-Phase High-Side Drive Input 3 BHI IN B-Phase High-Side Drive Input 4 CHI IN C-Phase High-Side Drive Input 5 ALI IN A-Phase Low-Side Drive Input 6 BLI IN B-Phase Low-Side Drive Input 7 CLI IN C-Phase Low-Side Drive Input 8 FAULT OUT 9 ISNS IN Current Sense Input for Overcurrent Shutdown 10 EN IN Enable Input Logic high on the Enable pin results in normal operation. Logic low forces the device to enter Shutdown mode. 11 RCIN OUT Overcurrent Fault Clear Delay Pin Connect to an external capacitor to set the fault clear delay. 12 VSS GND Logic Ground Pin 13 COM — 14 CLO OUT C-Phase Low-Side Drive Output Connect to the gate of the external low-side power MOSFET or IGBT. 15 BLO OUT B-Phase Low-Side Drive Output Connect to the gate of the external low-side power MOSFET or IGBT. 16 ALO OUT A-Phase Low-Side Drive Output Connect to the gate of the external low-side power MOSFET or IGBT. 17, 21, 25 NC — No Connect 18 CHS — C-Phase High-Side Drive Return Connection Connect to the emitter or source of the external high-side power device. Connect the bootstrap capacitor between this pin and the CHB pin. 19 CHO OUT 20 CHB Power 22 BHS — 23 BHO OUT DS20005531A-page 14 Description Input Supply for Gate Drivers Decouple this pin to VSS with a > 2.2 µF capacitor. Connect anode of bootstrap diodes to this pin. Fault Output Open drain asserts low to indicate Overcurrent or VDD Undervoltage condition. Low-Side Driver Return Pin C-Phase High-Side Drive Output Connect to the gate of the external high-side power MOSFET or IGBT. C-Phase High-Side Bootstrap Supply External bootstrap capacitor is required. Connect the bootstrap capacitor between this pin and CHS. Connect to the anode of the external bootstrap diode. B-Phase High-Side Drive Return Connection Connect to the emitter or source of the external high-side power device. Connect the bootstrap capacitor between this pin and the BHB pin. B-Phase High-Side Drive Output Connect to the gate of the external high-side power MOSFET or IGBT. 2016 Microchip Technology Inc. MIC4609 TABLE 3-1: PIN FUNCTION TABLE (CONTINUED) SOICW-28LD Symbol I/O 24 BHB Power 26 AHS — 27 AHO OUT 28 AHB Power 2016 Microchip Technology Inc. Description B-Phase High-Side Bootstrap Supply External bootstrap capacitor is required. Connect the bootstrap capacitor between this pin and BHS. Connect to the anode of the external bootstrap diode. A-Phase High-Side Drive Return Connection Connect to the emitter or source of the external high-side power device. Connect the bootstrap capacitor between this pin and the AHB pin. A-Phase High-Side Drive Output Connect to the gate of the external high-side power MOSFET or IGBT. A-Phase High-Side Bootstrap Supply External bootstrap capacitor is required. Connect the bootstrap capacitor between this pin and AHS. Connect to the anode of the external bootstrap diode. DS20005531A-page 15 MIC4609 4.0 FUNCTIONAL DESCRIPTION The UVLO circuits are illustrated in the functional block diagrams. The low-side UVLO circuit, Functional Block Diagram MIC4609 – Phase x Drive Circuit, monitors the voltage between the VDD and VSS pins. The circuit keeps all the drivers off when VDD is less than the UVLO threshold voltage. The MIC4609 is a noninverting, 600V three-phase IGBT/MOSFET driver designed to independently drive six IGBTs or MOSFETs in a three-phase bridge. The MIC4609 offers a wide 10V-to-20V VDD operating supply range with six independent inputs (TTL or 3.3V CMOS compatible). The three high-side UVLO circuits, shown in Typical Application Circuit MIC4609 – 300V, 3-Phase Motor Driver, monitor the voltage between the xHB and xHS pins. The circuit keeps its respective high-side output off when VHB - VHS is less than the UVLO threshold voltage. The driver is comprised of six input buffers with hysteresis, four independent UVLO circuits (three high-side monitoring the HB voltage and one low-side monitoring the VDD voltage), and six output drivers. The high-side output drivers utilize a high-speed level-shifting circuit that is referenced to the HS pin. An overcurrent protection circuit turns off all outputs during an overcurrent fault. 4.1 4.2 Startup and UVLO The startup sequence is illustrated in Figure 4-1. As VDD rises above an unspecified threshold, VT, the internal circuitry becomes active, the FAULT pin asserts low and the UVLO circuitry begins to monitor VDD. When the rising VDD reaches the UVLO threshold, a current source begins charging the RCIN pin's external capacitor until it reaches the RCIN delay threshold. The output drivers are enabled once the RCIN threshold is reached and the EN pin is asserted high. UVLO Protection The UVLO circuits force the driver's outputs low until the supply voltage exceeds the UVLO threshold. Hysteresis in the UVLO circuits prevents system noise and finite circuit impedance from causing chatter during turn-on. UVLO Rising Level (VDDR) UVLO Falling Level VDD VDD falls below UVLO threshold RCIN rises above threshold EN rise enables analog ckts. EN fall shuts down all ckts. RCIN rises above threshold RCIN Delay Threshold UVLO fall starts RCIN FAULT VDD rises above VDDR RCIN VDD rises above VT EN UVLO (Internal) Normal Operation FIGURE 4-1: DS20005531A-page 16 Startup and Fault Timing Diagram. 2016 Microchip Technology Inc. MIC4609 TABLE 4-1: OPERATIONAL TRUTH TABLE ULVO (1, 2) Outputs (3, 4) Condition xHI xLI EN HB ULVO VDD ULVO xHO xLO Disabled X X L X X L L VDD ULVO X X X X L L L VHB ULVO X L or H H L H L L or H H H H H L L H H H L L Switching Note 1: 2: 3: 4: 4.3 L H H H H L H H L H H H H L L L H H H L L UVLO = H when VDD > UVLO threshold UVLO = L when VDD < UVLO threshold xHO and xLO remain low if both xHI and xLI are low when the VDD rises above the UVLO threshold or when the EN pin is asserted high. Normal switching operation begins when one of the inputs changes state from L to H. Anti-shoot-through circuit prevents a high on both outputs simultaneously. Enable Inputs There is one external Enable pin that controls all three phases. A logic high on the enable pin (EN) allows for startup of all phases and normal operation. Conversely, when a logic low is applied on the Enable pin, all phases turn off and the device enters a low current Shutdown mode. All outputs (xHO and xLO) are pulled low when EN is low. The EN pin is internally pulled down. Leaving the pin open disables the part. 2016 Microchip Technology Inc. DS20005531A-page 17 MIC4609 4.4 Input Stage An internal pull-down resistor is connected to the xHI and xLI pins. This pulls the driver output pins low if the inputs are disconnected or left floating. A small amount of hysteresis is programmed into the input to prevent false triggering of the output. In addition, each input has a minimum pulse-width filter for additional noise immunity protection. The input pulse width must exceed the tFLTR time before the outputs will change state. Refer to the Electrical Characteristics table and Figure 4-3 for additional information. The xHI and xLI pins are referenced to the COM pin and have a CMOS/TTL compatible input range. The input threshold voltage is independent of the VDD supply. The input pin voltage must not exceed the VDD pin voltage. The voltage state of the input signal(s) does not change the quiescent current draw of the driver. The input stage block diagram is shown in Figure 4-2. Min PW Filter xHI/xLI FIGURE 4-2: Input Stage Block Diagram. Input and output pulse widths (tPW) are equal tFLTR tPW1 tPW tPW > tFLTR xLI, xHI tPW1 < tFLTR tOFF tFLTR xLO, xHO tON tPW tFLTR tFLTR tPW1 tPW xLI, xHI tPW > tFLTR tPW1 < tFLTR xLO, xHO tOFF tFLTR tON tPW FIGURE 4-3: DS20005531A-page 18 Minimum Pulse-Width Diagram. 2016 Microchip Technology Inc. MIC4609 4.5 Dead Time and Anti-Shoot-Through Protection Shoot-through occurs when both the high and low-side IGBTs/MOSFETs of a particular phase are ON at the same time. The inputs of each phase use anti-shoot-through circuitry to prevent this condition from occurring. If both the HI and LI inputs of a phase go high, both outputs (HO and LO) of that phase go low. In addition to anti-shoot-through circuitry, a fixed "dead-time" delay is added to the input-to-output propagation delay. This allows the IGBTs/MOSFETs in a particular phase to fully turn off before the other turns on. tR tF 90% 90% 10% xHI xLI 10% tPW 50% 50% VIL xLO VIH tOFF tON 90% 10% 90% tD xHO FIGURE 4-4: tD 10% Dead Time, Propagation Delay, and Rise/Fall-Time Diagram. 2016 Microchip Technology Inc. DS20005531A-page 19 MIC4609 4.6 Low-Side Driver Output Stage The low-side driver, shown in Figure 4-5, is designed to drive an N-channel MOSFET or IGBT. The driver is referenced to the COM pin, which can be floating with respect to ground. The COM reference gives the gate drive currents a return path without having to flow through the current sense resistor. Low driver impedances allow the external IGBT/MOSFET to be turned on and off quickly. The rail-to-rail drive capability of the output ensures a low VCE or RDSON from the external power device. When driving the external IGBT on, the driver's internal P-channel MOSFET is turned on and VDD is applied to the gate of the external IGBT. To turn off the external IGBT, the driver's N-channel FET is turned on, which discharges the external IGBT's gate. 4.7 High-Side Driver and Bootstrap Circuit The High-Side driver is designed to drive a floating N-channel FET or IGBT, whose source/emitter terminal is referenced to the HS pin. A simplified diagram of the high-side driver section is shown in Figure 4-6. HV VDD Level Shift DBST xHB CB xHO RG xHS VDD DCLAMP RHS xHS Node FIGURE 4-6: High-Side Driver and Bootstrap Circuit Block Diagram. xLO RG COM FIGURE 4-5: Diagram. DS20005531A-page 20 Low-Side Driver Block A low-power, high-speed, level-shifting circuit isolates the low-side (VSS pin) referenced circuitry from the high-side (xHS pin) referenced driver. Power to the high-side driver and UVLO circuit is supplied by the bootstrap capacitor (CB) while the voltage level of the xHS pin is shifted high. The bootstrap circuit consists of an external diode, DBST, and an external capacitor, CB. In a typical application, such as the motor driver shown in Figure 4-7 (Phase A illustrated only), the AHS pin is at ground potential while the low-side MOSFET is ON. The internal diode charges capacitor CB to VDD - VF during this time (where VF is the forward voltage drop of the internal diode). After the low-side MOSFET is turned off and the AHO pin turns on, the voltage across capacitor CB is applied to the gate of the high-side external MOSFET. As the high-side MOSFET turns on, voltage on the AHS pin rises with the source of the high-side MOSFET until it reaches VDD. As the AHS and AHB pins rise, the internal diode is reverse biased, preventing capacitor CB from discharging. During this time, the high-side MOSFET is kept ON by the voltage across capacitor CB. 2016 Microchip Technology Inc. MIC4609 VIN DBST VIN CB VDD AHB CVDD HI Phase B AHO RG Level shift AHS RHS Phase A M DCLAMP LI ALO VSS Phase C RG COM RSNS FIGURE 4-7: 4.8 MIC4609 Motor Driver Typical Application – Phase A. Overcurrent Protection Circuitry The MIC4609 provides overcurrent protection for the 3-phase bridge. It consists of: • a comparator that senses the voltage across a current-sense resistor • a latch and timer that keep all gate drivers off during a fault • an open-drain FAULT pin that pulls low during the fault. Figure 4-8 illustrates the overcurrent protection sequence. When an overcurrent condition is detected, the FAULT pin is pulled low and a latch disables the gate drive outputs for a time determined by the RCIN pin capacitor. After the delay circuit times out, the latch is reset, the FAULT pin is deasserted to a high impedance state and the gate drive outputs are re-enabled. 2016 Microchip Technology Inc. DS20005531A-page 21 MIC4609 Blanking Time ISNS falls below threshold ISNS Threshold ISNS RCIN Threshold RCIN Normal Operation Normal Operation OC Fault FAULT FIGURE 4-8: 4.8.1 Overcurrent Fault Sequence. ISNS The ISNS pin may be used to monitor motor winding currents. The measurement is referenced to the VSS pin and can sense the voltage across a low-side current sense resistor or it may be connected to a current sense transformer. The current sense resistor is typically connected between the source pins (MOSFET) or emitter pins (IGBT) of all three low-side switches and power ground. If the peak voltage on the ISNS pin exceeds the VISNS threshold, it will cause all six outputs to latch off. A blanking circuit on the ISNS comparator output prevents noise from falsely tripping the overcurrent circuit. The ISNS pin is internally pulled down to VSS but may be externally connected to VSS ground for improved noise immunity if the overcurrent feature is not used. 4.8.2 RCIN A capacitor connected to the RCIN pin determines the amount of time the gate drive outputs are latched off before they can be restarted. During normal operation, the RCIN pin is internally pulled low. Once an overcurrent condition is detected, the RCIN pin capacitor is charged up by an internal current source until the voltage reaches the VRCIN+ threshold and the latch is reset. The outputs are then enabled. DS20005531A-page 22 The delay time can be approximated by applying Equation 4-1. EQUATION 4-1: C RCIN VRCIN+ t DLY = ----------------------------------------I RCIN Where: CRCIN = External capacitance on the RCIN pin IRCIN = RCIN pin current source (typically 0.44 µA) VRCIN+ = Internal comparator threshold 4.8.3 FAULT This open-drain output is asserted low for an overcurrent condition or when the VDD voltage is below the UVLO threshold. It will de-assert to a high-impedance state once the VDD rises above the UVLO threshold or when the RCIN pin voltage has reached the VRCIN+ threshold. During normal operation, the internal pull-down MOSFET of the pin is high impedance. A pull-up resistor must be connected to this pin. 2016 Microchip Technology Inc. MIC4609 5.0 APPLICATION INFORMATION 5.1 Bootstrap Circuit The high-side gate drive cannot be operated continuously (100% duty cycle). It must be periodically turned off to refresh/recharge the bootstrap capacitor, CB. There are two separate requirements to consider when choosing the bootstrap capacitor value: EQUATION 5-2: • IGBT or MOSFET gate charge • Duration of the high-side switch on-time The high-side bootstrap circuit for Phase A is illustrated in Figure 5-1. DBST CVDD AHI AHB CB *RCB AHO RG Level shift AHS RHS DCLAMP ALI ALO RG COM * Optional Components FIGURE 5-1: MIC4609 – Bootstrap Circuit. The bootstrap capacitor voltage drops each time it delivers charge to turn on the IGBT. The voltage drop depends on the gate charge required by the IGBT. Most IGBT and MOSFET specifications contain gate charge versus VGE or VGS voltage information or graphs. Based on this information and a recommended VHB of 0.1V to 0.5V, the minimum value of bootstrap capacitance is calculated by applying Equation 5-1. EQUATION 5-1: Q GATE C B ----------------V HB Where: QGATE = Total gate charge at VHB VHB = Voltage drop at the HB pin After the high-side switch has turned on, the bootstrap capacitor will continue to discharge due to leakage currents in the bootstrap capacitor, the IGBT/MOSFET gate-to-source and the driver (HS-pin-to-ground leakage). 2016 Microchip Technology Inc. tON I discharge C B ----------------------------------V HB Where: tON = Maximum ON-time of the high-side switch VHB = Voltage drop at the HB pin Idischarge = Total discharge current at the HB pin (capacitor, IGBT/MOSFET, and HB pin) VIN *RHB VDD Typical leakage currents for the bootstrap capacitor and IGBT/MOSFET are in the 100 nA range. The MIC4609 HS-pin-to-driver leakage current is generally higher with typical values in the 1 µA range (or higher at high junction temperature and voltage). The minimum value of bootstrap capacitor that prevents an excessive drop in the gate drive voltage to the high-side switch is calculated as per Equation 5-2. Resistors RHB and RCB can be used to reduce the peak CB charge current or modify the high-side IGBT/MOSFET turn-on time. This helps reduce noise and EMI as well as ripple on the VDD pin. The resistor in series with the HB pin, RHB, controls the turn-on time of the high-side switch by limiting the charge current into the gate. Adding a resistor in series with capacitor CB will reduce the peak charging current drawn through diode DBST. It has some effect on slowing down the high-side switch turn-on time, however, it is not as effective as resistor RHB since charging current also comes from VDD until the high-side switch starts to turn on and raise the voltage on the HB node. 5.2 HS Node Clamp A resistor/diode clamp between the switching node and the HS pin is recommended to minimize large negative glitches or pulses on the HS pin. As shown in Figure 5-2, the high-side and low-side IGBTs turn on and off to regulate motor speed. During the on-time, when the high-side IGBT is conducting, current flows into the motor. After the high-side IGBT turns off, and before the low-side IGBT turns on, there is a brief period of time (dead time) that prevents both IGBTs from being ON at the same time. During the dead time, current from the motor flows through the diode in parallel with the low-side IGBT. Depending on the diode characteristics (VF and turn-on time), the motor current and circuit parasitics, the initial negative voltage on the switch node can be several volts or more. Even though the HS pin is rated for negative voltage, it is good practice to clamp the HS pin with a resistor and diode to prevent excessive negative voltage from damaging the driver. Depending on the application and DS20005531A-page 23 MIC4609 amount of negative voltage on the switch node, a 1A fast recovery diode and a minimum 10 resistor are recommended. A higher current diode and/or larger values of resistance can be used if necessary. DBST CB VIN VDD Adding a series resistor in the switch node limits the peak high-side driver current, which affects the switching speed of the high-side driver. The resistor, in series with the HO pin, may be reduced to help compensate for the extra HS pin resistance. External IGBT AHB CGC RON AHO RG DBST VIN CGE ROFF CB AHB VDD CVDD AHI AHS DCLAMP AHO RG Level shift AHS RHS FIGURE 5-3: an External IGBT. DCLAMP ALI ALO R G M 5.3.2 Negative HS Pin Voltage. Power Dissipation Considerations Power dissipation in the driver can be separated into two areas: • Gate driver dissipation • Quiescent current dissipation used to supply the internal logic and control functions 5.3.1 GATE DRIVER POWER DISSIPATION Power dissipation in the output driver stage is mainly caused by charging and discharging the gate-to-emitter and gate-to-collector capacitance of the external IGBT. Figure 5-3 shows a simplified equivalent circuit of the MIC4609 driving an external high-side IGBT. MIC4609 High-Side Driving DISSIPATION DURING THE EXTERNAL IGBT/MOSFET TURN-ON COM FIGURE 5-2: RHS VNEG 10W 5.3 RG_INT Energy from capacitor CB is used to charge up the input capacitance of the IGBT (CGE and CGC). The energy delivered to the gate is dissipated in the three resistive components, RON, RG and RG_INT. RG is the series resistor between the driver output and the IGBT. RG_INT is the gate resistance of the IGBT. RG_INT is usually listed in the IGBT or MOSFET specifications. The ESR of capacitor CB and the resistance of the connecting etch can be ignored since they are much less than RON and RG_INT. The effective capacitances of CGE and CGC are difficult to calculate because they vary nonlinearly with IC, VGE, and VCE. Most power IGBT and MOSFET specifications include a graph of total gate charge versus VGE. Figure 5-4 shows a typical gate charge curve for an arbitrary IGBT. The chart shows that for a gate voltage of 12V, the IGBT requires 12 nC of charge. VGE, Gate-to-Emitter Voltage (V) 20 16 12 8 4 0 0 FIGURE 5-4: DS20005531A-page 24 4 8 12 QG, Total Gate Charge (nC) 16 Typical Gate Charge vs. VGE. 2016 Microchip Technology Inc. MIC4609 The power dissipated by the resistive components of the gate drive circuit during turn-on is calculated as shown in Equation 5-3. Letting RON = ROFF, the power dissipated in the individual driver output in the IC is calculated as shown in Equation 5-4: EQUATION 5-3: EQUATION 5-4: PDRIVER = Q G V GE f S D R ON P DISS = P DRIVER ------------------------------------------------RON + RG + RG_INT Where: PDRIVER (1) = Average drive circuit power due to switching QG = Total gate charge at VGE The total power dissipated in the MIC4609, due to switching, is equal to the sum of all six driver dissipations. VGE = Gate-to-emitter voltage on the IGBT 5.3.3 fS = Switching frequency of the gate drive circuit (2) = D Note 1: 2: Operating duty cycle of the driver output PDRIVER is the power dissipated by the individual driver for one of the six gate drive outputs. Operating duty cycle is the percentage of time that particular driver output is switching during one rotation of the motor. The power dissipated by each of the internal gate drivers (high-side or low-side) is equal to the ratio of RON and ROFF to the external resistive losses in RG and RG_INT. SUPPLY CURRENT POWER DISSIPATION Power is dissipated in the MIC4609 even if nothing is being driven. The supply current is drawn by the bias for the internal circuitry, the level shifting circuitry, and shoot-through current in the output drivers. The supply current is proportional to the operating frequency and the VDD and VHB voltages. Figures 2-9 and 2-10 show how supply current varies with switching frequency and supply voltage. The power dissipated by the MIC4609 due to supply current is calculated by applying Equation 5-5. EQUATION 5-5: PDISS_SUPPLY = V DD I DD VHB I HB 5.3.4 TOTAL POWER DISSIPATION AND THERMAL CONSIDERATIONS Total power dissipation in the MIC4609 is equal to the power dissipation caused by driving the external IGBTs and the supply current. Equation 5-6 shows this relation. EQUATION 5-6: P DISS_TOTAL = P DISS_SUPPLY + PDISS_DRIVERS The die temperature can be calculated after the total power dissipation is determined as shown in Equation 5-7. EQUATION 5-7: T J = T A + P DISS_TOTAL JA Where: TA = Maximum ambient temperature (°C) TJ = Junction temperature (°C) PDISS_TOTAL = MIC4609 power dissipation (W) JA = Thermal resistance from junction-to-ambient air (°C/W) 2016 Microchip Technology Inc. DS20005531A-page 25 MIC4609 5.3.5 OTHER TIMING CONSIDERATIONS Make sure the input signal pulse width is greater than the minimum specified pulse width. An input signal that is less than the minimum pulse width may result in no output pulse or an output pulse whose width is significantly less than the input. The maximum duty cycle (ratio of high-side on-time to switching period) is controlled by the minimum pulse width of the low side and by the time required for the CB capacitors to charge during the off-time. Adequate time must be allowed for the CB capacitor to charge up before the high-side driver is turned on. 5.4 Decoupling Capacitor Selection Decoupling capacitors are required on the VDD pin to supply the charge necessary to drive the external IGBTs or MOSFETs and also to minimize the voltage ripple on these pins. The VDD pin decoupling capacitor supplies the transient current for all six drivers (three high-side and three low-side). The minimum recommended VDD capacitance should be greater than the sum of all three CB capacitors with a minimum 1 µF ceramic capacitor regardless of CB value. Ceramic capacitors are recommended because of their low impedance and small size. Z5U-type ceramic capacitor dielectrics should not be used due to the large change in capacitance over temperature and voltage. Larger IGBTs/MOSFETs and low-switching frequencies may require larger capacitance values for proper operation. The voltage rating of the capacitors depends on the supply voltage, ambient temperature and the voltage derating used for reliability. 25V-rated X5R or X7R ceramic capacitors are recommended for most applications. The minimum capacitance value should be increased if low voltage capacitors are used because even good quality dielectric capacitors, such as X5R, will lose 40% to 70% of their capacitance value at the rated voltage. Placement of the decoupling capacitors is critical. The bypass capacitor for VDD should be placed as close as possible between the VDD pin and the ground plane. The bypass capacitor (CB) for the HB supply pin must be located as close as possible between the HB and HS pins. The etch connections must be short, wide, and direct. The use of a ground plane to minimize connection impedance is recommended. 5.5 Grounding, Component Placement and Circuit Layout Nanosecond switching speeds and high-peak currents in and around the MIC4609 driver requires proper placement and trace routing of all components. Improper placement may cause degraded noise immunity, false switching, excessive ringing, or circuit latch-up. Figure 5-5 shows the critical current paths when the driver outputs go high and turn on the external IGBTs. It also helps demonstrate the need for a low impedance ground plane. Charge needed to turn on the IGBT gates comes from the decoupling capacitors CVDD and CB. Current in the low-side gate driver flows from CVDD through the internal driver, into the IGBT gate, and out the emitter. The return connection back to the decoupling capacitor is made through the ground plane. Any inductance or resistance in the ground return path causes a voltage spike or ringing to appear on the emitter of the IGBT. This voltage works against the gate drive voltage and can either slow down or turn off the IGBT during the period when it should be turned on. Current in the high-side driver is sourced from capacitor CB and flows into the HB pin and out the HO pin, into the gate of the high-side IGBT. The return path for the current is from the emitter of the IGBT and back to capacitor CB. The high-side circuit return path usually does not have a low-impedance ground plane so the etch connections in this critical path should be short and wide to minimize parasitic inductance. As with the low-side circuit, impedance between the IGBT emitter and the decoupling capacitor causes negative voltage feedback that fights the turn-on of the IGBT. It is important to note that capacitor CB must be placed close to the HB and HS pins. This capacitor not only provides the current for turn-on but it must also keep HB pin noise and ripple low for proper operation of the high-side drive circuitry. LOW-SIDE DRIVE TURN-ON CURRENT PATH HS Node xLO VDD VIN GND plane CVDD xHB VSS xHO CB HS Node xHS xLI Level shift GND plane xHI HIGH-SIDE DRIVE TURN-ON CURRENT PATH FIGURE 5-5: DS20005531A-page 26 Turn-On Current Paths. 2016 Microchip Technology Inc. MIC4609 Figure 5-5 shows the critical current paths when the driver outputs go low and turn off the external IGBTs. Short, low-impedance connections are important during turn-off for the same reasons given in the turn-on explanation. Current flowing through the internal diode replenishes charge in the bootstrap capacitor, CB. LOW-SIDE DRIVE TURN-OFF CURRENT PATH xLO VDD VIN GND plane HS Node CVDD xHB VSS xHO CB HS Node xHS xLI Level shift GND plane xHI HIGH-SIDE DRIVE TURN-OFF CURRENT PATH FIGURE 5-6: Turn-Off Current Paths. It is highly recommended to use a ground plane to minimize parasitic inductance and impedance of the return paths. The MIC4609 is capable of greater than 1A peak currents and any impedance between the MIC4609, the decoupling capacitors, and the external IGBTs/MOSFETs will degrade the performance of the driver. 2016 Microchip Technology Inc. DS20005531A-page 27 MIC4609 6.0 PACKAGING INFORMATION DS20005531A-page 28 2016 Microchip Technology Inc. MIC4609 APPENDIX A: REVISION HISTORY Revision A (March 2016) • Original release of this document. 2016 Microchip Technology Inc. DS20005531A-page 29 MIC4609 NOTES: DS20005531A-page 30 2016 Microchip Technology Inc. MIC4609 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X Device Lead Finish XX –X (1) Package Code Tape and Reel Option Device: MIC4609: Lead Finish: Y = Pb-Free with Industrial Temperature Grade Package Code: WM = Plastic Small Outline, 7.52 mm Body, 28-Lead SOIC Wide Package Examples: a) MIC4609YWM-TR: 600V 3-Phase MOSFET/IGBT Driver, 7.52 mm body, 28LD SOIC Wide package, Tape and Reel 600V 3-Phase MOSFET/IGBT Driver 2016 Microchip Technology Inc. Note 1: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. DS20005531A-page 31 MIC4609 NOTES: DS20005531A-page 32 2016 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. 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QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 == 2016 Microchip Technology Inc. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, ETHERSYNCH, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are registered trademarks of Microchip Technology Incorporated in the U.S.A. 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