Circuit Protection Division July, 2005 Bourns Manufacturers Representatives Corporate Distributor Product Managers Americas Sales Team Asia Sales Team Europe Sales Team N IT CU ECTIO R I C ROT P Thyristor Surge Protector Product Change Notification PCN Tracking Number 37 - Chip Metallization Change Recent advances in underbump metallization technology afford the opportunity for Bourns to change the wafer metallization system used on all SMA and SMB packaged products. Bourns wafers designed for solder die attach are manufactured with a multilayer metal system to achieve low contact resistance, high strength, good solderability and long application life. In the new system, the metallization deposition process will change from vacuum deposition only, to a combination of vacuum deposition and electroless plating. The deposition processes and thickness of each layer are shown in the table. Current Future Deposition Thickness Deposition Thickness Aluminum Vacuum 6 microns Vacuum 6 microns Titanium Vacuum 0.15 microns Not present N/A Nickel Vacuum 0.45 microns Plating 2.0 - 5.0 microns Gold Vacuum 0.04 microns Plating 0.04 - 0.10 microns In vacuum metallizing, the titanium layer is necessary as an adhesive layer between nickel and aluminum. The nickel-plating process has high adhesion to aluminum so the titanium layer is no longer required. Products Affected by the Change: Initially, all overvoltage protection products assembled in the SMA and SMB are affected. Products with package code suffixes of AJ, AJR, BJ and BJR will be changed. For lead (Pb) free products, the corresponding codes are AJ-S, AJR-S, BJ-S and BJR-S. Products in other packages will be converted later. Thyristor Surge Protector Product Change Notification PCN Tracking Number 37 - Chip Metallization Change July, 2005 Page 2 of 4 Surface Mount Packages Existing Part No TISP Products TISP4xxxL1AJR TISP4xxxL3AJR TISP4xxxM3AJR TISP43xxMMAJR TISP4xxxL1BJR TISP4xxxL3BJR TISP4xxxM3BJR TISP43xxMMBJR TISP4xxxH1BJR TISP4xxxH3BJR TISP4xxxH4BJR TISP4AxxxH3BJR TISP4CxxxxH3BJR TISP5xxxH3BJR TISP1xxxH3BJR TISP3xxxT3BJR Package Lead Free RoHS Compliant SMA SMA SMA SMA SMB SMB SMB SMB SMB SMB SMB SMB SMB SMB SMB3 SMB3 Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Lead Free Product Part Number Suffix -S or S TISP4xxxL1AJR-S TISP4xxxL3AJR-S TISP4xxxM3AJR-S TISP43xxMMAJR-S TISP4xxxL1BJR-S TISP4xxxL3BJR-S TISP4xxxM3BJR-S TISP43xxMMBJR-S TISP4xxxH1BJR-S TISP4xxxH3BJR-S TISP4xxxH4BJR-S TISP4AxxxH3BJRS TISP4CxxxH3BJRS TISP5xxxH3BJR-S TISP1xxxH3BJR-S TISP3xxxT3BJR-S Reason for the Change: Recent advances in the development of underbump metal systems have indicated that plated metal layers are as reliable as the vacuum-deposited metallization systems currently used. Product Labeling: There will be no change to the product labeling. Identification of the Changed Product: Bourns maintains traceability back to source wafer lots for all products. Implementation Date: Manufacture of wafers with the changed metallization will begin in August 2005. Shipments of finished goods including the metallization changes are expected to commence in September 2005. Existing inventories of wafers manufactured prior to the change will be processed on a FIFO basis. From September 2005, onwards Bourns total shipments of SMA/SMB products will continue to contain wafers manufactured to the existing process until inventory is depleted. Date Code Product will Include this Processing will be: 0536 Impact on Form, Fit, Function and Reliability: None Thyristor Surge Protector Product Change Notification PCN Tracking Number 37 - Chip Metallization Change July, 2005 Page 3 of 4 Qualification Plan: See below. Last Date of Manufacture of Unchanged Product: July 2005 Qualification Information as Follows: TISP4xxxH3BJ & TISP4xxxM3BJ Chip Metallization Change Die Technology Die Name Die size (mil) Top Metal Back Metal Assembly Site Pins/Package Mold Compound Die Attach Bond Wire L/F Material Marking Termination Finish Thyristor Overvoltage Protector As Table (Row 2) As Table (Row 3) Al + NiAu Al + NiAu Shanghai Seefull Electronics Co, PRC SMB Sumitomo EME 1100H Solder, Pb >85 % Solder Clip (3) Copper Laser Matte Sn (Pb Free) Thyristor Surge Protector Product Change Notification PCN Tracking Number 37 - Chip Metallization Change July, 2005 Page 4 of 4 Qualification Samples Taken from Three Wafer Fabrication Lots: Stress Test/Conditions (2) HTRB, 150 °C, 100 V, 1000 h 85 °C/85 %RH, 50 V, 1000 h Temperature Cycle 65/+150 °C, 200 cs 10/1000 µs Surge 2/10 µs Surge Bond Strength, 300 g Min. (Note 4) Test Plan Lot 2 TW435PQ 94 x 81 129 129 Lot 3 TA230LQ 65 x 65 129 129 QSS (1) 009-101 009-102 Standard MIL STD 883 JEDEC STD 22 Method 1015 A101 SS/Accept 129/1 129/1 Lot 1 TW435PQ 94 x 81 129 129 009-104 - MIL STD 883 GR-1089-CORE GR-1089-CORE 2031 - 129/1 16/0 16/0 129 16 16 129 16 16 129 16 16 - 20/0 20/0 20/0 20/0 - - Notes: 1. QSS Specifications are Bourns Internal Qualification Standards. 2. Mechanical/Package Requirements qualified by similarity with existing product. 3. SMA and SMB packages are assembled by soldering the chip between a copper lead frame and copper clip. 4. Vertical Pull Test complete. Stress Test Completion Date: July 2005