Data Sheet

74HC245-Q100; 74HCT245-Q100
Octal bus tranceiver; 3-state
Rev. 1 — 22 July 2013
Product data sheet
1. General description
The 74HC245-Q100; 74HCT245-Q100 is an 8-bit transceiver with 3-state outputs. The
device features an output enable (OE) and send/receive (DIR) for direction control. A
HIGH on OE causes the outputs to assume a high-impedance OFF-state. Inputs include
clamp diodes that enable the use of current limiting resistors to interface inputs to voltages
in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
 Automotive product qualification in accordance with AEC-Q100 (Grade 1)
 Specified from 40 C to +85 C and from 40 C to +125 C
 Octal bidirectional bus interface
 Non-inverting 3-state outputs
 Multiple package options
 Complies with JEDEC standard no. 7A
 ESD protection:
 MIL-STD-883, method 3015 exceeds 2000 V
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
3. Ordering information
Table 1.
Ordering information
Type number
74HC245D-Q100
Package
Temperature range
Name
Description
Version
40 C to +125 C
SO20
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
40 C to +125 C
TSSOP20
plastic thin shrink small outline package; 20 leads; SOT360-1
body width 4.4 mm
40 C to +125 C
DHVQFN20 plastic dual-in-line compatible thermal enhanced
SOT764-1
very thin quad flat package no leads; 20 terminals;
body 2.5  4.5  0.85 mm
74HCT245D-Q100
74HC245PW-Q100
74HCT245PW-Q100
74HC245BQ-Q100
74HCT245BQ-Q100
74HC245-Q100; 74HCT245-Q100
NXP Semiconductors
Octal bus tranceiver; 3-state
4. Functional diagram
1
DIR
OE
2
B0
3
16
15
14
A5
13
A6
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
B6
9
2
A4
B5
8
3EN1
3EN2
17
A3
B4
7
G3
1
B3
6
1
A2
B2
5
19
18
A1
B1
4
19
A0
11
mna175
12
A7
B7
11
mna174
Fig 1.
Logic symbol
74HC_HCT245_Q100
Product data sheet
Fig 2.
IEC logic symbol
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
2 of 20
74HC245-Q100; 74HCT245-Q100
NXP Semiconductors
Octal bus tranceiver; 3-state
5. Pinning information
5.1 Pinning
',5
WHUPLQDO
LQGH[DUHD
+&4
+&74
9&&
+&4
+&74
$
2(
$
%
$
%
',5
$
9&&
2(
$
%
$
%
$
%
$
%
$
%
$
$
%
$
$
%
$
%
$
$
%
*1' %
%
*1'
%
% *1' %
DDD
7UDQVSDUHQWWRSYLHZ
DDD
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 3.
Pin configuration SO20 and TSSOP20
Fig 4.
Pin configuration DHVQFN20
5.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
DIR
1
direction control
A0, A1, A2, A3, A4, A5, A6, A7
2, 3, 4, 5, 6, 7, 8, 9
data input/output
GND
10
ground (0 V)
B0, B1, B2, B3, B4, B5, B6, B7
18, 17, 16, 15, 14, 13, 12, 11
data input/output
OE
19
output enable input (active LOW)
VCC
20
supply voltage
74HC_HCT245_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
3 of 20
74HC245-Q100; 74HCT245-Q100
NXP Semiconductors
Octal bus tranceiver; 3-state
6. Functional description
Table 3.
Function table[1]
Input
Input/output
OE
DIR
An
Bn
L
L
A=B
input
L
H
input
B=A
H
X
Z
Z
[1]
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
Min
Max
Unit
0.5
+7
V
IIK
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
-
20
mA
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
-
20
mA
IO
output current
VO = 0.5 V to VCC + 0.5 V
-
35
mA
ICC
supply current
-
+70
mA
IGND
ground current
70
-
mA
Tstg
storage temperature
65
+150
C
-
500
mW
total power dissipation
Ptot
[1]
SO20, TSSOP20 and DHVQFN20
packages
[1]
For SO20 package: above 70 C, Ptot derates linearly with 8 mW/K.
For TSSOP20 package: above 60 C, Ptot derates linearly with 5.5 mW/K.
For DHVQFN20 package: above 60 C, Ptot derates linearly with 4.5 mW/K.
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
VCC
supply voltage
VI
input voltage
VO
output voltage
Tamb
ambient temperature
t/V
input transition rise and fall rate
74HC_HCT245_Q100
Product data sheet
Conditions
74HC245-Q100
74HCT245-Q100
Unit
Min
Typ
Max
Min
Typ
Max
2.0
5.0
6.0
4.5
5.0
5.5
V
0
-
VCC
0
-
VCC
V
0
-
VCC
0
-
VCC
V
40
+25
+125
40
+25
+125
C
VCC = 2.0 V
-
-
625
-
-
-
ns/V
VCC = 4.5 V
-
1.67
139
-
1.67
139
ns/V
VCC = 6.0 V
-
-
83
-
-
-
ns/V
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
4 of 20
NXP Semiconductors
74HC245-Q100; 74HCT245-Q100
Octal bus tranceiver; 3-state
9. Static characteristics
Table 6.
Static characteristics type 74HC245-Q100
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 25 C
VIH
VIL
VOH
VOL
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
LOW-level output voltage
VCC = 2.0 V
1.5
1.2
-
V
VCC = 4.5 V
3.15
2.4
-
V
VCC = 6.0 V
4.2
3.2
-
V
VCC = 2.0 V
-
0.8
0.5
V
VCC = 4.5 V
-
2.1
1.35
V
VCC = 6.0 V
-
2.8
1.8
V
IO = 20 A; VCC = 2.0 V
1.9
2.0
-
V
IO = 20 A; VCC = 4.5 V
4.4
4.5
-
V
IO = 20 A; VCC = 6.0 V
5.9
6.0
-
V
IO = 6.0 mA; VCC = 4.5 V
3.98
4.32
-
V
IO = 7.8 mA; VCC = 6.0 V
5.48
5.81
-
V
IO = 20 A; VCC = 2.0 V
-
0
0.1
V
IO = 20 A; VCC = 4.5 V
-
0
0.1
V
IO = 20 A; VCC = 6.0 V
-
0
0.1
V
IO = 6.0 mA; VCC = 4.5 V
-
0.15
0.26
V
IO = 7.8 mA; VCC = 6.0 V
-
0.16
0.26
V
VI = VIH or VIL
VI = VIH or VIL
II
input leakage current
VI = VCC or GND; VCC = 6.0 V
-
-
0.1
A
IOZ
OFF-state output current
VI = VIH or VIL; VO = VCC or GND;
VCC = 6.0 V
-
-
0.5
A
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
8.0
A
CI
input capacitance
-
3.5
-
pF
CI/O
input/output capacitance
-
10
-
pF
VCC = 2.0 V
1.5
-
-
V
VCC = 4.5 V
3.15
-
-
V
Tamb = 40 C to +85 C
VIH
VIL
VOH
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
74HC_HCT245_Q100
Product data sheet
VCC = 6.0 V
4.2
-
-
V
VCC = 2.0 V
-
-
0.5
V
VCC = 4.5 V
-
-
1.35
V
VCC = 6.0 V
-
-
1.8
V
IO = 20 A; VCC = 2.0 V
1.9
-
-
V
IO = 20 A; VCC = 4.5 V
4.4
-
-
V
IO = 20 A; VCC = 6.0 V
5.9
-
-
V
IO = 6.0 mA; VCC = 4.5 V
3.84
-
-
V
IO = 7.8 mA; VCC = 6.0 V
5.34
-
-
V
VI = VIH or VIL
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
5 of 20
NXP Semiconductors
74HC245-Q100; 74HCT245-Q100
Octal bus tranceiver; 3-state
Table 6.
Static characteristics type 74HC245-Q100 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOL
LOW-level output voltage
VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
-
-
0.1
V
IO = 20 A; VCC = 4.5 V
-
-
0.1
V
IO = 20 A; VCC = 6.0 V
-
-
0.1
V
IO = 6.0 mA; VCC = 4.5 V
-
-
0.33
V
IO = 7.8 mA; VCC = 6.0 V
-
-
0.33
V
II
input leakage current
VI = VCC or GND; VCC = 6.0 V
-
-
1.0
A
IOZ
OFF-state output current
VI = VIH or VIL; VO = VCC or GND;
VCC = 6.0 V
-
-
5.0
A
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
80
A
VCC = 2.0 V
1.5
-
-
V
VCC = 4.5 V
3.15
-
-
V
Tamb = 40 C to +125 C
VIH
VIL
VOH
VOL
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
LOW-level output voltage
VCC = 6.0 V
4.2
-
-
V
VCC = 2.0 V
-
-
0.5
V
VCC = 4.5 V
-
-
1.35
V
VCC = 6.0 V
-
-
1.8
V
VI = VIH or VIL
-
IO = 20 A; VCC = 2.0 V
1.9
-
-
V
IO = 20 A; VCC = 4.5 V
4.4
-
-
V
IO = 20 A; VCC = 6.0 V
5.9
-
-
V
IO = 6.0 mA; VCC = 4.5 V
3.7
-
-
V
IO = 7.8 mA; VCC = 6.0 V
5.2
-
-
V
VI = VIH or VIL
-
IO = 20 A; VCC = 2.0 V
-
-
0.1
V
IO = 20 A; VCC = 4.5 V
-
-
0.1
V
IO = 20 A; VCC = 6.0 V
-
-
0.1
V
IO = 6.0 mA; VCC = 4.5 V
-
-
0.4
V
IO = 7.8 mA; VCC = 6.0 V
-
-
0.4
V
II
input leakage current
VI = VCC or GND; VCC = 6.0 V
-
-
1.0
A
IOZ
OFF-state output current
VI = VIH or VIL; VO = VCC or GND;
VCC = 6.0 V
-
-
10.0
A
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
160
A
74HC_HCT245_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
6 of 20
NXP Semiconductors
74HC245-Q100; 74HCT245-Q100
Octal bus tranceiver; 3-state
Table 7.
Static characteristics type 74HCT245-Q100
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 25 C
VIH
HIGH-level input voltage
VCC = 4.5 V to 5.5 V
2.0
1.6
-
V
VIL
LOW-level input voltage
VCC = 4.5 V to 5.5 V
-
1.2
0.8
V
VOH
HIGH-level output voltage
VI = VIH or VIL; VCC = 4.5 V
VOL
LOW-level output voltage
IO = 20 A
4.4
4.5
-
V
IO = 6 mA
3.98
4.32
-
V
IO = 20 A
-
0
0.1
V
IO = 6.0 mA
VI = VIH or VIL; VCC = 4.5 V
-
0.15
0.26
V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V
-
-
0.1
A
IOZ
OFF-state output current
VI = VIH or VIL; VCC = 5.5 V;
VO = VCC or GND per input pin;
other inputs at VCC or GND; IO = 0 A
-
-
0.5
A
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
8.0
A
ICC
additional supply current
per input pin; VI = VCC  2.1 V; other
inputs at VI = VCC or GND;
VCC = 4.5 V to 5.5 V; IO = 0 A
An or Bn inputs
-
40
144
A
OE input
-
150
540
A
DIR input
-
90
324
A
CI
input capacitance
-
3.5
-
pF
CI/O
input/output capacitance
-
10
-
pF
Tamb = 40 C to +85 C
VIH
HIGH-level input voltage
VCC = 4.5 V to 5.5 V
2.0
-
-
V
VIL
LOW-level input voltage
VCC = 4.5 V to 5.5 V
-
-
0.8
V
VOH
HIGH-level output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
4.4
-
-
V
IO = 6 mA
3.84
-
-
V
IO = 20 A
-
-
0.1
V
IO = 6.0 mA
-
-
0.33
V
VOL
LOW-level output voltage
VI = VIH or VIL; VCC = 4.5 V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V
-
-
1.0
A
IOZ
OFF-state output current
VI = VIH or VIL; VCC = 5.5 V;
VO = VCC or GND per input pin;
other inputs at VCC or GND; IO = 0 A
-
-
5.0
A
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
80
A
74HC_HCT245_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
7 of 20
NXP Semiconductors
74HC245-Q100; 74HCT245-Q100
Octal bus tranceiver; 3-state
Table 7.
Static characteristics type 74HCT245-Q100 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
ICC
additional supply current
per input pin; VI = VCC  2.1 V; other
inputs at VI = VCC or GND;
VCC = 4.5 V to 5.5 V; IO = 0 A
An or Bn inputs
-
-
180
A
OE input
-
-
675
A
DIR input
-
-
405
A
Tamb = 40 C to +125 C
VIH
HIGH-level input voltage
VCC = 4.5 V to 5.5 V
2.0
-
-
V
VIL
LOW-level input voltage
VCC = 4.5 V to 5.5 V
-
-
0.8
V
VOH
HIGH-level output voltage
VI = VIH or VIL; VCC = 4.5 V
VOL
LOW-level output voltage
IO = 20 A
4.4
-
-
V
IO = 6 mA
3.7
-
-
V
-
-
0.1
V
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
-
-
0.4
V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V
IO = 6.0 mA
-
-
1.0
A
IOZ
OFF-state output current
VI = VIH or VIL; VCC = 5.5 V;
VO = VCC or GND per input pin;
other inputs at VCC or GND; IO = 0 A
-
-
10
A
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
160
A
ICC
additional supply current
per input pin; VI = VCC  2.1 V; other
inputs at VI = VCC or GND;
VCC = 4.5 V to 5.5 V; IO = 0 A
An or Bn inputs
-
-
196
A
OE input
-
-
735
A
DIR input
-
-
441
A
74HC_HCT245_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
8 of 20
74HC245-Q100; 74HCT245-Q100
NXP Semiconductors
Octal bus tranceiver; 3-state
10. Dynamic characteristics
Table 8.
Dynamic characteristics type 74HC245-Q100
GND = 0 V; for test circuit, see Figure 7.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCC = 2.0 V
-
25
90
ns
VCC = 4.5 V
-
9
18
ns
VCC = 5.0 V; CL = 15 pF
-
7
-
ns
VCC = 6.0 V
-
7
15
ns
VCC = 2.0 V
-
30
150
ns
VCC = 4.5 V
-
11
30
ns
-
9
26
ns
VCC = 2.0 V
-
41
150
ns
VCC = 4.5 V
-
15
30
ns
-
12
26
ns
VCC = 2.0 V
-
14
60
ns
VCC = 4.5 V
-
5
12
ns
-
4
10
ns
-
30
-
pF
VCC = 2.0 V
-
-
115
ns
VCC = 4.5 V
-
-
23
ns
-
-
20
ns
VCC = 2.0 V
-
-
190
ns
VCC = 4.5 V
-
-
38
ns
-
-
33
ns
VCC = 2.0 V
-
-
190
ns
VCC = 4.5 V
-
-
38
ns
VCC = 6.0 V
-
-
33
ns
Tamb = 25 C
tpd
ten
propagation delay
An to Bn or Bn to An;
see Figure 5
enable time
OE to An or OE to Bn;
see Figure 6
[1]
[2]
VCC = 6.0 V
tdis
disable time
OE to An or OE to Bn;
see Figure 6
[3]
VCC = 6.0 V
tt
transition time
An, Bn; see Figure 5
[4]
VCC = 6.0 V
CPD
power dissipation capacitance
VI = GND to VCC
[5]
An to Bn or Bn to An;
see Figure 5
[1]
Tamb = 40 C to +85 C
tpd
propagation delay
VCC = 6.0 V
ten
enable time
OE to An or OE to Bn;
see Figure 6
[2]
VCC = 6.0 V
tdis
disable time
74HC_HCT245_Q100
Product data sheet
OE to An or OE to Bn;
see Figure 6
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
[3]
© NXP B.V. 2013. All rights reserved.
9 of 20
NXP Semiconductors
74HC245-Q100; 74HCT245-Q100
Octal bus tranceiver; 3-state
Table 8.
Dynamic characteristics type 74HC245-Q100 …continued
GND = 0 V; for test circuit, see Figure 7.
Symbol
tt
Parameter
transition time
Conditions
Min
Typ
Max
Unit
VCC = 2.0 V
-
-
75
ns
VCC = 4.5 V
-
-
15
ns
VCC = 6.0 V
-
-
13
ns
VCC = 2.0 V
-
-
135
ns
VCC = 4.5 V
-
-
27
ns
-
-
23
ns
VCC = 2.0 V
-
-
225
ns
VCC = 4.5 V
-
-
45
ns
-
-
38
ns
VCC = 2.0 V
-
-
225
ns
VCC = 4.5 V
-
-
45
ns
VCC = 6.0 V
-
-
38
ns
VCC = 2.0 V
-
-
90
ns
VCC = 4.5 V
-
-
18
ns
VCC = 6.0 V
-
-
15
ns
An, Bn; see Figure 5
[4]
Tamb = 40 C to +125 C
propagation delay
tpd
An to Bn or Bn to An;
see Figure 5
[1]
VCC = 6.0 V
enable time
ten
OE to An or OE to Bn;
see Figure 6
[2]
VCC = 6.0 V
disable time
tdis
transition time
tt
[1]
OE to An or OE to Bn;
see Figure 6
An, Bn; see Figure 5
[3]
[4]
tpd is the same as tPLH and tPHL.
[2]
ten is the same as tPZH and tPZL.
[3]
tdis is the same as tPLZ and tPHZ.
[4]
tt is the same as tTHL and tTLH.
[5]
CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD  VCC2  fi  N +  (CL  VCC2  fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
 (CL  VCC2  fo) = sum of outputs.
74HC_HCT245_Q100
Product data sheet
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Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
10 of 20
74HC245-Q100; 74HCT245-Q100
NXP Semiconductors
Octal bus tranceiver; 3-state
Table 9.
Dynamic characteristics type 74HCT245-Q100
GND = 0 V; for test circuit, see Figure 7.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
-
12
22
ns
Tamb = 25 C
propagation delay
tpd
An to Bn or Bn to An;
see Figure 5
[1]
VCC = 4.5 V
-
10
-
ns
ten
enable time
OE to An or OE to Bn;
VCC = 4.5 V; see Figure 6
VCC = 5.0 V; CL = 15 pF
[2]
-
16
30
ns
tdis
disable time
OE to An or OE to Bn;
VCC = 4.5 V; see Figure 6
[3]
-
16
30
ns
tt
transition time
An, Bn; VCC = 4.5 V;
see Figure 5
[4]
-
5
12
ns
CPD
power dissipation capacitance
VI = GND to VCC  1.5 V
[5]
-
30
-
pF
VCC = 4.5 V; see Figure 5
[1]
-
-
28
ns
-
-
38
ns
Tamb = 40 C to +85 C
propagation delay
tpd
ten
enable time
OE to An or OE to Bn;
VCC = 4.5 V; see Figure 6
[2]
tdis
disable time
OE to An or OE to Bn;
VCC = 4.5 V; see Figure 6
[3]
-
-
38
ns
tt
transition time
An, Bn; VCC = 4.5 V;
see Figure 5
[4]
-
-
15
ns
VCC = 4.5 V; see Figure 5
[1]
-
-
33
ns
-
-
45
ns
Tamb = 40 C to +125 C
propagation delay
tpd
ten
enable time
OE to An or OE to Bn;
VCC = 4.5 V; see Figure 6
[2]
tdis
disable time
OE to An or OE to Bn;
VCC = 4.5 V; see Figure 6
[3]
-
-
45
ns
tt
transition time
An, Bn; VCC = 4.5 V;
see Figure 5
[4]
-
-
18
ns
[1]
tpd is the same as tPLH and tPHL.
[2]
ten is the same as tPZH and tPZL.
[3]
tdis is the same as tPLZ and tPHZ.
[4]
tt is the same as tTHL and tTLH.
[5]
CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD  VCC2  fi  N +  (CL  VCC2  fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
 (CL  VCC2  fo) = sum of outputs.
74HC_HCT245_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
11 of 20
74HC245-Q100; 74HCT245-Q100
NXP Semiconductors
Octal bus tranceiver; 3-state
11. Waveforms
VI
VM
An, Bn input
VM
GND
t PHL
t PLH
VOH
90 %
VM
VM
Bn, An output
10 %
VOL
t THL
t TLH
001aac433
Measurement points are given in Table 10.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5.
Input (An, Bn) to output (Bn, An) propagation delays and output transition times
tr
VI
tf
90 %
OE input
VM
GND
10 %
tPLZ
output
tPZL
VCC
LOW-to-OFF
OFF-to-LOW
VM
10 %
VOL
tPHZ
output
VOH
tPZH
90 %
HIGH-to-OFF
OFF-to-HIGH
VM
GND
outputs
enabled
outputs
enabled
outputs
disabled
001aac479
Measurement points are given in Table 10.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6.
Table 10.
3-state output enable and disable times
Measurement points
Type
Input
Output
VM
VM
74HC245-Q100
0.5VCC
0.5VCC
74HCT245-Q100
1.3 V
1.3 V
74HC_HCT245_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
12 of 20
74HC245-Q100; 74HCT245-Q100
NXP Semiconductors
Octal bus tranceiver; 3-state
VI
tW
90 %
negative
pulse
VM
0V
tf
tr
tr
tf
VI
90 %
positive
pulse
0V
VM
10 %
VM
VM
10 %
tW
VCC
VCC
G
VI
VO
RL
S1
open
DUT
CL
RT
001aad983
Test data is given in Table 11.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 7.
Table 11.
Test circuit for measuring switching times
Test data
Type
Input
VI
tr, tf
CL
RL
tPHL, tPLH
tPZH, tPHZ
tPZL, tPLZ
74HC245-Q100
VCC
6 ns
15 pF, 50 pF
1 k
open
GND
VCC
74HCT245-Q100
3V
6 ns
15 pF, 50 pF
1 k
open
GND
VCC
74HC_HCT245_Q100
Product data sheet
Load
S1 position
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
13 of 20
74HC245-Q100; 74HCT245-Q100
NXP Semiconductors
Octal bus tranceiver; 3-state
12. Package outline
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
HE
y
v M A
Z
20
11
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
10
1
e
detail X
w M
bp
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.3
0.1
2.45
2.25
0.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.01
0.019 0.013
0.014 0.009
0.51
0.49
0.30
0.29
0.05
0.419
0.043
0.055
0.394
0.016
inches
0.1
0.012 0.096
0.004 0.089
0.043
0.039
0.01
0.01
Z
(1)
0.9
0.4
0.035
0.004
0.016
θ
8o
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
Fig 8.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT163-1
075E04
MS-013
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Package outline SOT163-1 (SO20)
74HC_HCT245_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
14 of 20
74HC245-Q100; 74HCT245-Q100
NXP Semiconductors
Octal bus tranceiver; 3-state
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
E
D
A
X
c
HE
y
v M A
Z
11
20
Q
A2
(A 3)
A1
pin 1 index
A
θ
Lp
L
1
10
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
6.6
6.4
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.5
0.2
8o
o
0
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT360-1
Fig 9.
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
MO-153
Package outline SOT360-1 (TSSOP20)
74HC_HCT245_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
15 of 20
74HC245-Q100; 74HCT245-Q100
NXP Semiconductors
Octal bus tranceiver; 3-state
DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
SOT764-1
20 terminals; body 2.5 x 4.5 x 0.85 mm
A
B
D
A
A1
E
c
detail X
terminal 1
index area
terminal 1
index area
C
e1
e
2
9
y
y1 C
v M C A B
w M C
b
L
1
10
Eh
e
20
11
19
12
Dh
X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A(1)
max.
A1
b
c
D (1)
Dh
E (1)
Eh
e
e1
L
v
w
y
y1
mm
1
0.05
0.00
0.30
0.18
0.2
4.6
4.4
3.15
2.85
2.6
2.4
1.15
0.85
0.5
3.5
0.5
0.3
0.1
0.05
0.05
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT764-1
---
MO-241
---
EUROPEAN
PROJECTION
ISSUE DATE
02-10-17
03-01-27
Fig 10. Package outline SOT764-1 (DHVQFN20)
74HC_HCT245_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
16 of 20
74HC245-Q100; 74HCT245-Q100
NXP Semiconductors
Octal bus tranceiver; 3-state
13. Abbreviations
Table 12.
Abbreviations
Acronym
Description
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
MIL
Military
14. Revision history
Table 13.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74HC_HCT245_Q100 v.1
20130722
Product data sheet
-
-
74HC_HCT245_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
17 of 20
74HC245-Q100; 74HCT245-Q100
NXP Semiconductors
Octal bus tranceiver; 3-state
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HC_HCT245_Q100
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
18 of 20
NXP Semiconductors
74HC245-Q100; 74HCT245-Q100
Octal bus tranceiver; 3-state
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
74HC_HCT245_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
19 of 20
NXP Semiconductors
74HC245-Q100; 74HCT245-Q100
Octal bus tranceiver; 3-state
17. Contents
1
2
3
4
5
5.1
5.2
6
7
8
9
10
11
12
13
14
15
15.1
15.2
15.3
15.4
16
17
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17
Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Contact information. . . . . . . . . . . . . . . . . . . . . 19
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 22 July 2013
Document identifier: 74HC_HCT245_Q100