NXP Logic — Q100 logic portfolio Leading the way in automotive logic The operating environment of automobile semiconductor components is much more hostile than that of semiconductors used in home or portable applications. A television set will generally spend its operating lifetime within an ambient temperature range of 0 ˚C to 40 ˚C. Due to internal heating, its semiconductor devices can be expected to operate between 20 ˚C and 60 ˚C. By comparison, an automobile is expected to start at temperatures lower than -20 ˚C and, in some cases, operate within the engine compartment at temperatures approaching 150 ˚C. To ensure the reliability of automotive electronics, the Automotive Electronics Council introduced its AEC-Q100 standard, which outlines procedures to be followed to ensure integrated circuits meet the quality and reliability levels required by automotive applications. As the global number one supplier, the introduction of its Q100 logic portfolio shows NXP continuing to lead the way in automotive logic. NXP offers the feature rich Low Voltage CMOS (LVC) logic portfolio to enable the migration of electronic solutions from 5.5 V to lower power mixed 5.5 V / 3.3 V and beyond. The LVC family includes Standard Logic functions with supply range 1.65 V to 3.3 V, as well as Mini Logic functions with supply range 1.65 V to 5.5 V. Q100 logic portfolio 3 Key benefits of the Q100 logic portfolio AEC-Q100 product qualification and reliability monitoring Operating at elevated temperatures reduces the lifetime of a semiconductor and temperature cycling has a negative impact on the stability of a package. In cases where there is no history of a product’s reliability within automotive applications, a series of stresses to simulate the life cycle within an automotive environment must be applied to guarantee conformance to the AEC-Q100 standard. applications. During electrical test process, average test limits or statistical test limits are applied to screen outliers within automotive lots. Figure 1 shows the distribution of devices passing a test and the calculated statistical test limits in yellow. Although the outliers are within the upper and lower specification limits they are not delivered as Q100 products. To ensure continued reliability, NXP logic maintains an extensive reliability monitoring program; the results of which are published half yearly. These QSUM reports are available upon request via your NXP sales representative. each function can be found at www.nxp.com/ products/automotive/logic, and unlike the standard types, each Q100 device has a dedicated datasheet confirming that it has been qualified in accordance with AEC-Q100 and is suitable for automotive applications. Tightened manufacturing process controls Q100 devices are: 4manufactured in TS16949 certified and VDA approved production facilities 4 flagged as automotive lots 4subjected to additional process flow quality gates and stricter rules for lot dis-positioning and maverick lot handling This ensures that automotive products: 4 receive highest priority 4have greater traceability for improved quality analysis 4that become outlier lots, passing a quality gate but outside of the acceptable distribution, are assigned to the non-Q100 type Six sigma design, zero defect test and inspection methodology Six sigma design philosophy is applied to all Q100 devices. This ensures that an end user application designed to the datasheet limits can tolerate a shift as high as one and a half sigma in NXP’s manufacturing processes. As the process control limits are much tighter than one and a half sigma, this virtually guarantees trouble free end user 4 Q100 logic portfolio Dedicated website and datasheets A summary of NXP logic’s Q100 portfolio including a search by function and a parametric search within Priority technical support NXP’s first and second tier technical support teams give Q100 product design-in assistance their highest priority and upon request AEC-Q100 production part approval process (PPAP) qualification data will be made available. Due to the stricter qualification requirements of automotive end user applications, a 180 day process change notification (PCN) approval cycle is applied for Q100 products instead of the 90 day PCN approval cycle for standard types. In the unlikely event of a quality issue, NXP logic guarantees a 10 day through put time with initial verification within 24 hours for its Q100 portfolio. LSL Outliers USL Outliers Satistical test limits Figure 1. Application of statistical test limits. Examples of NXP Q100 logic automotive application areas I/O expansion Large pin count controllers are expensive, so when possible to reduce the complexity and pin-count of control solutions, input/output expansion devices such as multiplexer/de-multiplexer devices are used. Figure 2 shows an example of an 8:1 multiplexer used to sequentially switch analog sensor signals to a single analog to digital pin of a micro-controller. Interface logic With high impedance inputs and low impedance outputs, interface logic such as registered or unregistered buffers and line drivers are used to interface between low drive outputs of a controller and higher loads of, for example, water pumps and window motors. Sensor A i/o i/o i/o i/o i/o µC ADC or i/o Sensor H 4851 Control logic Control applications such as engine control units and body control modules change settings based upon a combination of input signals. Control logic consists of simple Boolean functions, such as AND or NAND, to facilitate changing settings in simple sub-systems that don’t require a microcontroller. Display drivers Display drivers integrate serial-in, parallel-out shift registers, which are common I/O expansion devices, with a number of MOSFET LED drivers. With 8-bit and 12-bit solutions, shift register based display drivers enable a controller to drive 8 or 12 LED’s using Figure 2. 74HC4851 as multiplexer in a remote sensing application 12 V Open drain outputs drive LEDs directly i/o Microcontroller i/o i/o Output_CLK Storage register Serial input Input_CLK Storage register Serial output Shift register NPIC6C596A Shift register NPIC6C596A Figure 3. NPIC6C596A in cascaded display driver application 3 output lines. Cascading devices as shown in figure 3 increases the number of LED’s controlled by the same 3 output lines. Display drivers reduce the size, complexity, pin count and ultimately cost of any micro-controller based solution. Q100 logic portfolio 5 Q100 Standard logic functions and packages Standard logic functions Q100 standard logic functions include options suitable for use at supply voltage between 1.0 V and 15V. They provide a wide range of functions such as analog switches, buffers/inverters, bus switches, counters, decoders/de-multiplexers, multiplexers, flip-flops, gates, latches, level shifters, multivibrators, Schmitt-triggers, shift registers and transceivers. Q100 Standard logic is available in leaded SO and TSSOP packages as well as the innovative leadless DQFN package. NXP’s DQFN packages include side-wettable flanks, making them suitable for automated optical inspection. The package suffixes used in the tables are for all logic families with the exception of HEF4000B. The suffixes for HEF4000B can be found under Standard Logic Packages. Analog switches SOT403-1 (PW) SOT763-1 (BQ) -40~125 • • • 74HCT4051-Q100 single-pole, octal-throw analog switch; TTL enabled SP8T-Z 4.5 - 5.5 225 20 -40~125 • • • 74HC4052-Q100 dual single-pole, quad-throw analog switch SP4T-Z 2.0 - 10.0 200 20 -40~125 • • • 74HCT4052-Q100 dual single-pole, quad-throw analog switch; TTL enabled SP4T-Z 4.5 - 5.5 200 20 -40~125 • • • 74HC4053-Q100 triple single-pole, double-throw analog switch SP8T-Z 2.0 - 10.0 200 20 -40~125 • • • 74HCT4053-Q100 triple single-pole, double-throw analog switch; TTL enabled SP8T-Z 4.5 - 5.5 200 20 -40~125 • • • 74HC4066-Q100 quad single-pole, single-throw analog switch SPST-NO 2.0 - 10.0 105 23 -40~125 • • • 74HCT4066-Q100 quad single-pole, single-throw analog switch; SPST-NO TTL enabled 4.5 - 5.5 23 -40~125 • • • 74HC4851-Q100 single-pole, octal-throw analog switch SP8T-Z 2.0 - 10.0 220 - -40~125 • • • 74HCT4851-Q100 single-pole, octal-throw analog switch; TTL enabled SP8T-Z 4.5 - 5.5 240 - -40~125 • • • 74HC4852-Q100 dual single-pole, quad-throw analog switch SP4T-Z 2.0 - 10.0 220 - -40~125 • • • 74HCT4852-Q100 dual single-pole, quad-throw analog switch; TTL enabled SP4T-Z 4.5 - 5.5 240 - -40~125 • • • 74LV4052-Q100 dual single-pole, quad-throw analog switch SP4T-Z 1.0 - 6.0 125 15 -40~125 • • 74LV4053-Q100 triple single-pole, double-throw analog switch SPDT-Z 1.0 - 6.0 150 30 -40~125 • • 74LVC4066-Q100 quad single-pole, single-throw analog switch SPST-NO 1.65 - 5.5 15 1.5 -40~125 HEF4051B-Q100 single-pole, octal-throw analog switch SP8T-Z 4.5 - 15.5 175 30 -40~85 • • HEF4052B-Q100 dual single-pole, quad-throw analog switch SP4T-Z 4.5 - 15.5 175 30 -40~85 • • HEF4053B-Q100 triple single-pole, double-throw analog switch SPDT-Z 4.5 - 15.5 175 30 -40~85 • • HEF4066B-Q100 quad single-pole, single-throw analog switch SPST-NO 4.5 - 15.5 175 20 -40~85 HEF4067B-Q100 single-pole, 16-throw analog switch SP16T-Z 20 -40~85 For more information about automotive analog switches visit: www.nxp.com/products/automotive/logic/analog_switches/ 6 Q100 logic portfolio 4.5 - 15.5 175 • • SOT137-1 (D) SOT109-1 (D) 20 SOT762-1 (BQ) 2.0 - 10.0 200 118 SOT402-1 (PW) SP8T-Z SOT108-1 (D) single-pole, octal-throw analog switch RON (W) 74HC4051-Q100 VCC (V) Description Configuration Type number Tamb (°C) Package (suffix) RON (FLAT) (W) Features • • • • Buffers/inverters SOT762-1 (BQ) SOT360-1 (PW) SOT764-1 (BQ) ±8 3 -40~125 • • • 74AHCT04-Q100 hex inverter; TTL enabled 4.5 - 5.5 ±8 3 -40~125 • • • 74AHC125-Q100 quad buffer/line driver (3-state) 2.0 - 5.5 ±8 3 -40~125 • • • 74AHCT125-Q100 quad buffer/line driver; TTL enabled (3-state) 4.5 - 5.5 ±8 3 -40~125 • • • 74AHC126-Q100 quad buffer/line driver (3-state) 2.0 - 5.5 ±8 3.3 -40~125 • • • 74AHCT126-Q100 quad buffer/line driver; TTL enabled (3-state) 4.5 - 5.5 ±8 3 -40~125 • • • 74AHC240-Q100 octal inverter/line driver (3-state) 2.0 - 5.5 ±8 2.8 -40~125 • • • 74AHCT240-Q100 octal inverter/line driver; TTL enabled (3-state) 4.5 - 5.5 ±8 3 -40~125 • • • 74AHC244-Q100 octal buffer/line driver (3-state) 2.0 - 5.5 ±8 3.5 -40~125 • • • 74AHCT244-Q100 octal buffer/line driver; TTL enabled (3-state) 4.5 - 5.5 ±8 3.5 -40~125 • • • 74AHC541-Q100 octal buffer/line driver (3-state) 2.0 - 5.5 ±8 3.5 -40~125 • • • 74AHCT541-Q100 octal buffer/line driver; TTL enabled (3-state) 4.5 - 5.5 ±8 3.5 -40~125 • • • 74AHCU04-Q100 hex inverter; unbuffered 2.0 - 5.5 ±8 2.4 -40~125 • • • 74ALVC125-Q100 quad buffer/line driver (3-state) 1.65 - 3.6 ± 24 1.8 -40~85 • • • 74ALVC541-Q100 octal buffer/line driver (3-state) 1.65 - 3.6 ± 24 2.3 -40~85 • • • 74HC05-Q100 hex inverter; open-drain 2.0 - 6.0 5.2 11 -40~125 • 74HC04-Q100 hex inverter 2.0 - 6.0 ± 5.2 7 -40~125 • 74HCT04-Q100 hex inverter; TTL enabled 4.5 - 5.5 ± 4.0 8 -40~125 74HC125-Q100 quad buffer/line driver (3-state) 2.0 - 6.0 ± 7.8 9 74HCT125-Q100 quad buffer/line driver; TTL enabled (3-state) ±6 74HC126-Q100 quad buffer/line driver (3-state) 2.0 - 6.0 74HCT126-Q100 quad buffer/line driver; TTL enabled (3-state) 74HC240-Q100 • • • • • • • -40~125 • • 12 -40~125 • • ± 7.8 9 -40~125 • • 4.5 - 5.5 ±6 11 -40~125 • • octal inverter/line driver (3-state) 2.0 - 6.0 ± 7.8 9 -40~125 • • • 74HCT240-Q100 octal inverter/line driver; TTL enabled (3-state) 4.5 - 5.5 ±6 9 -40~125 • • • 74HC244-Q100 octal buffer/line driver (3-state) 2.0 - 6.0 ± 7.8 9 -40~125 • • • 74HCT244-Q100 octal buffer/line driver; TTL enabled (3-state) 4.5 - 5.5 ±6 11 -40~125 • • • 74HC365-Q100 hex buffer/line driver (3-state) 2.0 - 6.0 ± 7.8 9 -40~125 • • 74HCT365-Q100 hex buffer/line driver; TTL enabled (3-state) 4.5 - 5.5 ±6 11 -40~125 • • 74HC366-Q100 hex inverter/line driver (3-state) 2.0 - 6.0 ± 7.8 10 -40~125 • • 74HCT366-Q100 hex inverter/line driver; TTL enabled (3-state) 4.5 - 5.5 ±6 11 -40~125 • • 4.5 - 5.5 • Q100 logic portfolio SOT362-1 (DGG) SOT402-1 (PW) 2.0 - 5.5 SOT339-1 (DB) SOT108-1 (D) hex inverter SOT163-1 (D) Tamb (°C) SOT403-1 (PW) tpd (ns) 74AHC04-Q100 SOT109-1 (D) Description SOT337-1 (DB) Type number IO (mA) Package (suffix) VCC (V) Features 7 Buffers/inverters (continued) SOT362-1 (DGG) SOT764-1 (BQ) SOT360-1 (PW) SOT339-1 (DB) SOT163-1 (D) SOT403-1 (PW) Tamb (°C) SOT109-1 (D) tpd (ns) SOT762-1 (BQ) Description IO (mA) SOT402-1 (PW) Type number VCC (V) SOT337-1 (DB) Package (suffix) SOT108-1 (D) Features 74HC540-Q100 octal inverter/line driver (3-state) 2.0 - 6.0 ± 7.8 9 -40~125 • 74HCT540-Q100 octal inverter/line driver; TTL enabled (3-state) 4.5 - 5.5 ±6 11 -40~125 • 74HC541-Q100 octal buffer/line driver (3-state) 2.0 - 6.0 ± 7.8 10 -40~125 • • 74HCT541-Q100 octal buffer/line driver; TTL enabled (3-state) 4.5 - 5.5 ±6 12 -40~125 • • 74HCU04-Q100 hex inverter; unbuffered 2.0 - 6.0 ± 5.2 5 -40~125 74LV244-Q100 octal buffer/line driver (3-state) 1.0 - 5.5 ± 16 8 -40~125 • • 74LVC04A-Q100 hex inverter 1.65 - 5.5 ± 24 2 -40~125 • • • 74LVC06A-Q100 hex inverter; open-drain 1.65 - 5.5 32 2.2 -40~125 • • • 74LVC07A-Q100 hex buffer; open-drain 1.65 - 5.5 32 2.2 -40~125 • • • 74LVC125A-Q100 quad buffer/line driver (3-state) 1.2 - 3.6 ± 24 2.4 -40~125 • • • 74LVC126A-Q100 quad buffer/line driver (3-state) 1.2 - 3.6 ± 24 2.4 -40~125 • • • 74LVC541A-Q100 octal buffer/line driver (3-state) 1.2 - 3.6 ± 24 3.3 -40~125 • • 74LVC16240A-Q100 16-bit inverter/line driver (3-state) 1.2 - 3.6 ± 24 2.7 -40~125 74LVC244A-Q100 octal buffer/line driver (3-state) 1.2 - 3.6 ± 24 2.8 -40~125 • 74LVCH244A-Q100 octal buffer/line driver with bus hold (3-state) 1.2 - 3.6 ± 24 2.8 -40~125 • 74LVC16244A-Q100 16-bit buffer/line driver (3-state) 1.2 - 3.6 ± 24 3 -40~125 • 74LVCH16244A-Q100 16-bit buffer/line driver with bus hold (3-state) 1.2 - 3.6 ± 24 3 -40~125 • 74LVT04-Q100 hex inverter 2.7 - 3.6 -20 / +32 2.6 -40~85 74LVT244A-Q100 octal buffer/line driver with bus hold (3-state) 2.7 - 3.6 -32 / +64 2.6 -40~85 • • 74LVTH244A-Q100 octal buffer/line driver with bus hold (3-state) 2.7 - 3.6 -32 / +64 2.6 -40~85 • • 74VHC126-Q100 quad buffer/line driver (3-state) 2.0 - 5.5 ±8 3.3 -40~125 • • • 74VHCT126-Q100 quad buffer/line driver; TTL enabled (3-state) 4.5 - 5.5 ±8 3 -40~125 • • • 74VHC541-Q100 octal buffer/line driver (3-state) 2.0 - 5.5 ±8 3.5 -40~125 • • • 74VHCT541-Q100 octal buffer/line driver; TTL enabled (3-state) 4.5 - 5.5 ±8 3.5 -40~125 • • • HEF4049B-Q100 hex inverter/line driver 3.0 - 15.0 -3 / +20 20 -40~85 • HEF4050B-Q100 hex buffer/line driver 3.0 - 15.0 -3 / +20 40 -40~85 • HEF4069UB-Q100 hex inverter; unbuffered 3.0 - 15.0 ± 3.4 15 -40~85 For more information about automotive buffers/inverters/drivers visit: www.nxp.com/products/automotive/logic/buffers_inverters_drivers/ 8 Q100 logic portfolio • • • • • • • • • • • • • • • Bus switches SOT403-1 (PW) -40~125 • • 74CBTLV3253-Q100 dual 4:1 mux/demux 2.3 - 3.6 3.3 7 -40~125 • • 74CBTLV3257-Q100 quad 2:1 mux/demux 2.3 - 3.6 3.3 7 -40~125 • • CBT3245A-Q100 octal bus switch 4.5 - 5.5 3.9 7 -40~85 SOT764-1 (BQ) SOT109-1 (D) 7 • • • SOT763-1 (BQ) SOT762-1 (BQ) 3.3 SOT360-1 (PW) SOT402-1 (PW) 2.3 - 3.6 SOT403-1 (PW) Tamb (°C) quad bus switch SOT163-1 (D) RON (W) 74CBTLV3126-Q100 SOT763-1 (BQ) Description SOT519-1 (DS) Type number VPASS (V) Package (suffix) VCC (V) Features • • • For more information about automotive bus switches visit www.nxp.com/products/automotive/logic/bus_switches/ Counters/frequency dividers Tamb (°C) SOT108-1 (D) SOT402-1 (PW) 7-stage binary ripple counter 2.0 - 6.0 ± 5.2 14 -40~125 • • 74HC163-Q100 presettable synchronous 4-bit binary counter; synchronous reset 2.0 - 6.0 ± 5.2 17 -40~125 • • 74HCT163-Q100 presettable synchronous 4-bit binary counter; synchronous reset; TTL enabled 4.5 - 5.5 ± 4.0 20 -40~125 • • 74HC193-Q100 presettable synchronous 4-bit binary up/down counter 2.0 - 6.0 ± 5.2 20 -40~125 • • • 74HCT193-Q100 presettable synchronous 4-bit binary up/down counter; TTL enabled 4.5 - 5.5 ± 4.0 20 -40~125 • • • 74HC393-Q100 dual 4-bit binary ripple counter 2.0 - 6.0 ± 5.2 12 -40~125 • • • 74HCT393-Q100 dual 4-bit binary ripple counter; TTL enabled 4.5 - 5.5 ± 4.0 20 -40~125 • • • 74HC4017-Q100 Johnson decade counter with 10 decoded outputs 2.0 - 6.0 ± 5.2 18 -40~125 • 74HCT4017-Q100 Johnson decade counter with 10 decoded outputs; TTL enabled 4.5 - 5.5 ± 4.0 21 -40~125 • 74HC4020-Q100 14-stage binary ripple counter 2.0 - 6.0 ± 5.2 11 -40~125 • • • 74HCT4020-Q100 14-stage binary ripple counter; TTL enabled 4.5 - 5.5 ± 4.0 15 -40~125 • • • 74HC4040-Q100 12-stage binary ripple counter 2.0 - 6.0 ± 5.2 14 -40~125 • • • • 74HCT4040-Q100 12-stage binary ripple counter; TTL enabled 4.5 - 5.5 ± 4.0 16 -40~125 • • • • 74HC4060-Q100 14-stage binary ripple counter with oscillator 2.0 - 6.0 ± 5.2 31 -40~125 • • • 74HCT4060-Q100 14-stage binary ripple counter with oscillator; TTL enabled 4.5 - 5.5 ± 4.0 31 -40~125 • 74HC4520-Q100 dual 4-bit synchronous binary counter 2.0 - 6.0 ± 5.2 24 -40~125 • 74HCT4520-Q100 dual 4-bit synchronous binary counter; TTL enabled 4.5 - 5.5 ± 4.0 24 -40~125 • SOT338-1 (DB) tpd (ns) 74HC4024-Q100 SOT109-1 (D) Description SOT762-1 (BQ) Type number IO (mA) Package (suffix) VCC (V) Features • • • • • Q100 logic portfolio 9 Counters/frequency dividers (continued) SOT402-1 (PW) ±6 12 -40~125 • • HEF4017B-Q100 5-stage Johnson decade counter 4.5 - 15.5 ± 2.4 40 -40~85 • HEF4020B-Q100 14-stage binary ripple counter 4.5 - 15.5 ± 2.4 30 -40~85 • HEF4040B-Q100 12-stage binary ripple counter 4.5 - 15.5 ± 2.4 35 -40~85 • HEF4060B-Q100 14-stage binary ripple counter with oscillator 4.5 - 15.5 ± 2.4 50 -40~85 • HEF4541B-Q100 programmable timer 4.5 - 15.5 - 4/ + 2.7 38 -40~85 SOT763-1 (BQ) SOT108-1 (D) 1.0 - 3.6 SOT403-1 (PW) Tamb (°C) dual 4-bit binary ripple counter SOT338-1 (DB) tpd (ns) 74LV393-Q100 SOT109-1 (D) Description SOT762-1 (BQ) Type number IO (mA) Package (suffix) VCC (V) Features • For more information about automotive counters/frequency dividers visit www.nxp.com/products/automotive/logic/counters_frequency_dividers/ Digital decoders/demultiplexers Description tpd (ns) Tamb (°C) SOT109-1 (D) SOT403-1 (PW) SOT763-1 (BQ) 74AHC138-Q100 3-to-8 line decoder/demultiplexer; inverting 2.0 - 5.5 ±8 4.4 -40~125 • • • 74AHCT138-Q100 3-to-8 line decoder/demultiplexer; inverting; TTL enabled 4.5 - 5.5 ±8 4.4 -40~125 • • • 74AHC139-Q100 dual 2-to-4 line decoder/demultiplexer 2.0 - 5.5 ±8 3.9 -40~125 • • 74AHCT139-Q100 dual 2-to-4 line decoder/demultiplexer; TTL enabled 4.5 - 5.5 ±8 3.6 -40~125 • • 74HC237-Q100 3-to-8 decoder/demultiplexer with address latches 2.0 - 6.0 ± 5.2 18 -40~125 • 74HC138-Q100 3-to-8 line decoder/demultiplexer; inverting 2.0 - 6.0 ± 5.2 12 -40~125 • • • 74HCT138-Q100 3-to-8 line decoder/demultiplexer; inverting; TTL enabled 4.5 - 5.5 ±4 19 -40~125 • • • 74HC139-Q100 dual 2-to-4 line decoder/demultiplexer 2.0 - 6.0 ± 5.2 14 -40~125 • • • 74HCT139-Q100 dual 2-to-4 line decoder/demultiplexer; TTL enabled 4.5 - 5.5 ±4 16 -40~125 • • • 74HC238-Q100 3-to-8 decoder/demultiplexer 2.0 - 6.0 ± 5.2 14 -40~125 • • • 74HCT238-Q100 3-to-8 decoder/demultiplexer; TTL enabled 4.5 - 5.5 ±4 18 -40~125 • • • 74LVC138A-Q100 3-to-8 line decoder/demultiplexer; inverting 1.2 - 3.6 ± 24 2.7 -40~125 • • • HEF4555B-Q100 dual 1-to-4 line decoder/demultiplexer 4.5 - 15 ± 2.4 30 -40~85 • For more information about automotive decoders/demultiplexers visit http://www.nxp.com/products/automotive/logic/digital_decoders_demultiplexers/ 10 Q100 logic portfolio SOT338-1 (DB) Type number IO (mA) Package (suffix) VCC (V) Features Digital multiplexers Description tpd (ns) Tamb (°C) SOT109-1 (D) SOT403-1 (PW) SOT763-1 (BQ) 74AHC157-Q100 quad 2-input multiplexer 2.0 - 5.5 ±8 3.2 -40~125 • • • 74AHCT157-Q100 quad 2-input multiplexer; TTL enabled 4.5 - 5.5 ±8 3.2 -40~125 • • • 74AHC257-Q100 quad 2-input multiplexer (3-State) 2.0 - 5.5 ±8 2.9 -40~125 • • 74AHCT257-Q100 quad 2-input multiplexer; TTL enabled (3-State) 4.5 - 5.5 ±8 3.7 -40~125 • • 74HC151-Q100 8-input multiplexer 2.0 - 6.0 ± 5.2 17 -40~125 • • 74HCT151-Q100 8-input multiplexer; TTL enabled 4.5 - 5.5 ±4 19 -40~125 • • 74HC153-Q100 dual 4-input multiplexer 2.0 - 6.0 ± 5.2 17 -40~125 • • 74HCT153-Q100 dual 4-input multiplexer; TTL enabled 4.5 - 5.5 ±4 19 -40~125 • • 74HC157-Q100 quad 2-input multiplexer 2.0 - 6.0 ± 5.2 11 -40~125 • • • 74HCT157-Q100 quad 2-input multiplexer; TTL enabled 4.5 - 5.5 ±4 13 -40~125 • • • 74HC251-Q100 8-input multiplexer (3-State) 2.0 - 6.0 ± 5.2 18 -40~125 • • 74HCT251-Q100 8-input multiplexer; TTL enabled (3-State) 4.5 - 5.5 ±4 22 -40~125 • • 74HC253-Q100 dual 4-input multiplexer (3-State) 2.0 - 6.0 ± 7.8 17 -40~125 • 74HCT253-Q100 dual 4-input multiplexer; TTL enabled (3-State) 4.5 - 5.5 ±6 17 -40~125 • 74LVC157A-Q100 quad 2-input multiplexer 1.2 - 3.6 ± 24 2.5 -40~125 • • • • SOT339-1 (DB) SOT362-1 (DGG) SOT338-1 (DB) Type number IO (mA) Package (suffix) VCC (V) Features For more information about automotive digital multiplexers visit www.nxp.com/products/automotive/logic/digital_multiplexers/ Flip-flops SOT360-1 (PW) SOT764-1 (BQ) • • • 74AHCT74-Q100 dual D-type flip-flop with set and reset; positive-edge trigger; TTL enabled 4.5 - 5.5 ±8 3.3 -40~125 • • • 74AHC273-Q100 octal D-type flip-flop with reset; positive-edge trigger 2.0 - 5.5 ±8 4.2 -40~125 • • • 74AHCT273-Q100 octal D-type flip-flop with reset; positive-edge trigger; TTL enabled 4.5 - 5.5 ±8 -40~125 • • • 74AHC374-Q100 octal D-type flip-flop; positiveedge trigger 2.0 - 5.5 ±8 4.4 -40~125 • • 74AHCT374-Q100 octal D-type flip-flop; positiveedge trigger (3-state); TTL enabled (3-state) 4.5 - 5.5 ±8 4.3 -40~125 • • 74AHC377-Q100 octal D-type flip-flop with data enable; positive-edge trigger 2.0 - 5.5 ±8 3.9 -40~125 4 SOT163-1 (D) 3.7 -40~125 SOT403-1 (PW) ±8 SOT162-1 (D) SOT762-1 (BQ) 2.0 - 5.5 SOT109-1 (D) SOT402-1 (PW) dual D-type flip-flop with set and reset; positive-edge trigger SOT337-1 (DB) tpd (ns) 74AHC74-Q100 SOT108-1 (D) Description Tamb (°C) Type number IO (mA) Package (suffix) VCC (V) Features • Q100 logic portfolio 11 Flip/flops (continued) 74AHCT377-Q100 octal D-type flip-flop with data enable; positive-edge trigger; TTL enabled 4.5 - 5.5 ±8 4 -40~125 74AVC16374-Q100 16-bit D-type flip-flop; positive-edge trigger (3-state) 1.2 - 3.6 ± 12 1.5 -40~85 74HC74-Q100 dual D-type flip-flop with set and reset; positive-edge trigger 2.0 - 6.0 ± 5.2 14 -40~125 • • • 74HCT74-Q100 dual D-type flip-flop with set and reset; positive-edge trigger; TTL enabled 4.5 - 5.5 ±4 15 -40~125 • • • 74HC107-Q100 dual J-K flip-flop with reset; negative-edge trigger 2.0 - 6.0 ± 5.2 16 -40~125 • • 74HCT107-Q100 dual J-K flip-flop with reset; negative-edge trigger; TTL enabled 4.5 - 5.5 ±4 16 -40~125 • 74HC174-Q100 hex D-type flip-flop with reset; positive-edge trigger 2.0 - 6.0 ± 5.2 17 -40~125 • • 74HCT174-Q100 hex D-type flip-flop with reset; positive-edge trigger; TTL enabled 4.5 - 5.5 ±4 18 -40~125 • • 74HC175-Q100 quad D-type flip-flop with reset; positive-edge trigger 2.0 - 6.0 ± 5.2 17 -40~125 • • 74HCT175-Q100 quad D-type flip-flop with reset; positive-edge trigger; TTL enabled 4.5 - 5.5 ±4 16 -40~125 • • 74HC273-Q100 octal D-type flip-flop with reset; positive-edge trigger 2.0 - 6.0 ± 5.2 15 -40~125 • • • 74HCT273-Q100 octal D-type flip-flop with reset; positive-edge trigger; TTL enabled 4.5 - 5.5 ±4 15 -40~125 • • • 74HC377-Q100 octal D-type flip-flop with data enable; positive-edge trigger 2.0 - 6.0 ± 7.8 13 -40~125 • • • 74HCT377-Q100 octal D-type flip-flop with data enable; positive-edge trigger; TTL enabled 4.5 - 5.5 ±6 14 -40~125 • • • 74HC574-Q100 octal D-type flip-flop; positiveedge trigger (3-state) 2.0 - 6.0 ± 7.8 14 -40~125 • • 74HCT574-Q100 octal D-type flip-flop; positiveedge trigger; TTL enabled (3-state) 4.5 - 5.5 ±6 15 -40~125 • • 74LV74-Q100 dual D-type flip-flop with set and reset; positive-edge trigger 1.0 - 5.5 ± 12 11 -40~125 • • 74LVC74A-Q100 dual D-type flip-flop with set and reset; positive-edge trigger 1.2 - 3.6 ± 24 2.5 -40~125 • • 12 Q100 logic portfolio • SOT362-1 (DGG) SOT764-1 (BQ) SOT360-1 (PW) SOT339-1 (DB) SOT163-1 (D) SOT403-1 (PW) SOT162-1 (D) Tamb (°C) SOT109-1 (D) tpd (ns) SOT762-1 (BQ) Description IO (mA) SOT402-1 (PW) Type number VCC (V) SOT337-1 (DB) Package (suffix) SOT108-1 (D) Features • • • Flip/flops (continued) SOT764-1 (BQ) SOT362-1 (DGG) SOT360-1 (PW) 1.2 - 3.6 ± 24 3.4 -40~125 • • • 1.2 - 3.6 ± 24 3.8 -40~125 • 1.2 - 3.6 ± 24 3.8 -40~125 • octal D-type transparent latch (3-state) 74LVC16374A-Q100 16-bit D-type flip-flop; positive-edge trigger (3-state) HEF4013B-Q100 dual D-type flip-flop with set and reset; positive-edge trigger 4.5 - 15.5 ± 2.4 30 -40~85 HEF4027B-Q100 dual J-K flip-flop 4.5 - 15.5 ± 2.4 30 -40~85 • SOT163-1 (D) 74LVC573A-Q100 SOT339-1 (DB) • 1.2 - 3.6 SOT403-1 (PW) • octal D-type flip-flop; positiveedge trigger (3-state) SOT162-1 (D) • 74LVC374A-Q100 SOT109-1 (D) 2.7 -40~125 ± 24 SOT762-1 (BQ) ± 24 1.2 - 3.6 SOT402-1 (PW) • octal D-type flip-flop with reset; positive-edge trigger SOT337-1 (DB) • 74LVC273-Q100 SOT108-1 (D) Tamb (°C) • IO (mA) -40~125 Description VCC (V) 6 Type number 16-bit D-type flip-flop with bus 74LVCH16374A-Q100 hold; positive-edge trigger (3-state) Package (suffix) tpd (ns) Features • • For more information about automotive flip-flops visit www.nxp.com/products/automotive/logic/flip_flops/ Gates Description tpd (ns) Tamb (°C) SOT108-1 (D) SOT402-1 (PW) SOT762-1 (BQ) 74AHC00-Q100 quad 2-input NAND gate 2.0 - 5.5 ±8 3.2 -40~125 • • • 74AHCT00-Q100 quad 2-input NAND gate; TTL enabled 4.5 - 5.5 ±8 3.3 -40~125 • • • 74AHC02-Q100 quad 2-input NOR gate 2.0 - 5.5 ±8 2.9 -40~125 • • • 74AHCT02-Q100 quad 2-input NOR gate; TTL enabled 4.5 - 5.5 ±8 3.8 -40~125 • • • 74AHC08-Q100 quad 2-input AND gate 2.0 - 5.5 ±8 3.5 -40~125 • • • 74AHCT08-Q100 quad 2-input AND gate; TTL enabled 4.5 - 5.5 ±8 5 -40~125 • • • 74AHC30-Q100 8-input NAND gate 2.0 - 5.5 ±8 3.6 -40~125 • • • 74AHCT30-Q100 8-input NAND gate; TTL enabled 4.5 - 5.5 ±8 3.3 -40~125 • • • 74AHC32-Q100 quad 2-input OR gate 2.0 - 5.5 ±8 3.5 -40~125 • • • 74AHCT32-Q100 quad 2-input OR gate; TTL enabled 4.5 - 5.5 ±8 5 -40~125 • • • 74AHC86-Q100 quad 2-input EXCLUSIVE-OR gate 2.0 - 5.5 ±8 3.4 -40~125 • • • 74AHCT86-Q100 quad 2-input EXCLUSIVE-OR gate; TTL enabled 4.5 - 5.5 ±8 3.4 -40~125 • • • 74ALVC00-Q100 quad 2-input NAND gate 1.65-3.6 ± 24 2.1 -40~85 • • • SOT337-1 (DB) Type number IO (mA) Package (suffix) VCC (V) Features Q100 logic portfolio 13 Gates (continued) Description tpd (ns) Tamb (°C) SOT108-1 (D) SOT402-1 (PW) SOT762-1 (BQ) 74ALVC32-Q100 quad 2-input OR gate 1.65 - 3.6 ± 24 2 -40~125 • • • 74HC00-Q100 quad 2-input NAND gate 2.0 - 6.0 ± 5.2 7 -40~125 • • • 74HCT00-Q100 quad 2-input NAND gate; TTL enabled 4.5 - 5.5 ±4 10 -40~125 • • • 74HC02-Q100 quad 2-input NOR gate 2.0 - 6.0 ± 5.2 7 -40~125 • • • 74HCT02-Q100 quad 2-input NOR gate; TTL enabled 4.5 - 5.5 ±4 9 -40~125 • • • 74HC03-Q100 quad 2-input NAND gate; open-drain 2.0 - 6.0 5.2 8 -40~125 • 74HCT03-Q100 quad 2-input NAND gate; open-drain; TTL enabled 4.5 - 5.5 ±4 10 -40~125 • • 74HC08-Q100 quad 2-input AND gate 2.0 - 6.0 ± 5.2 7 -40~125 • • • 74HCT08-Q100 quad 2-input AND gate; TTL enabled 4.5 - 5.5 ±4 11 -40~125 • • • 74HC10-Q100 triple 3-input NAND gate 2.0 - 6.0 ± 5.2 9 -40~125 • • 74HCT10-Q100 triple 3-input NAND gate; TTL enabled 4.5 - 5.5 ±4 11 -40~125 • • 74HC11-Q100 triple 3-input AND gate 2.0 - 6.0 ± 5.2 10 -40~125 • • 74HCT11-Q100 triple 3-input AND gate; TTL enabled 4.5 - 5.5 ±4 11 -40~125 • • 74HC20-Q100 dual 4-input NAND gate 2.0 - 6.0 ± 5.2 8 -40~125 • • 74HCT20-Q100 dual 4-input NAND gate; TTL enabled 4.5 - 5.5 ±4 13 -40~125 • 74HC27-Q100 triple 3-input NOR gate 2.0 - 6.0 ± 5.2 8 -40~125 • • • 74HCT27-Q100 triple 3-input NOR gate; TTL enabled 4.5 - 5.5 ±4 10 -40~125 • • • 74HC30-Q100 8-input NAND gate 2.0 - 6.0 ± 5.2 12 -40~125 • • 74HCT30-Q100 8-input NAND gate; TTL enabled 4.5 - 5.5 ±4 12 -40~125 • • 74HC32-Q100 quad 2-input OR gate 2.0 - 6.0 ± 5.2 6 -40~125 • • • 74HCT32-Q100 quad 2-input OR gate; TTL enabled 4.5 - 5.5 ± 4.0 9 -40~125 • • • 74HC86-Q100 quad 2-input EXCLUSIVE-OR gate 2.0 - 6.0 ± 5.2 11 -40~125 • • 74HCT86-Q100 quad 2-input EXCLUSIVE-OR gate; TTL enabled 4.5 - 5.5 ±4 14 -40~125 • • 74HC4002-Q100 dual 4-input NOR gate 2.0 - 6.0 ± 5.2 9 -40~125 • • 74HC4075-Q100 triple 3-input OR gate 2.0 - 6.0 ± 5.2 8 -40~125 • • 74HCT4075-Q100 triple 3-input OR gate; TTL enabled 4.5 - 5.5 ±4 10 -40~125 • • 74LV08-Q100 quad 2-input AND gate 1.0 - 5.5 ± 12 7 -40~125 • • 74LVC00A-Q100 quad 2-input NAND gate 1.2 - 3.6 ± 24 2.1 -40~125 • • • 74LVC02A-Q100 quad 2-input NOR gate 1.2 - 3.6 ± 24 2.1 -40~125 • • • 74LVC08A-Q100 quad 2-input AND gate 1.2 - 3.6 ± 24 2.1 -40~125 • • • 74LVC32A-Q100 quad 2-input OR gate 1.2 - 3.6 ± 24 2.1 -40~125 • • • 74VHC02-Q100 quad 2-input NOR gate 2.0 - 5.5 ±8 2.9 -40~125 • • • 74VHCT02-Q100 quad 2-input NOR gate; TTL enabled 4.5 - 5.5 ±8 3.8 -40~125 • • • 74VHC08-Q100 quad 2-input AND gate 2.0 - 5.5 ±8 3.5 -40~125 • • 14 Q100 logic portfolio SOT337-1 (DB) Type number IO (mA) Package (suffix) VCC (V) Features • • • • Gates (continued) Description tpd (ns) Tamb (°C) SOT108-1 (D) SOT402-1 (PW) SOT762-1 (BQ) 74VHCT08-Q100 quad 2-input AND gate; TTL enabled 4.5 - 5.5 ±8 5 -40~125 • • • 74VHC32-Q100 quad 2-input OR gate 2.0 - 5.5 ±8 3.5 -40~125 • • 74VHCT32-Q100 quad 2-input OR gate; TTL enabled 4.5 - 5.5 ±8 5 -40~125 • • • HEF4001B-Q100 quad 2-input NOR gate 4.5 - 15.5 ± 2.4 20 -40~85 • HEF4011B-Q100 quad 2-input NAND gate 4.5 - 15.5 ± 2.4 20 -40~85 • HEF4030B-Q100 quad 2-input EXCLUSIVE-OR gate 4.5 - 15.5 ± 2.4 30 -40~85 • HEF4070B-Q100 quad 2-input EXCLUSIVE-OR gate 4.5 - 15.5 ± 2.4 30 -40~85 • HEF4081B-Q100 quad 2-input AND gate 4.5 - 15.5 ± 2.4 20 -40~85 • SOT362-1 (DGG) SOT337-1 (DB) Type number IO (mA) Package (suffix) VCC (V) Features For more information about automotive gates visit www.nxp.com/products/automotive/logic/gates/ Latches/registered drivers SOT360-1 (PW) SOT764-1 (BQ) 2.0 - 5.5 ±8 4.2 -40~125 • • • 74AHCT573-Q100 octal D-type transparent latch; TTL enabled (3-state) 4.5 - 5.5 ±8 3.9 -40~125 • • • 74HC4060-Q100 14-stage binary ripple counter with oscillator 2.0 - 6.0 ± 5.2 31 -40~125 • 74HC259-Q100 8 bit addressable latch 2.0 - 6.0 ± 5.2 18 -40~125 • • • 74HCT259-Q100 8-Bit addressable latch; TTL enabled 4.5 - 5.5 ±4 20 -40~125 • • • 74HC373-Q100 octal D-type transparent latch (3-state) 2.0 - 6.0 ± 7.8 12 -40~125 • • • 74HCT373-Q100 octal D-type transparent latch; TTL enabled (3-state) 4.5 - 5.5 ±6 14 -40~125 • • • 74HC573-Q100 octal D-type transparent latch (3-state) 2.0 - 6.0 ± 7.8 14 -40~125 • • • 74HCT573-Q100 octal D-type transparent latch; TTL enabled (3-state) 4.5 - 5.5 ±6 17 -40~125 • • • 74LVC373A-Q100 octal D-type transparent latch (3-state) 1.2 - 3.6 ± 24 3 -40~125 • • • 74LVC16373A-Q100 16-bit D-type transparent latch (3-state) 1.2 - 3.6 ± 24 2.4 -40~125 • 74LVCH16373A-Q100 16-bit D-type transparent latch with bushold (3-state) 1.2 - 3.6 ± 24 2.4 -40~125 • HEF4043B-Q100 quad R/S latch with set and reset (3-state) 4.5 - 15 ± 2.4 25 -40~85 SOT339-1 (DB) octal D-type transparent latch (3-state) SOT163-1 (D) Tamb (°C) 74AHC573-Q100 SOT763-1 (BQ) tpd (ns) SOT403-1 (PW) Description SOT109-1 (D) Type number IO (mA) Package (suffix) VCC (V) Features • • • For more information about automotive latches and registered drivers visit www.nxp.com/products/automotive/logic/latches_registered_drivers/ Q100 logic portfolio 15 Level shifters/translators -40~125 74AVC4T245-Q100 4-bit dual-supply voltage level translating transceiver (3-state) 0.8 - 3.6 0.8 - 3.6 ± 12 -40~125 74AVC8T245-Q100 8-bit dual-supply voltage level translating transceiver (3-state) 0.8 - 3.6 0.8 - 3.6 ± 12 -40~125 74AVC16T245-Q100 16-bit dual-supply voltage level translating transceiver (3-state) 0.8 - 3.6 0.8 - 3.6 ± 12 -40~125 74AVCH4T245-Q100 4-bit dual-supply voltage translating transceiver with bus hold (3-state) 0.8 - 3.6 0.8 - 3.6 ± 12 -40~125 • • 74HC4050-Q100 hex buffer with 15V tolerant inputs 2.0 - 6.0 ± 5.2 -40~125 • • 74LVC4245A-Q100 8-bit dual-supply voltage translating transceiver (3-state) 1.5 - 5.5 1.5 - 3.6 ± 24 -40~125 74LVC8T245-Q100 8-bit dual-supply voltage translating transceiver (3-state) 1.2 - 5.5 1.2 - 5.5 ± 24 74LVCH8T245-Q100 8-bit dual-supply voltage translating transceiver with bus hold (3-state) 1.2 - 5.5 1.2 - 5.5 HEF4104B-Q100 quad low-to-high voltage translator (3-state) 3.0 15.0 n.a 3.0 15.0 SOT480-1 (DGV) ± 24 SOT362-1 (DGG) 1.5 - 3.6 1.5 - 5.5 SOT815-1 (BQ) 16-bit dual-supply voltage level translating transceiver (3-state) SOT355-1 (PW) 74ALVC164245-Q100 SOT137-1 (D) Description SOT763-1 (BQ) SOT403-1 (PW) Type number Tamb (°C) SOT109-1 (D) Package (suffix) IO (mA) VCC(B) (V) VCC(A) (V) Features • • • • • • • • • • • -40~125 • • ± 24 -40~125 • • ± 2.4 -40~85 • For more information about automotive level shifters/translators visit www.nxp.com/products/automotive/logic/level_shifters_translators/ Multivibrators Type number Description IO (mA) tpd (ns) Tamb (°C) SOT109-1 (D) SOT403-1 (PW) SOT763-1 (BQ) Package (suffix) VCC (V) Features 74AHC123A-Q100 dual retriggerable monostable multivibrator with reset 2.0 - 5.5 ±8 5.1 -40~125 • • • 74AHCT123A-Q100 dual retriggerable monostable multivibrator with reset; TTL enabled 4.5 - 5.5 ±8 5 -40~125 • • • 74HC123-Q100 dual retriggerable monostable multivibrator with reset 2.0 - 6.0 ± 7.8 9 -40~125 • • • 74HCT123-Q100 dual retriggerable monostable multivibrator with reset; TTL enabled 4.5 - 5.5 ±4 26 -40~125 • • 74HC4538-Q100 dual retriggerable precision monostable multivibrator 2.0 - 6.0 ± 5.2 27 -40~125 • • 74HCT4538-Q100 dual retriggerable precision monostable multivibrator; TTL enabled 4.5 - 5.5 ±4 30 -40~125 • • HEF4538B-Q100 dual retriggerable precision monostable multivibrator 4.5 - 15.5 ± 2.4 60 -40~85 • For more information about automotive multivibrators visit www.nxp.com/products/automotive/logic/multivibrators/ 16 Q100 logic portfolio Schmitt-triggers Type number Description IO (mA) tpd (ns) Tamb (°C) SOT108-1 (D) SOT402-1 (PW) SOT762-1 (BQ) SOT163-1 (D) SOT360-1 (PW) Package (suffix) VCC (V) Features 74AHC14-Q100 hex inverter Schmitt-trigger 2.0 - 5.5 ±8 3.2 -40~125 • • • 74AHCT14-Q100 hex inverter Schmitt-trigger; TTL enabled 4.5 - 5.5 ±8 4 -40~125 • • • 74AHC132-Q100 quad 2-input NAND gate Schmitt-trigger 2.0 - 5.5 ±8 3.3 -40~125 • • • 74AHCT132-Q100 quad 2-input NAND gate Schmitt-trigger; TTL enabled 4.5 - 5.5 ±8 3.5 -40~125 • • • 74HC7014-Q100 hex buffer precision Schmitt-trigger 2.0 - 6.0 ± 5.2 27 -40~125 • 74HC14-Q100 hex inverter Schmitt-trigger 2.0 - 6.0 ± 5.2 12 -40~125 • • • 74HCT14-Q100 hex inverter Schmitt-trigger; TTL enabled 4.5 - 5.5 ±4 17 -40~125 • • • 74HC132-Q100 quad 2-input NAND gate Schmitt-trigger 2.0 - 6.0 ± 5.2 11 -40~125 • • 74HCT132-Q100 quad 2-input NAND gate Schmitt-trigger; TTL enabled 4.5 - 5.5 ±4 17 -40~125 • • 74HC7541-Q100 octal buffer/line driver Schmitt-trigger (3-State) 2.0 - 6.0 ± 7.8 11 -40~125 • • 74HCT7541-Q100 octal buffer/line driver Schmitt-trigger; TTL enabled (3-State) 4.5 - 5.5 ±6 16 -40~125 • • 74LV132-Q100 quad 2-input NAND gate Schmitt-trigger 1.0 - 5.5 ± 12 10 -40~125 • • • 74LVC14A-Q100 hex inverter Schmitt-trigger 1.2 - 3.6 ± 24 3.2 -40~125 • • • 74LVC132A-Q100 quad 2-input NAND gate Schmitt-trigger 1.2 - 3.6 ± 24 3.4 -40~125 • • • HEF40106B-Q100 hex inverter Schmitt-trigger 4.5 - 15.5 ± 2.4 30 -40~85 • • For more information about automotive Schmitt-triggers visit www.nxp.com/products/automotive/logic/schmitt_triggers/ Q100 logic portfolio 17 Shift registers tpd (ns) Tamb (°C) SOT108-1 (D) SOT402-1 (PW) SOT762-1 (BQ) SOT109-1 (D) SOT338-1 (DB) SOT403-1 (PW) SOT763-1 (BQ) 74AHC164-Q100 8-bit serial-in/parallel-out shift register 2.0 - 5.5 ±8 4.5 -40~125 • • • 74AHCT164-Q100 8-bit serial-in/parallel-out shift register; TTL enabled 4.5 - 5.5 ±8 3.4 -40~125 • • • 74AHC594-Q100 8-bit serial-in/parallel-out shift register with output register 2.0 - 5.5 ±8 4.1 -40~125 • • • • 74AHCT594-Q100 8-bit serial-in/parallel-out shift register with output register; TTL enabled 4.5 - 5.5 ±8 3.8 -40~125 • • • • 74AHC595-Q100 8-bit serial-in/parallel-out shift register with output register (3-state) 2.0 - 5.5 ±8 4 -40~125 • • • 74AHCT595-Q100 8-bit serial-in/parallel-out shift register with output storage; TTL enabled (3-state) 4.5 - 5.5 ±8 3.8 -40~125 • • • 74HC164-Q100 8-bit serial-in/parallel-out shift register 2.0 - 6.0 ± 5.2 12 -40~125 • • • 74HCT164-Q100 8-bit serial-in/parallel-out shift register; TTL enabled 4.5 - 5.5 ±4 12 -40~125 • • • 74HC165-Q100 8-bit parallel or serial-in/serial-out shift register 2.0 - 6.0 ± 5.2 16 -40~125 • • • 74HCT165-Q100 8-bit parallel or serial-in/serial-out shift register; TTL enabled 4.5 - 5.5 ±4 14 -40~125 • • • 74HC166-Q100 8-bit parallel or serial-in/serial-out shift register 2.0 - 6.0 ± 5.2 15 -40~125 • • 74HCT166-Q100 8-bit parallel or serial-in/serial-out shift register; TTL enabled 4.5 - 5.5 ±4 23 -40~125 • 74HC594-Q100 8-bit serial-in/parallel-out shift register with output storage register 2.0 - 6.0 ± 7.8 14 -40~125 • 74HCT594-Q100 8-bit serial-in/parallel-out shift register with output storage register; TTL enabled 4.5 - 5.5 ±6 15 -40~125 • 74HC595-Q100 8-bit serial-in/parallel-out shift register with output storage register (3-state) 2.0 - 6.0 ± 7.8 16 -40~125 • 74HCT595-Q100 8-bit serial-in/parallel-out shift register with output storage register; TTL enabled (3-state) 4.5 - 5.5 ±6 25 -40~125 74HC597-Q100 8-bit parallel or serial-in/parallel-out shift register with parallel input register 2.0 - 6.0 ± 5.2 16 74HCT597-Q100 8-bit parallel or serial-in/parallel-out shift register with parallel input register; TTL enabled 4.5 - 5.5 ±4 74HC4094-Q100 8-bit serial-in/serial or parallel-out shift register with output register (3-state) 2.0 - 6.0 74HCT4094-Q100 8-bit serial-in/serial or parallel-out shift register with output register; TTL enabled (3-state) 74LV164-Q100 74LV165-Q100 18 • • • • • -40~125 • • 20 -40~125 • ± 5.2 15 -40~125 • • 4.5 - 5.5 ±4 19 -40~125 • • 8-bit serial-in/parallel-out shift register 1.0 - 5.5 ± 12 12 -40~125 8-bit parallel or serial-in/serial-out shift register 1.0 - 5.5 ± 12 18 -40~125 Q100 logic portfolio • • • • • • • SOT360-1 (PW) Description SOT163-1 (D) Type number IO (mA) Package (suffix) VCC (V) Features Shift registers (continued) 8-bit parallel or serial-in/serial-out shift register 1.0 - 5.5 ± 12 7.5 -40~125 • • 74LV4060-Q100 14-stage binary ripple counter with oscillator 1.0 - 5.5 ±6 29 -40~125 • • 74LVC594A-Q100 8-bit serial-in/parallel-out shift register with output storage register 1.2 - 5.5 ± 24 3.1 -40~125 • • • 74VHC595-Q100 8-bit serial-in/parallel-out shift register with output storage register (3-state) 2.0 - 5.5 ±8 4 -40~125 • • • 74VHCT595-Q100 8-bit serial-in/parallel-out shift register with output storage register; TTL enabled (3-state) 4.5 - 5.5 ±8 3.8 -40~125 • • • HEF4014B-Q100 8-bit shift register with synchronous parallel enable 4.5 - 15 ± 2.4 40 -40~85 • HEF4021B-Q100 8-bit shift register with asynchronous parallel 4.5 - 15 load ± 2.4 40 -40~85 • • HEF4094B-Q100 8-bit serial-in/serial or parallel-out shift register with output register (3-state) 4.5 - 15 ± 2.4 50 -40~85 • • HEF4794B-Q100 8-bit serial-in/serial or parallel-out shift register with output register LED driver (3-state) 4.5 - 15 -20 45 -40~85 • HEF4894B-Q100 12-bit serial-in/serial or parallel-out shift register with output register LED driver (3-state) 4.5 - 15 -20 45 -40~85 NPIC6C595-Q100 8-bit serial-in/parallel-out shift register with output storage register (3-state) 4.5 - 5.5 -100 90 -40~125 • • • NPIC6C596-Q100 8-bit serial-in/serial or parallel-out shift register with output register LED driver (3-state) 4.5 - 5.5 -100 90 -40~125 • • • 8-bit serial-in/serial or parallel-out shift NPIC6C596A-Q100 register with output register LED driver (3-state) 2.3 - 5.5 -100 90 -40~125 • • • 12-bit serial-in/serial or parallel-out shift NPIC6C4894-Q100 register with output register LED driver (3-state) 4.5 - 5.5 -100 105 -40~125 SOT360-1 (PW) 74LV165A-Q100 SOT163-1 (D) SOT763-1 (BQ) SOT403-1 (PW) Tamb (°C) SOT338-1 (DB) tpd (ns) SOT109-1 (D) Description IO (mA) SOT762-1 (BQ) Type number VCC (V) SOT402-1 (PW) Package (suffix) SOT108-1 (D) Features • • • • For more information about automotive Shift registers visit www.nxp.com/products/automotive/logic/shift_registers/ Q100 logic portfolio 19 Transceivers Description tpd (ns) Tamb (°C) SOT163-1 (D) SOT360-1 (PW) SOT764-1 (BQ) 74AHC245-Q100 octal transceiver (3-state) 2.0 - 5.5 ±8 3.5 -40~125 • • • 74AHCT245-Q100 octal transceiver; TTL enabled (3-state) 4.5 - 5.5 ±8 5 -40~125 • • • 74AVC16245-Q100 16-bit transceiver (3-state) 1.2 - 3.6 ± 12 2 -40~85 74HC245-Q100 octal transceiver (3-state) 2.0 - 6.0 ± 7.8 7 -40~125 • • • 74HCT245-Q100 octal transceiver; TTL enabled (3-state) 4.5 - 5.5 ±6 10 -40~125 • • • 74LVC245A-Q100 octal transceiver (3-state) 1.2 - 3.6 ± 24 2.9 -40~125 • • • 74LVCH245A-Q100 octal transceiver with bus hold (3-state) 1.2 - 3.6 ± 24 2.9 -40~125 • • • 74LVC16245A-Q100 16-bit transceiver (3-state) 1.2 - 3.6 ± 24 3 -40~125 • • 74LVCH16245A-Q100 16-bit transceiver with bus hold (3-state) 1.2 - 3.6 ± 24 3 -40~125 • • SOT702-1 (EV) Type number IO (mA) SOT362-1 (DGG) Package (suffix) VCC (V) Features • For more information about automotive transceivers visit www.nxp.com/products/automotive/logic/transceivers/ Standard logic packages Package suffix D DB PW BQ D DB PW BQ 14-pin 14-pin 14-pin 14-pin 16-pin 16-pin 16-pin 16-pin SOT108-1 SOT337-1 SOT402-1 SOT762-1 SOT109-1 SOT338-1 SOT403-1 SOT763-1 Width (mm) 6.00 7.75 6.40 2.50 6.00 7.75 6.40 2.50 Length (mm) 8.65 6.20 5.00 3.00 9.90 6.20 5.00 3.50 Height (mm) 1.75 2.00 1.10 1.00 1.75 2.00 1.10 1.00 Pitch (mm) 1.27 0.65 0.65 0.50 1.27 0.65 0.65 0.50 Package Package suffix D DB PW BQ D PW DGG EV 20-pin 20-pin 20-pin 20-pin 24-pin 24-pin 48-pin 56-pin SOT163-1 SOT339-1 SOT360-1 SOT764-1 SOT137-1 SOT355-1 SOT362-1 SOT702-1 Width (mm) 10.30 7.75 6.40 2.50 10.30 6.40 8.10 4.50 Length (mm) 12.80 7.20 6.50 4.50 15.40 7.80 12.50 7.00 Height (mm) 2.65 2.00 1.10 1.00 2.65 1.10 1.20 1.00 Pitch (mm) 1.27 0.65 0.65 0.5 1.27 0.65 0.50 0.65 Package Note: The HEF4000B family uses different package suffixes than the other families. Package suffix D corresponds to HEF4000B package suffix T, DB to TS and PW to TT. 20 Q100 logic portfolio Q100 mini logic functions and packages Mini-Logic functions Mini logic functions are small footprint logic devices with 10 pins or less suitable for use at supply voltage between 1.1 V to 6.0 V. They provide a wide range of functions including analog switches, buffers/inverters, bus switches, decoders/de-multiplexers, multiplexers, flip-flops, gates, configurable logic and level shifters. Q100 Mini logic functions are available in leaded TSSOP and VSSOP packages as well as innovative leadless XSON packages. Analog switches Description RON (W) RON(FLAT) (W) Tamb (°C) SOT353-1 (GW) SOT753 (GV) SOT505-2 (DP) SOT765-1 (DC) 74AHC1G66-Q100 single-pole, single-throw analog switch SPST-NO 2.0 - 5.5 40 5 -40~125 • • 74AHCT1G66-Q100 single-pole, single-throw analog switch; TTL enabled SPST-NO 4.5 - 5.5 40 5 -40~125 • • 74HC1G66-Q100 single-pole, single-throw analog switch SPST-NO 2.0 - 9.0 105 23 -40~125 • • 74HCT1G66-Q100 single-pole, single-throw analog switch; TTL enabled SPST-NO 4.5 - 5.5 118 23 -40~125 • • 74HC2G66-Q100 dual single-pole, single-throw analog switch SPST-NO 2.0 - 9.0 105 23 -40~125 • • 74HCT2G66-Q100 dual single-pole, single-throw analog switch; TTL enabled SPST-NO 4.5 - 5.5 118 23 -40~125 • • 74LVC1G53-Q100 single-pole, double-throw analog switch SPDT-Z 1.65 - 5.5 15 1.5 -40~125 • • 74LVC1G66-Q100 single-pole, single-throw analog switch SPST-NO 1.65 - 5.5 15 1.5 -40~125 • • 74LVC1G384-Q100 single-pole, single-throw analog switch SPST-NC 1.65 - 5.5 15 1.5 -40~125 • • 74LVC1G3157-Q100 single-pole, double-throw analog switch 1.65 - 5.5 15 1.5 -40~125 74LVC2G66-Q100 dual single-pole, single-throw analog switch SPST-NO 1.65 - 5.5 15 1.5 -40~125 • • SPDT SOT457 (GV) SOT363 (GW) Type number VCC (V) Package (suffix) Configuration Features • • For more information about automotive analog switches visit www.nxp.com/products/automotive/logic/analog_switches/ Bus switches SOT96-1 (D) SOT530-1 (PW) dual bus switch Tamb (°C) CBT3306-Q100 RON (W) Description VPASS (V) Type number Package (suffix) VCC (V) Features 4.5 - 5.5 3.9 7 -40~85 • • For more information about automotive bus switches visit www.nxp.com/products/automotive/logic/bus_switches/ Q100 logic portfolio 21 Buffers/inverters Tamb (°C) SOT353-1 (GW) SOT753 (GV) single inverter; unbuffered 2.0 - 5.5 ±8 2.6 -40~125 • • 74AHC3GU04-Q100 triple inverter; unbuffered 2.0 - 5.5 ±8 2.5 -40~125 74AHC1G04-Q100 single inverter 2.0 - 5.5 ±8 3.1 -40~125 • • 74AHCT1G04-Q100 single inverter; TTL enabled 4.5 - 5.5 ±8 3.4 -40~125 • • 74AHC1G07-Q100 single buffer; open-drain 2.0 - 5.5 8 4.2 -40~125 • • 74AHC1G125-Q100 single buffer/line driver (3-state) 2.0 - 5.5 ±8 3.4 -40~125 • • 74AHCT1G125-Q100 single buffer/line driver; TTL enabled (3-state) 4.5 - 5.5 ±8 3.4 -40~125 • • 74AHC1G126-Q100 single buffer/line driver (3-state) 2.0 - 5.5 ±8 3.4 -40~125 • • 74AHCT1G126-Q100 single buffer/line driver; TTL enabled (3-state) 4.5 - 5.5 ±8 3.4 -40~125 • • 74AHC2G125-Q100 dual buffer/line driver (3-state) 2.0 - 5.5 ±8 3.4 74AHCT2G125-Q100 dual buffer/line driver; TTL enabled (3-state) 4.5 - 5.5 ±8 74AHC2G126-Q100 dual buffer/line driver (3-state) 2.0 - 5.5 74AHCT2G126-Q100 dual buffer/line driver; TTL enabled (3-state) 74AHC2G241-Q100 -40~125 • • 3.4 -40~125 • • ±8 3.4 -40~125 • • 4.5 - 5.5 ±8 3.4 -40~125 • • dual buffer/line driver (3-state) 2.0 - 5.5 ±8 3.4 -40~125 • • 74AHCT2G241-Q100 dual buffer/line driver; TTL enabled (3-state) 4.5 - 5.5 ±8 3.4 -40~125 • • 74AHC3G04-Q100 triple inverter 2.0 - 5.5 ±8 3.1 -40~125 • • 74AHCT3G04-Q100 triple inverter; TTL enabled 4.5 - 5.5 ±8 3 -40~125 • • 74AUP1G04-Q100 single inverter 1.1 - 3.6 ± 1.9 4 -40~125 • 74AUP1G06-Q100 single inverter; open-drain 1.1 - 3.6 1.9 4.5 -40~125 • 74AUP1G34-Q100 single buffer 1.1 - 3.6 ± 1.9 3.9 -40~125 • 74AUP1G125-Q100 single buffer/line driver (3-state) 1.1 - 3.6 ± 1.9 4.3 -40~125 • 74AUP2GU04-Q100 dual inverter; unbuffered 1.1 - 3.6 ± 1.9 2.3 -40~125 74HC1GU04-Q100 single inverter; unbuffered 2.0 - 6.0 ± 2.6 5 -40~125 74HC2GU04-Q100 dual inverter; unbuffered 2.0 - 6.0 ± 5.2 5 -40~125 74HC3GU04-Q100 triple inverter; unbuffered 2.0 - 6.0 ± 5.2 6 -40~125 • • 74HC1G04-Q100 single inverter 2.0 - 6.0 ± 2.6 7 -40~125 • • 74HCT1G04-Q100 single inverter; TTL enabled 4.5 - 5.5 ± 2.0 8 -40~125 • • 74HC1G125-Q100 single buffer/line driver (3-state) 2.0 - 6.0 ± 2.6 9 -40~125 • • 74HCT1G125-Q100 single buffer/line driver; TTL enabled (3-state) 4.5 - 5.5 ± 2.0 10 -40~125 • • 74HC2G04-Q100 dual inverter 2.0 - 6.0 ± 5.2 8 -40~125 • • 74HCT2G04-Q100 dual inverter; TTL enabled 4.5 - 5.5 ± 4.0 10 -40~125 • • 74HC2G34-Q100 dual buffer 2.0 - 6.0 ± 5.2 9 -40~125 • • 74HCT2G34-Q100 dual buffer; TTL enabled 4.5 - 5.5 ± 4.0 10 -40~125 • • 74HC2G125-Q100 dual buffer/line driver (3-state) 2.0 - 6.0 ± 5.2 10 -40~125 • • 22 Q100 logic portfolio SOT457 (GV) • SOT363 (GW) • • • • • • • SOT996-2 (GD) tpd (ns) 74AHC1GU04-Q100 SOT765-1 (DC) Description SOT505-2 (DP) Type number IO (mA) Package (suffix) VCC (V) Features Buffers/inverters (continued) tpd (ns) Tamb (°C) SOT505-2 (DP) SOT765-1 (DC) dual buffer/line driver; TTL enabled (3-state) 4.5 - 5.5 ± 4.0 12 -40~125 • • 74HC3G04-Q100 triple inverter 2.0 - 6.0 ± 5.2 8 -40~125 • • • 74HCT3G04-Q100 triple inverter; TTL enabled 4.5 - 5.5 ± 4.0 10 -40~125 • • • 74HC3G07-Q100 triple buffer; open-drain 2.0 - 6.0 5.2 9 -40~125 • • 74HCT3G07-Q100 triple buffer; open-drain; TTL enabled 4.5 - 5.5 4 9 -40~125 • • 74HC3G34-Q100 triple buffer 2.0 - 6.0 ± 5.2 9 -40~125 • • 74HCT3G34-Q100 triple buffer; TTL enabled 4.5 - 5.5 ± 4.0 10 -40~125 74LVC1G04-Q100 single inverter 1.65 5.5 ± 32 2 -40~125 • • 74LVC1G06-Q100 single inverter; open-drain 1.65 5.5 32 2.3 -40~125 • • 74LVC1G07-Q100 single buffer; open-drain 1.65 5.5 32 2.2 -40~125 • • 74LVC1G34-Q100 single buffer 1.65 5.5 ± 32 2 -40~125 • • 74LVC1G125-Q100 single buffer/line driver (3-state) 1.65 5.5 ± 32 2.1 -40~125 • • 74LVC1G126-Q100 single buffer/line driver (3-state) 1.65 5.5 ± 32 2 -40~125 • • 74LVC1GU04-Q100 single inverter; unbuffered 1.65 5.5 ± 32 1.6 -40~125 • • 74LVC2G04-Q100 dual inverter 1.65 5.5 ± 32 2.7 -40~125 • • 74LVC2G06-Q100 dual inverter; open-drain 1.65 5.5 32 2.3 -40~125 • • 74LVC2G07-Q100 dual buffer; open-drain 1.65 5.5 32 2.6 -40~125 • • 74LVC2G125-Q100 dual buffer/line driver (3-state) 1.65 5.5 ± 32 2.3 -40~125 • • 74LVC2G240-Q100 dual inverter/line driver (3-state) 1.65 5.5 ± 32 2.5 -40~125 • • 74LVC2G241-Q100 dual buffer/line driver (3-state) 1.65 5.5 ± 32 2.6 -40~125 • • 74LVC2GU04-Q100 dual inverter; unbuffered 1.65 5.5 ± 32 2.3 -40~125 74LVC3G04-Q100 triple inverter 1.65 5.5 ± 32 2.7 -40~125 • • 74LVC3G07-Q100 triple buffer; open-drain 1.65 5.5 32 2.1 -40~125 • • 74LVC3G34-Q100 triple buffer 1.65 5.5 ± 32 2.2 -40~125 • • SOT457 (GV) IO (mA) 74HCT2G125-Q100 SOT363 (GW) Description SOT753 (GV) Type number VCC (V) SOT996-2 (GD) Package (suffix) SOT353-1 (GW) Features • • • For more information about automotive buffers/inverters visit: www.nxp.com/products/automotive/logic/buffers_inverters_drivers/ Q100 logic portfolio 23 Digital decoders/demultiplexers SOT363 (GW) SOT457 (GV) 1-to-2 demultiplexer (3-state) Tamb (°C) 74LVC1G18-Q100 tpd (ns) Description IO (mA) Type number Package (suffix) VCC (V) Features 1.65 - 5.5 ± 32 2.3 -40~125 • • For more information about automotive digital decoders/demultiplexers visit: www.nxp.com/products/automotive/logic/digital_decoders_demultiplexers/ Digital multiplexers SOT363 (GW) SOT457 (GV) single 2-input multiplexer Tamb (°C) 74LVC1G157-Q100 tpd (ns) Description IO (mA) Type number Package (suffix) VCC (V) Features 1.65 - 5.5 ± 32 2.2 -40~125 • • For more information about automotive digital multiplexers visit: www.nxp.com/products/automotive/logic/digital_multiplexers/ Flip-flops SOT753 (GV) ±8 3.5 -40~125 • • 74AHCT1G79-Q100 single D-type flip-flop; positive-edge trigger; TTL enabled 4.5 - 5.5 ±8 3.5 -40~125 • • 74AUP1G175-Q100 single D flip-flop with reset; positive-edge trigger 1.1 - 3.6 ± 1.9 7.4 -40~125 • 74AUP1G374-Q100 single D-type flip-flop; positive-edge trigger (3-state) 1.1 - 3.6 ± 1.9 7.9 -40~125 • 74AUP2G79-Q100 dual D-type flip-flop; positive-edge trigger 1.1 - 3.6 ± 1.9 8.5 -40~125 74LVC1G74-Q100 single D-type flip-flop with set and reset; positiveedge trigger 1.65 - 5.5 ± 32 3.5 -40~125 74LVC1G80-Q100 single D-type flip-flop; positive-edge trigger 1.65 - 5.5 ± 32 2.4 -40~125 74LVC1G175-Q100 single D flip-flop with reset; positive-edge trigger 1.65 - 5.5 ± 32 3.1 -40~125 74LVC2G74-Q100 single D-type flip-flop with set and reset; positiveedge trigger 1.65 - 5.5 ± 32 3.5 -40~125 For more information about automotive flip-flops visit: www.nxp.com/products/automotive/logic/flip_flops/ 24 Q100 logic portfolio SOT996-2 (GD) SOT353-1 (GW) 2.0 - 5.5 SOT765-1 (DC) Tamb (°C) single D-type flip-flop; positive-edge trigger SOT505-2 (DP) tpd (ns) 74AHC1G79-Q100 SOT457 (GV) Description SOT363 (GW) Type number IO (mA) Package (suffix) VCC (V) Features • • • • • • • • • • Gates tpd (ns) Tamb (°C) SOT353-1 (GW) SOT753 (GV) SOT505-2 (DP) SOT765-1 (DC) 74AHC1G09-Q100 single 2-input AND gate; open-drain 2.0 - 5.5 ±8 3.2 -40~125 • • 74AHC1G00-Q100 single 2-input NAND gate 2.0 - 5.5 ±8 3.5 -40~125 • • 74AHCT1G00-Q100 single 2-input NAND gate; TTL enabled 4.5 - 5.5 ±8 3.6 -40~125 • • 74AHC1G02-Q100 single 2-input NOR gate 2.0 - 5.5 ±8 3.2 -40~125 • • 74AHCT1G02-Q100 single 2-input NOR gate; TTL enabled 4.5 - 5.5 ±8 3.5 -40~125 • • 74AHC1G08-Q100 single 2-input AND gate 2.0 - 5.5 ±8 3.2 -40~125 • • 74AHCT1G08-Q100 single 2-input AND gate; TTL enabled 4.5 - 5.5 ±8 3.6 -40~125 • • 74AHC1G32-Q100 single 2-input OR gate 2.0 - 5.5 ±8 3.2 -40~125 • • 74AHCT1G32-Q100 single 2-input OR gate; TTL enabled 4.5 - 5.5 ±8 3.3 -40~125 • • 74AHC1G86-Q100 2-input EXCLUSIVE-OR gate 2.0 - 5.5 ±8 3.4 -40~125 • • 74AHCT1G86-Q100 2-input EXCLUSIVE-OR gate; TTL enabled 4.5 - 5.5 ±8 3.5 -40~125 • • 74AHC2G00-Q100 dual 2-input NAND gate 2.0 - 5.5 ±8 3.5 -40~125 • • 74AHCT2G00-Q100 dual 2-input NAND gate; TTL enabled 4.5 - 5.5 ±8 3.6 -40~125 • • 74AHC2G08-Q100 dual 2-input AND gate 2.0 - 5.5 ±8 3.2 -40~125 • • 74AHCT2G08-Q100 dual 2-Input AND gate; TTL enabled 4.5 - 5.5 ±8 3.6 -40~125 • • 74AHC2G32-Q100 dual 2-input OR gate 2.0 - 5.5 ±8 3.2 -40~125 • • 74AHCT2G32-Q100 dual 2-input OR gate; TTL enabled 4.5 - 5.5 ±8 3.3 -40~125 • • 74AUP1G02-Q100 single 2-input NOR gate 1.1 - 3.6 ± 1.9 8.2 -40~125 • 74AUP1G08-Q100 single 2-input AND gate 1.1 - 3.6 ± 1.9 8.2 -40~125 • 74AUP1G32-Q100 single 2-input OR gate 1.1 - 3.6 ±1.9 7.9 -40~125 • 74AUP1G86-Q100 single 2-input EXCLUSIVE-OR gate 1.1 - 3.6 ± 1.9 3.3 -40~125 • 74AUP1T98-Q100 configurable gate with voltage level translation 2.3-3.6 V ±1.9 8.7 -40~125 74HC1G86-Q100 single 2-input EXCLUSIVE-OR gate 2.0 - 6.0 ± 2.6 9 -40~125 • 74HC1GU04-Q100 single inverter; unbuffered 2.0 - 6.0 ± 2.6 5 -40~125 • 74HC1G00-Q100 single 2-input NAND gate 2.0 - 6.0 ± 2.6 7 -40~125 • 74HCT1G00-Q100 single 2-input NAND gate; TTL enabled 4.5 - 5.5 ±2 10 -40~125 • • 74HC1G02-Q100 single 2-input NOR gate 2.0 - 6.0 ± 2.6 7 -40~125 • • 74HCT1G02-Q100 single 2-input NOR gate; TTL enabled 4.5 - 5.5 ± 2.0 9 -40~125 • • 74HC1G08-Q100 single 2-input AND gate 2.0 - 6.0 ± 5.2 7 -40~125 • • 74HCT1G08-Q100 single 2-input AND gate; TTL enabled 4.5 - 5.5 ±2 11 -40~125 • • 74HC1G32-Q100 single 2-input OR gate 2.0 - 6.0 ± 2.6 8 -40~125 • • 74HCT1G32-Q100 single 2-input OR gate; TTL enabled 4.5 - 5.5 ± 2.0 10 -40~125 • • 74HC2G00-Q100 dual 2-input NAND gate 2.0 - 6.0 ± 5.6 9 -40~125 • • 74HCT2G00-Q100 dual 2-input NAND gate; TTL enabled 4.5 - 5.5 ±4 12 -40~125 • • SOT457 (GV) Description SOT363 (GW) Type number IO (mA) Package (suffix) VCC (V) Features • • Q100 logic portfolio 25 Gates (continued) Package (suffix) tpd (ns) Tamb (°C) SOT505-2 (DP) SOT765-1 (DC) dual 2-input NOR gate 2.0 - 6.0 ± 5.2 9 -40~125 • • 74HCT2G02-Q100 dual 2-input NOR gate; TTL enabled 4.5 - 5.5 ±4 12 -40~125 • • 74HC2G08-Q100 dual 2-input AND gate 2.0 - 6.0 ± 5.2 9 -40~125 • • 74HCT2G08-Q100 dual 2-Input AND gate; TTL enabled 4.5 - 5.5 ±4 14 -40~125 • • 74HC2G32-Q100 dual 2-input OR gate 2.0 - 6.0 ± 5.2 9 -40~125 • • 74HCT2G32-Q100 dual 2-input OR gate; TTL enabled 4.5 - 5.5 ± 4.0 13 -40~125 • • 74HC2G86-Q100 dual 2-input EXCLUSIVE-OR gate 2.0 - 6.0 ± 5.2 9 -40~125 • • 74HCT2G86-Q100 dual 2-input EXCLUSIVE-OR gate; TTL enabled 4.5 - 5.5 ± 4.0 11 -40~125 • • 74HCT1G86-Q100 single 2-input EXCLUSIVE-OR gate; TTL enabled 4.5 - 5.5 ± 2.0 10 -40~125 • • 74LVC1G00-Q100 single 2-input NAND gate 1.65 - 5.5 ± 32 2.2 -40~125 • • 74LVC1G02-Q100 single 2-input NOR gate 1.65 - 5.5 ± 32 2.1 -40~125 • • 74LVC1G08-Q100 single 2-input AND gate 1.65 - 5.5 ± 32 2.1 -40~125 • • 74LVC1G11-Q100 single 3-input AND gate 1.65 - 5.5 ± 32 2.6 -40~125 74LVC1G32-Q100 single 2-input OR gate 1.65 - 5.5 ± 32 2.1 -40~125 • • 74LVC1G38-Q100 single 2-input NAND gate; open-drain 1.65 - 5.5 32 2.3 -40~125 • • 74LVC1G57-Q100 configurable gate; Schmitt trigger 1.65 - 5.5 ± 32 3.8 74LVC1G58-Q100 configurable gate; Schmitt trigger 1.65 - 5.5 ± 32 74LVC1G86-Q100 single 2-input EXCLUSIVE-OR gate 1.65 - 5.5 74LVC1G332-Q100 single 3-input OR gate 74LVC1GX04-Q100 SOT457 (GV) IO (mA) 74HC2G02-Q100 SOT363 (GW) Description SOT753 (GV) Type number VCC (V) SOT353-1 (GW) Features • • -40~125 • • 3.8 -40~125 • • ± 32 2.4 -40~125 1.65 - 5.5 ± 32 2.6 -40~125 • • crystal driver 1.65 - 5.5 ± 24 2.8 -40~125 • • 74LVC2G02-Q100 dual 2-input NOR gate 1.65 - 5.5 ± 32 2.4 -40~125 • • 74LVC2G08-Q100 dual 2-input AND gate 1.65 - 5.5 ± 24 2.1 -40~125 • • 74LVC2G32-Q100 dual 2-input OR gate 1.65 - 5.5 ± 32 2.2 -40~125 • • 74LVC2G34-Q100 dual buffer 1.65 - 5.5 ± 32 2.2 -40~125 74LVC2G86-Q100 dual 2-input EXCLUSIVE-OR gate 1.65 - 5.5 ± 32 2.3 -40~125 • • For more information about automotive gates visit: www.nxp.com/products/automotive/logic/gates/ 26 Q100 logic portfolio • • • • Latches/registered drivers Features Type number Description 74AUP1G373-Q100 single D-type transparent latch (3-state) Package (suffix) VCC (V) IO (mA) tpd (ns) Tamb (°C) SOT363 (GW) 1.1 - 3.6 ±1.9 8.5 -40~125 • For more information about automotive latches/registered drivers visit: www.nxp.com/products/automotive/logic/latches_registered_drivers/ Multivibrators Features Type number Description 74LVC1G123-Q100 single retriggerable monostable multivibrator Package (suffix) VCC (V) IO (mA) tpd (ns) Tamb (°C) 1.65 - 5.5 ± 32 3.5 -40~125 SOT505-2 (DP) SOT765-1 (DC) • • For more information about automotive multivibrators visit: www.nxp.com/products/automotive/logic/multivibrators/ Schmitt-triggers tpd (ns) Tamb (°C) SOT353-1 (GW) SOT753 (GV) SOT505-2 (DP) SOT765-1 (DC) SOT996-2 (GD) 74AHC1G14-Q100 single inverter Schmitt-trigger 2.0 - 5.5 ±8 3.2 -40~125 • • 74AHCT1G14-Q100 single inverter Schmitt-trigger; TTL enabled 4.5 - 5.5 ±8 4.1 -40~125 • • 74AHC3G14-Q100 triple inverter Schmitt-trigger 2.0 - 5.5 ±8 3.2 -40~125 • • • 74AHCT3G14-Q100 triple inverter Schmitt-trigger; TTL enabled 4.5 - 5.5 ±8 4.1 -40~125 • • • 74HC1G14-Q100 single inverter Schmitt-trigger 2.0 - 6.0 ± 2.6 10 -40~125 • • 74HCT1G14-Q100 single inverter Schmitt-trigger; TTL enabled 4.5 - 5.5 ± 2.0 15 -40~125 • • 74HC2G14-Q100 dual inverter Schmitt-trigger 2.0 - 6.0 ± 5.2 16 -40~125 • • 74HCT2G14-Q100 dual inverter Schmitt-trigger; TTL enabled 4.5 - 5.5 ± 4.0 21 -40~125 • • 74HC2G17-Q100 dual buffer Schmitt-trigger 2.0 - 6.0 ± 5.2 12 -40~125 • • 74HCT2G17-Q100 dual buffer Schmitt-trigger; TTL enabled 4.5 - 5.5 ± 4.0 21 -40~125 • • 74HC3G14-Q100 triple inverter Schmitt-trigger 2.0 - 6.0 ± 5.2 16 -40~125 • • 74HCT3G14-Q100 triple inverter Schmitt-trigger; TTL enabled 4.5 - 5.5 ± 4.0 21 -40~125 • • 74LVC1G14-Q100 single inverter Schmitt-trigger 1.65 - 5.5 ± 32 3 -40~125 • • 74LVC1G17-Q100 single buffer Schmitt-trigger 1.65 - 5.5 ± 32 3 -40~125 • • 74LVC2G14-Q100 dual inverter Schmitt-trigger 1.65 - 5.5 ± 32 3.9 -40~125 • • 74LVC2G17-Q100 dual buffer Schmitt-trigger 1.65 - 5.5 ± 32 3.6 -40~125 • • 74LVC3G17-Q100 triple buffer Schmitt-trigger 1.65 - 5.5 ± 32 3.6 -40~125 • • SOT457 (GV) Description SOT363 (GW) Type number IO (mA) Package (suffix) VCC (V) Features For more information about automotive Schmitt-triggers visit: www.nxp.com/products/automotive/logic/schmitt_triggers/ Q100 logic portfolio 27 Level shifters/translators SOT353-1 (GW) 1.1 - 3.6 1.1 - 3.6 ± 1.9 -40~125 • 74AVC1T45-Q100 single dual-supply voltage level translating transceiver (3-state) 0.8 - 3.6 0.8 - 3.6 ± 12 -40~125 74AVC2T45-Q100 dual-bit dual-supply voltage level translating transceiver (3-state) 0.8 - 3.6 0.8 - 3.6 ± 12 -40~125 74AVCH1T45-Q100 single dual-supply voltage translating transceiver with bus hold (3-state) 0.8 - 3.6 0.8 - 3.6 ± 12 -40~125 • 74LVC1T45-Q100 single dual-supply voltage level translating transceiver (3-state) 1.2 - 5.5 1.2 - 5.5 ± 24 -40~125 • 74LVCH1T45-Q100 single dual-supply voltage translating transceiver with bus hold (3-state) 1.2 - 5.5 1.2 - 5.5 ± 24 -40~125 • 74LVC2T45-Q100 dual-bit dual-supply voltage level translating transceiver (3-state) 1.2 - 5.5 1.2 - 5.5 ± 24 -40~125 • 74LVCH2T45-Q100 dual-bit dual-supply voltage level translating transceiver with bus hold (3-state) 1.2 - 5.5 1.2 - 5.5 ± 24 -40~125 • SOT996-2 (GD) Tamb (°C) single dual supply translating buffer SOT765-1 (DC) IO (mA) 74AUP1T34-Q100 SOT505-2 (DP) Description SOT363 (GW) Type number VCC(B) (V) Package (suffix) VCC(A) (V) Features • • • • For more information about automotive level shifters/translators visit: www.nxp.com/products/automotive/logic/level_shifters_translators Mini Logic packages Package suffix GW GV GW GV D DP PW DC GD 5-pin 5-pin 6-pin 6-pin 8-pin 8-pin 8-pin 8-pin 8-pin SOT353-1 SOT753 SOT363 SOT457 SOT96-1 SOT505-2 SOT530-1 SOT765-1 SOT996-2 Width (mm) 2.10 2.75 2.10 2.75 6.00 4.00 3.00 3.10 3.00 Length (mm) 2.00 2.90 2.00 2.90 4.90 3.00 6.40 2.00 2.00 Height (mm) 1.00 1.00 1.00 1.00 1.75 1.10 1.10 1.00 0.50 Pitch (mm) 0.65 0.95 0.65 0.95 1.27 0.65 0.65 0.50 0.50 Package Further information about packages can be found at www.nxp.com/packages/ 28 Q100 logic portfolio NOTES Q100 logic portfolio 29 NOTES 30 Q100 logic portfolio NOTES Q100 logic portfolio 31 www.nxp.com © 2015 NXP Semiconductors N.V. All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. Date of release: May 2015 Document order number: 9397 750 17663 Published in the USA