AN11044 Pin FMEA for 74HC/74HCT family Rev. 1 — 16 March 2011 Application note Document information Info Content Keywords FMEA, HC, HCT, CMOS Abstract This application note provides a Failure Modes and Effects Analysis (FMEA) for the NXP Semiconductors’ 74 HC/74HCT family under typical failure situations. AN11044 NXP Semiconductors Pin FMEA for 74HC/74HCT family Revision history Rev Date Description v.1 20110316 initial version Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] AN11044 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 16 March 2011 © NXP B.V. 2011. All rights reserved. 2 of 7 AN11044 NXP Semiconductors Pin FMEA for 74HC/74HCT family 1. Introduction The 74HC/74HCT high-speed Si-gate CMOS logic family combines the low power advantages of the HEF4000B family with the high speed and drive capability of the Low power Schottky TTL (LSTTL). The 74HC/74HCT family has the same pin-out as the 74 series and provides the same circuit functions. The family includes several HEF4000B family circuits that do not have TTL counterparts, and have some special circuits. The basic family of buffered devices, designated as xx74HCxxxx, operates at CMOS input logic levels for high-noise immunity with negligible typical quiescent supply and input current. The family requires a power supply of 2 V to 6 V. A subset of the family, designated as xx74HCTxxxx with the same features as the “HC-types” will operate with a standard TTL power supply of 5 V (±10 %) and logic input levels (0.8 V to 2.0 V) for use as pin-to-pin compatible CMOS replacements for reducing power consumption without loss of speed. These types are also suitable for TTL-to-CMOS switching converters. 2. Pin FMEA This application note provides a Failure Modes and Effects Analysis (FMEA) for the NXP Semiconductors’ HC/HCT family under typical failure situations such as a short-circuit of HC/HCT device pins to VCC or GND or to a neighboring pin, or if a pin is left open. A failure is classified according to its effect on the HC/HCT device and the functionality of the application; see Table 1. Table 1. Classification of failure effects Class Failure effect A damage to device affects application functionality B no damage to device C no damage to device may affect application functionality no affect to application functionality Table 2. AN11044 Application note FMEA matrix for pin short-circuit to VCC Pin Class Remarks Input B normal operating condition, no damage, no leakage, may affect functionality Output C if output defined HIGH, no damage, no leakage, no output level change Output A if output defined LOW, short-circuits and high currents can damage device, output level changes GND B short-circuits and high currents can damage device, affects functionality All information provided in this document is subject to legal disclaimers. Rev. 1 — 16 March 2011 © NXP B.V. 2011. All rights reserved. 3 of 7 AN11044 NXP Semiconductors Pin FMEA for 74HC/74HCT family Table 3. FMEA matrix for pin short-circuit to GND Pin Class Remarks Input B normal operating condition, no damage, no leakage; may affect functionality Output C if output defined LOW, no damage, no leakage no output level change Output A if output defined HIGH, short-circuits and high currents can damage device, output level changes VCC B if input defined LOW, no damage, affects functionality VCC A if input defined HIGH, short-circuits and high currents can damage device, affects functionality Table 4. FMEA matrix for pin left open Pin Class Remarks Input B undefined operating condition, no damage, increases leakage, may affect functionality Output C normal operating condition, no damage, no leakage GND B undefined operating condition, no damage, increases leakage, affects functionality VCC B if input defined LOW, undefined operating condition, no damage, increases leakage (only for I/O types), affects functionality VCC B if input defined HIGH, device is powered via input circuit, may affect functionality Table 5. FMEA matrix for pin short-circuits between neighbor pins Pin Class Remarks Input to input C if inputs have same voltage levels: no damage, no leakage B if inputs have different voltage levels: leakage increases, affects functionality A if input and output have different voltage levels, can cause high current and can damage device, affects functionality C if input and output have same voltage levels, no damage, no leakage - see Table 3 Input to output Input to GND AN11044 Application note Input to VCC - see Table 2 Output to output C if outputs have same voltage levels, no damage, no leakage A if outputs have different voltage levels, can cause high current and can damage device, affects functionality Output to input - same effect as ‘input to output’ condition Output to GND - see Table 3 Output to VCC - see Table 2 GND to VCC - not applicable, these pins are not neighbors All information provided in this document is subject to legal disclaimers. Rev. 1 — 16 March 2011 © NXP B.V. 2011. All rights reserved. 4 of 7 AN11044 NXP Semiconductors Pin FMEA for 74HC/74HCT family 3. Abbreviations Table 6. AN11044 Application note Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor FMEA Failure Modes and Effects Analysis LSTTL Low power Schottky TTL TTL Transistor-Transistor Logic All information provided in this document is subject to legal disclaimers. Rev. 1 — 16 March 2011 © NXP B.V. 2011. All rights reserved. 5 of 7 AN11044 NXP Semiconductors Pin FMEA for 74HC/74HCT family 4. Legal information 4.1 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. 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Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 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All rights reserved. 6 of 7 AN11044 NXP Semiconductors Pin FMEA for 74HC/74HCT family 5. Contents 1 2 3 4 4.1 4.2 4.3 5 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin FMEA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . Legal information. . . . . . . . . . . . . . . . . . . . . . . . Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 5 6 6 6 6 7 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 16 March 2011 Document identifier: AN11044