CD4019BMS CMOS Quad AND/OR Select Gate November 1994 Features Pinout • High Voltage Type (20V Rating) CD4019BMS TOP VIEW • Medium Speed Operation tPHL = tPLH = 60ns (typ.) at CL = 50pF, VDD = 10V • Standardized Symmetrical Output Characteristics • 100% Tested for Quiescent Current at 20V • 5V, 10V and 15V Parametric Ratings • Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” • Maximum Input Current of 1µa at 18V Over Full Package-Temperature Range; - 100nA at 18V and 25 B4 1 16 VDD A3 2 15 A4 B3 3 14 Kb A2 4 13 D4 = A4 Ka + B4 Kb B2 5 12 D3 = A3 Ka + B3 Kb A1 6 11 D2 = A2 Ka + B2 Kb B1 7 10 D1 = A1 Ka + B1 Kb 9 Ka VSS 8 oC • Noise Margin (Over Full Package Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V Functional Diagram Ka Kb 9 Applications • And/Or Select Gating A4 VDD 14 16 15 • Shift-Right/Shift-Left Registers 13 • True/Complement Selection • AND/OR/Exclusive-OR Selection Description CD4019BMS types consist of four AND/OR select gate configurations, each consisting of two 2-input AND gates driving a single 2-input OR gate. Selection is accomplished by control bits Ka and Kb. In addition to selection of either channel A or channel B information, the control bits can be applied simultaneously to accomplish the logical A + B function. B4 A3 B3 A2 B2 A1 B1 1 2 3 4 5 6 7 12 11 D4 = (A4 Ka) + (B4 Kb) 10 D4 D3 D2 D1 8 VSS The CD4019BMS is supplied in these 16-lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4T H1E H3X CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 7-307 File Number 3299 Specifications CD4019BMS Absolute Maximum Ratings Reliability Information DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum Thermal Resistance . . . . . . . . . . . . . . . . θja θjc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Supply Current Input Leakage Current Input Leakage Current SYMBOL IDD IIL IIH CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND LIMITS GROUP A SUBGROUPS TEMPERATURE MIN MAX UNITS 1 +25oC - 2 µA 2 +125 C - 200 µA VDD = 18V, VIN = VDD or GND 3 -55oC - 2 µA VIN = VDD or GND 1 +25oC -100 - nA 2 +125oC -1000 - nA VDD = 18V 3 -55oC -100 - nA VDD = 20 1 +25oC - 100 nA 2 +125oC - 1000 nA 3 -55oC - 100 nA - 50 mV VIN = VDD or GND VDD = 20 VDD = 18V o Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA mA Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V VDD = 2.8V, VIN = VDD or GND 7 +25oC VDD = 20V, VIN = VDD or GND 7 +25oC VDD = 18V, VIN = VDD or GND 8A +125oC VDD = 3V, VIN = VDD or GND 8B -55oC Functional F VOH > VOL < VDD/2 VDD/2 V Input Voltage Low (Note 2) VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V Input Voltage High (Note 2) VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V Input Voltage Low (Note 2) VIL VDD = 15V, VOH > 13.5V, VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC - 4 V Input Voltage High (Note 2) VIH VDD = 15V, VOH > 13.5V, VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC 11 - V NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs 7-308 3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max. Specifications CD4019BMS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Propagation Delay Transition Time SYMBOL TPHL TPLH CONDITIONS (NOTE 1, 2) GROUP A SUBGROUPS TEMPERATURE VDD = 5V, VIN = VDD or GND 9 10, 11 TTHL TTLH VDD = 5V, VIN = VDD or GND 9 10, 11 +25oC +125oC, -55oC +25oC +125oC, -55oC LIMITS MIN MAX UNITS - 300 ns - 405 ns - 200 ns - 270 ns NOTES: 1. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC - 1 µA - 30 µA o +125 C VDD = 10V, VIN = VDD or GND VDD = 15V, VIN = VDD or GND 1, 2 1, 2 -55 C, +25 C - 2 µA +125oC - 60 µA - 2 µA o -55oC, o +25oC - 120 µA Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC, -55oC - 50 mV Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC, -55oC - 50 mV Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC, -55oC 4.95 - V Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC, -55oC 9.95 - V Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA -55oC 0.64 - mA +125oC 0.9 - mA -55oC 1.6 - mA oC +125 Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VDD = 10V, VOUT = 0.5V 1, 2 VDD = 15V, VOUT = 1.5V 1, 2 VDD = 5V, VOUT = 4.6V 1, 2 VDD = 5V, VOUT = 2.5V 1, 2 VDD = 10V, VOUT = 9.5V 1, 2 VDD =15V, VOUT = 13.5V 1, 2 +125oC 2.4 - mA -55oC 4.2 - mA +125oC - -0.36 mA -55oC - -0.64 mA +125oC - -1.15 mA -55oC - -2.0 mA +125oC - -0.9 mA -55oC - -1.6 mA +125oC - -2.4 mA -55oC - -4.2 mA Input Voltage Low VIL VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC, -55oC - 3 V Input Voltage High VIH VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC, -55oC 7 - V Propagation Delay TPHL TPLH 1, 2, 3 +25oC - 120 ns 1, 2, 3 +25oC - 100 ns VDD = 10V VDD = 15V 7-309 Specifications CD4019BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER SYMBOL Transition Time TTHL TTLH CONDITIONS VDD = 10V VDD = 15V NOTES TEMPERATURE MIN MAX UNITS 1, 2, 3 +25oC - 100 ns o 1, 2, 3 +25 C - 80 ns Input Capacitance CIN All A and B Inputs 1, 2 +25oC - 7.5 pF Input Capacitance CIN KA and KB Inputs 1, 2 +25oC - 15.0 pF NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER SYMBOL Supply Current IDD CONDITIONS VDD = 20V, VIN = VDD or GND NOTES TEMPERATURE MIN MAX UNITS 1, 4 +25oC - 7.5 µA N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC -2.8 -0.2 V N Threshold Voltage Delta ∆VTN VDD = 10V, ISS = -10µA 1, 4 +25oC - ±1 V P Threshold Voltage VTP VSS = 0V, IDD = 10µA 1, 4 +25oC 0.2 2.8 V P Threshold Voltage Delta ∆VTP VSS = 0V, IDD = 10µA 1, 4 +25oC - ±1 V 1 +25oC VOH > VDD/2 VOL < VDD/2 V 1, 2, 3, 4 +25oC - 1.35 x +25oC Limit ns Functional F VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 3. See Table 2 for +25oC limit. NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 4. Read and Record TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC PARAMETER SYMBOL DELTA LIMIT Supply Current - MSI-1 IDD ± 0.2µA Output Current (Sink) IOL5 ± 20% x Pre-Test Reading IOH5A ± 20% x Pre-Test Reading Output Current (Source) TABLE 6. APPLICABLE SUBGROUPS MIL-STD-883 METHOD GROUP A SUBGROUPS Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A Interim Test 2 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A 100% 5004 1, 7, 9, Deltas 100% 5004 1, 7, 9 100% 5004 1, 7, 9, Deltas CONFORMANCE GROUP PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test Group A 100% 5004 2, 3, 8A, 8B, 10, 11 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11 7-310 READ AND RECORD IDD, IOL5, IOH5A Specifications CD4019BMS TABLE 6. APPLICABLE SUBGROUPS (Continued) MIL-STD-883 METHOD GROUP A SUBGROUPS Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroup B-6 Sample 5005 1, 7, 9 Sample 5005 1, 2, 3, 8A, 8B, 9 CONFORMANCE GROUP Group B Group D READ AND RECORD Subgroups 1, 2, 3, 9, 10, 11 Subgroups 1, 2 3 NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS Group E Subgroup 2 TEST READ AND RECORD MIL-STD-883 METHOD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD 5005 1, 7, 9 Table 4 1, 9 Table 4 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION OPEN GROUND VDD Static Burn-In 1 Note 1 10 -13 1 - 9, 14, 15 16 Static Burn-In 2 Note 1 10 -13 8 1 - 7, 9, 14 - 16 Dynamic BurnIn Note 1 - 8 16 10 -13 8 1 - 7, 9, 14 - 16 Irradiation Note 2 9V ± -0.5V 50kHz 25kHz 10 - 13 - 1 - 7, 9, 14, 15 NOTE: 1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V Logic Diagram *Ka 9 *Kb 14 VDD = 16 VSS - 8 TRUTH TABLE *A4 15 13 *B4 VDD VSS *INPUTS PROTECTED BY CMOS PROTECTION NETWORK *A3 2 *B3 3 *A2 4 *B2 *A1 *B1 12 D3 11 D2 5 10 6 Kb An Bn Dn 1 0 1 X 1 1 0 0 X 0 0 1 X 1 1 0 1 X 0 0 0 0 X X 0 1 1 0 0 0 1 1 0 1 1 1 1 1 0 1 1 1 1 1 1 D4 1 TO 3 MORE SIMILAR CIRCUITS Ka D1 X = Don’t Care Case 7 FIGURE 1. CD4019BMS LOGIC DIAGRAM 7-311 CD4019BMS AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = 15V 25 20 15 10V 10 5 5V 0 5 10 AMBIENT TEMPERATURE (TA) = +25oC 15.0 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12.5 10.0 10V 7.5 5.0 2.5 15 5V 0 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V 0 -5 -10 -15 -10V -20 -25 -15V -30 -5 -10V PROPAGATION DELAY TIME (tPHL, tPLH) (ns) TRANSITION TIME (tTHL, tTLH) (ns) SUPPLY VOLTAGE (VDD) = 5V 100 10V 15V 20 -15 FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS 200 0 0 -10 -15V AMBIENT TEMPERATURE (TA) = +25oC 50 0 GATE-TO-SOURCE VOLTAGE (VGS) = -5V FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS 150 0 AMBIENT TEMPERATURE (TA) = +25oC OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) 0 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) 30 OUTPUT LOW (SINK) CURRENT (IOL) (mA) OUTPUT LOW (SINK) CURRENT (IOL) (mA) Typical Performance Characteritics AMBIENT TEMPERATURE (TA) = +25oC 250 SUPPLY VOLTAGE (VDD) = 5V 200 150 100 10V 50 15V 0 0 40 60 80 100 LOAD CAPACITANCE (CL) (pF) FIGURE 6. TYPICAL TRANSITION TIME AS A FUNCTION OF LOAD CAPACITANCE 20 40 60 80 LOAD CAPACITANCE (CL) (pF) 100 FIGURE 7. PROPAGATION DELAY TIME AS A FUNCTION OF LOAD CAPACITANCE 7-312 CD4019BMS Typical Performance Characteritics (Continued) 1058 POWER DISSIPATION (PD) (µW) 6 4 AMBIENT TEMPERATURE (TA) = +25oC 2 SUPPLY VOLTAGE (VDD) = 15V 1048 10V 6 4 10V 2 1038 5V 6 4 2 1028 6 4 CL = 50pF CL = 15pF 2 10 2 1 FIGURE 8. 4 68 2 4 68 2 4 68 2 4 68 10 102 103 104 INPUT FREQUENCY (fIN) (kHz) 2 4 68 105 TYPICAL DYNAMIC POWER DISSIPATION AS A FUNCTION OF INPUT FREQUENCY Typical Applications “B” REGISTER 1 Q1 0 1 Q2 0 1 Q1 0 CD413B OR EQUIV “A” REGISTER 1 Q2 0 CD4013B OR EQUIV. CD4013B OR EQUIV. CD413B OR EQUIV (Kb) SELECT “B” REGISTER (Ka) SELECT “A” REGISTER CD4019B OUT 1 OUT 2 OUT 3 OUT 4 FIGURE 9. AND/OR SELECT GATING All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 313 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 CD4019BMS Typical Applications (Continued) SHIFT SHIFT RIGHT INPUT LEFT INPUT (Kb) SHIFT (Ka) SHIFT RIGHT SELECT LEFT SELECT CD4019B CL CLOCK D1 Q1 1 CL D2 Q2 1 CL 0 SHIFT LEFT OUTPUT D1 Q1 1 D2 Q2 1 CL CL 0 0 CD4013B OR EQUIV. SHIFT RIGHT OUTPUT 0 CD4013B OR EQUIV. FIGURE 10. “SHIFT LEFT/SHIFT RIGHT” REGISTER Q1 Q2 1 0 Q1 1 0 Q1 CD4013B Q2 1 0 Q2 OR EQUIV. 1 0 Q1 CD4013B Q2 OR EQUIV. (Kb) COMPLEMENT SELECT (Ka) TRUE SELECT CD4019B OUT 1 OUT 2 OUT 3 OUT 4 FIGURE 11. “TRUE COMPLEMENT” SELECTOR 7-314 CD4019BMS Typical Applications (Continued) A1 B1 A2 B2 A3 CD4001B OR EQUIV B3 A4 CD4001B OR EQUIV B4 CD4001B OR EQUIV CD4001B OR EQUIV CD4001B OR EQUIV A1 ⊕ B1 A1 • B1 A2 ⊕ B2 A2 • B2 A3 ⊕ B3 A3 •B3 A4 ⊕ B4 A4 • B4 K (⊕) K (•) CD4019B OUT1 OUT2 OUT3 OUT4 FIGURE 12. AND/OR EXCLUSIVE-OR SELECTOR TRUTH TABLE K(•) K(⊕) OUT 0 0 0 1 0 A•B 0 1 A⊕B 1 1 A+B Chip Dimensions and Pad Layout METALLIZATION: PASSIVATION: BOND PADS: Thickness: 11kÅ − 14kÅ, AL. 10.4kÅ - 15.6kÅ, Silane 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch) 7-315