INTERSIL CD4093BMS

CD4093BMS
CMOS Quad 2-Input
NAND Schmitt Triggers
December 1992
Features
Pinout
• High Voltage Types (20V Rating)
CD4093BMSMS
TOP VIEW
• Schmitt Trigger Action on Each Input With No External
Components
A 1
14 VDD
B 2
13 H
J=A·B 3
12 G
K=C·D 4
11 M = G · H
• Hysteresis Voltage Typically 0.9V at VDD = 5V and
2.3V at VDD = 10V
• Noise Immunity Greater than 50%
• No Limit on Input Rise and Fall Times
C 5
10 L = E · F
D 6
9 F
VSS 7
8 E
• Standardized, Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Package Temperature Range, 100nA at 18V and +25oC
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Functional Diagram
Applications
A
1
B
2
J
3
J=A·B
14
VDD
13
H
12
G
11
M
• Wave and Pulse Shapers
• High Noise Environment Systems
• Monostable Multivibrators
K=C·D
• Astable Multivibrators
K
• NAND Logic
4
L=E·F
Description
CD4093BMS consists of four Schmitt trigger circuits. Each
circuit functions as a two input NAND gate with Schmitt trigger action on both inputs. The gate switches at different
points for positive and negative going signals. The difference
between the positive voltage (VP) and the negative voltage
(VN) is defined as hysteresis voltage (VH) (see Figure 1).
C
5
10
L
D
6
9
F
VSS
7
8
E
M=G·H
The CD4093BMS is supplied in these 14 lead outline packages:
Braze Seal DIP
H4H
Frit Seal DIP
H1B
Ceramic Flatpack
H3W
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-1074
File Number
3330
Specifications CD4093BMS
Absolute Maximum Ratings
Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
Thermal Resistance . . . . . . . . . . . . . . . .
θja
θjc
Ceramic DIP and FRIT Package . . . . . 80oC/W
20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70oC/W
20oC/W
o
Maximum Package Power Dissipation (PD) at +125 C
For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW
For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Supply Current
Input Leakage Current
Input Leakage Current
SYMBOL
IDD
IIL
IIH
CONDITIONS (NOTE 1)
VDD = 20V, VIN = VDD or GND
LIMITS
GROUP A
SUBGROUPS
TEMPERATURE
MIN
MAX
UNITS
1
+25oC
-
2
µA
2
+125 C
-
200
µA
VDD = 18V, VIN = VDD or GND
3
-55oC
-
2
µA
VIN = VDD or GND
1
+25oC
-100
-
nA
2
+125oC
-1000
-
nA
VDD = 18V
3
-55oC
-100
-
nA
VDD = 20
1
+25oC
-
100
nA
2
+125oC
-
1000
nA
3
-55oC
-
100
nA
-
50
mV
VIN = VDD or GND
VDD = 20
VDD = 18V
o
Output Voltage
VOL15
VDD = 15V, No Load
1, 2, 3
+25oC,
+125oC,
-55oC
Output Voltage
VOH15
VDD = 15V, No Load (Note 5)
1, 2, 3
+25oC, +125oC, -55oC 14.95
-
V
Output Current (Sink)
IOL5
VDD = 5V, VOUT = 0.4V
1
+25oC
0.53
-
mA
Output Current (Sink)
IOL10
VDD = 10V, VOUT = 0.5V
1
+25oC
1.4
-
mA
Output Current (Sink)
IOL15
VDD = 15V, VOUT = 1.5V
1
+25oC
3.5
-
mA
Output Current (Source)
IOH5A
VDD = 5V, VOUT = 4.6V
1
+25oC
-
-0.53
mA
Output Current (Source)
IOH5B
VDD = 5V, VOUT = 2.5V
1
+25oC
-
-1.8
mA
Output Current (Source)
IOH10
VDD = 10V, VOUT = 9.5V
1
+25oC
-
-1.4
mA
mA
Output Current (Source)
IOH15
VDD = 15V, VOUT = 13.5V
1
+25oC
-
-3.5
N Threshold Voltage
VNTH
VDD = 10V, ISS = -10µA
1
+25oC
-2.8
-0.7
V
P Threshold Voltage
VPTH
VSS = 0V, IDD = 10µA
1
+25oC
0.7
2.8
V
VDD = 2.8V, VIN = VDD or GND
7
+25oC
VDD = 20V, VIN = VDD or GND
7
+25oC
VDD = 18V, VIN = VDD or GND
8A
+125oC
VDD = 3V, VIN = VDD or GND
8B
-55oC
1, 2, 3
+25oC, +125oC, -55oC
2.2
3.6
-55oC
Functional
Positive Trigger
Threshold Voltage
F
VP5V
VDD = 5V (Note 2)
V
V
VP15V
VDD = 15V (Note 3)
1, 2, 3
+25oC,
6.8
10.8
V
Positive Trigger
Threshold Voltage
VP5V
VDD = 5V (Note 4)
1, 2, 3
+25oC, +125oC, -55oC
2.6
4.0
V
Negative Trigger
Threshold Voltage
VN5V
VDD = 5V (Note 2)
1, 2, 3
+25oC, +125oC, -55oC
0.9
2.8
V
VN15V
VDD = 15V (Note 3)
1, 2, 3
+25oC, +125oC, -55oC
4.0
7.4
V
Negative Trigger
Threshold Voltage
VN5V
VDD = 5V (Note 4)
1, 2, 3
+25oC, +125oC, -55oC
1.4
3.2
V
Hysteresis Voltage
VH5V
VDD = 5V (Note 2)
1, 2, 3
+25oC, +125oC, -55oC
0.3
1.6
V
VH15V
VDD = 15V (Note 3)
1, 2, 3
+25oC, +125oC, -55oC
1.6
5.0
V
VH5V
VDD = 5V (Note 4)
1, 2, 3
+25oC, +125oC, -55oC
0.3
1.6
V
Hysteresis Voltage
+125oC,
VOH > VOL <
VDD/2 VDD/2
NOTES: 1. All voltages referenced to device GND, 100% testing being im- 4. Input on terminals 1 and 2, 5 and 6, 8 and 9, or 12 and 13
plemented.
5. For accuracy, voltage is measured differentially to VDD. Limit
2. Inputs on terminals 1, 5, 8, 12
is 0.050V max.
3. Input on Terminal 1
7-1075
Specifications CD4093BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Propagation Delay
Transition Time
SYMBOL
TPHL
TPLH
CONDITIONS (NOTES 1, 2)
GROUP A
SUBGROUPS TEMPERATURE
VDD = 5V, VIN = VDD or GND
9
10, 11
TTHL
TTLH
VDD = 5V, VIN = VDD or GND
9
10, 11
+25oC
+125oC,
-55oC
+25oC
+125oC,
-55oC
LIMITS
MIN
MAX
UNITS
-
380
ns
-
513
ns
-
200
ns
-
270
ns
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
IDD
VDD = 5V, VIN = VDD or GND
1, 2
-55oC, +25oC
-
1
µA
-
30
µA
o
+125 C
VDD = 10V, VIN = VDD or GND
VDD = 15V, VIN = VDD or GND
1, 2
1, 2
-55 C, +25 C
-
2
µA
+125oC
-
60
µA
-
2
µA
o
-55oC,
o
+25oC
-
120
µA
Output Voltage
VOL
VDD = 5V, No Load
1, 2
+25oC, +125oC,
-55oC
-
50
mV
Output Voltage
VOL
VDD = 10V, No Load
1, 2
+25oC, +125oC,
-55oC
-
50
mV
Output Voltage
VOH
VDD = 5V, No Load
1, 2
+25oC, +125oC,
-55oC
4.95
-
V
Output Voltage
VOH
VDD = 10V, No Load
1, 2
+25oC, +125oC,
-55oC
9.95
-
V
Output Current (Sink)
IOL5
VDD = 5V, VOUT = 0.4V
1, 2
+125oC
0.36
-
mA
-55oC
0.64
-
mA
+125oC
0.9
-
mA
-55oC
1.6
-
mA
oC
+125
Output Current (Sink)
Output Current (Sink)
Output Current (Source)
Output Current (Source)
Output Current (Source)
Output Current (Source)
Propagation Delay
Transition Time
IOL10
IOL15
IOH5A
IOH5B
IOH10
IOH15
TPHL
TPLH
TTHL
TTLH
VDD = 10V, VOUT = 0.5V
VDD = 15V, VOUT = 1.5V
VDD = 5V, VOUT = 4.6V
1, 2
1, 2
1, 2
VDD = 5V, VOUT = 2.5V
1, 2
VDD = 10V, VOUT = 9.5V
1, 2
+125oC
2.4
-
mA
-55oC
4.2
-
mA
+125oC
-
-0.36
mA
-55oC
-
-0.64
mA
+125oC
-
-1.15
mA
-55oC
-
-2.0
mA
+125oC
-
-0.9
mA
-55oC
-
-1.6
mA
+125oC
-
-2.4
mA
-55oC
-
-4.2
mA
1, 2, 3
+25oC
-
180
ns
VDD = 15V
1, 2, 3
+25oC
-
130
ns
VDD = 10V
1, 2, 3
+25oC
-
100
ns
1, 2, 3
+25oC
-
80
ns
VDD =15V, VOUT = 13.5V
VDD = 10V
VDD = 15V
7-1076
1, 2
Specifications CD4093BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER
Positive Trigger
Threshold Voltage
Negative Trigger
Threshold Voltage
Hysteresis Voltage
Input Capacitance
SYMBOL
VP10V
CONDITIONS
VDD = 10V
NOTES
TEMPERATURE
MIN
MAX
UNITS
1, 2, 4
+25oC, +125oC,
4.6
7.1
V
-55oC
VP10V
VDD = 10V
1, 2, 5
+25oC, +125oC,
-55oC
5.6
8.2
V
VP15V
VDD = 15V
1, 2, 5
+25oC, +125oC,
-55oC
6.3
12.7
V
VN10V
VDD = 10V
1, 2, 4
+25oC, +125oC,
-55oC
2.5
5.2
V
VN10V
VDD = 10V
1, 2, 5
+25oC, +125oC,
-55oC
3.4
6.6
V
VN15V
VDD = 15V
1, 2, 5
+25oC, +125oC,
-55oC
4.8
9.6
V
VH10V
VDD = 10V
1, 2, 4
+25oC, +125oC,
-55oC
1.2
3.4
V
VH10V
VDD = 10V
1, 2, 5
+25oC, +125oC,
-55oC
1.2
3.4
V
VH15V
VDD = 15V
1, 2, 5
+25oC, +125oC,
-55oC
1.6
5.0
V
1, 2
+25oC
-
7.5
pF
CIN
Any Input
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
4. Input on terminals 1, 5, 8, 12
5. Input on terminals 1 and 2, 5 and 6, 8 and 9, or 12 and 13
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
IDD
N Threshold Voltage
VNTH
N Threshold Voltage
Delta
∆VTN
P Threshold Voltage
VTP
P Threshold Voltage
Delta
∆VTP
Functional
F
CONDITIONS
NOTES
TEMPERATURE
TPHL
TPLH
MAX
UNITS
1, 4
+25
-
7.5
µA
VDD = 10V, ISS = -10µA
1, 4
+25oC
-2.8
-0.2
V
VDD = 10V, ISS = -10µA
1, 4
+25oC
-
±1
V
VSS = 0V, IDD = 10µA
1, 4
+25oC
0.2
2.8
V
1, 4
+25oC
-
±1
V
1
+25oC
VOH >
VDD/2
VOL <
VDD/2
V
1, 2, 3, 4
+25oC
-
1.35 x
+25oC
Limit
ns
VSS = 0V, IDD = 10µA
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
Propagation Delay Time
MIN
VDD = 20V, VIN = VDD or GND
oC
VDD = 5V
3. See Table 2 for +25oC limit.
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
4. Read and Record
7-1077
Specifications CD4093BMS
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC
PARAMETER
SYMBOL
DELTA LIMIT
Supply Current - MSI-1
IDD
± 0.2µA
Output Current (Sink)
IOL5
± 20% x Pre-Test Reading
IOH5A
± 20% x Pre-Test Reading
Output Current (Source)
TABLE 6. APPLICABLE SUBGROUPS
MIL-STD-883
METHOD
GROUP A SUBGROUPS
Initial Test (Pre Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
100% 5004
1, 7, 9, Deltas
CONFORMANCE GROUP
PDA (Note 1)
Interim Test 3 (Post Burn-In)
PDA (Note 1)
Final Test
1, 7, 9
100% 5004
1, 7, 9, Deltas
IDD, IOL5, IOH5A
100% 5004
2, 3, 8A, 8B, 10, 11
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Subgroup B-5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample 5005
1, 7, 9
Sample 5005
1, 2, 3, 8A, 8B, 9
Group A
Group B
100% 5004
Group D
READ AND RECORD
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE GROUPS
Group E Subgroup 2
TEST
READ AND RECORD
MIL-STD-883
METHOD
PRE-IRRAD
POST-IRRAD
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
1, 9
Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
Static Burn-In 1
Note 1
3, 4, 10, 11
1, 2, 5-9, 12, 13
14
Static Burn-In 2
Note 1
3, 4, 10, 11
7
1, 2, 5, 6, 8,
9, 12-14
Dynamic BurnIn Note 1
-
7
14
3, 4, 10, 11
7
1, 2, 5, 6, 8,
9, 12-14
Irradiation
Note 2
9V ± -0.5V
50kHz
25kHz
3, 4, 10, 11
1, 2, 5, 6,
8, 9, 12, 13
-
NOTES:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD
= 10V ± 0.5V
Logic Diagram
VDD
1 (5, 8, 12)
2 (6, 9, 13)
*
*
3 (4, 10, 11)
* All inputs protected by CMOS protection network
1 OF 4 SCHMITT TRIGGERS
7-1078
VSS
CD4093BMS
VP
VN
VDD
VH
VI
VDD
VH
VO
VSS
VH = VP - VN
VDD
VO
VN
VO
VI
VI
VP
VSS
(b) TRANSFER CHARACTERISTIC
OF 1 OF 4 GATES
(a) DEFINITION OF VP, VN, VH
(c) TEST SETUP
FIGURE 1. HYSTERESIS DEFINITION, CHARACTERISTIC, AND TEST SETUP
OUTPUT
CHARACTERISTIC
INPUT
CHARACTERISTIC
VDD
VOH
LOGIC “1”
INPUT
REGION
LOGIC “1”
OUTPUT
REGION
VDD
VOL
VP
VOH
VN
LOGIC “0”
OUTPUT
REGION
LOGIC “0”
INPUT
REGION
VOL
DRIVER
LOAD
VSS
FIGURE 2. INPUT AND OUTPUT CHARACTERISTICS
Typical Performance Curves
AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTAGE (VDD) = 15V
SUPPLY VOLTAGE (VDD) = 15V
15
1.0
12.5
VDD
5
10V
10.0
VI
CURRENT
7.5
PEAK
4
6
VO
ID
ID
5V
5.0
VO 1.0
ALL
OTHER
INPUTS
TO VDD
0.5
OUTPUT VOLTAGE (VO) (V)
VDD
CURRENT
PEAK
DRAIN CURRENT (ID) (mA)
OUTPUT VOLTAGE (VO) (V)
15.0
VDD
VDD
10V
10
5
VI
4
6
ALL OTHER
PACKAGE
INPUTS
TO VDD
-55oC
+125oC
5V
5
VO
2.5
0
0
2.5
5.0
7.5
10.0
12.5
15.0
0
0
FIGURE 3. TYPICAL CURRENT AND VOLTAGE TRANSFER
CHARACTERISTICS
0
5
10
15
INPUT VOLTAGE (VI) (V)
INPUT VOLTAGE (VI) (V)
FIGURE 4. TYPICAL VOLTAGE TRANSFER CHARACTERISTICS AS A FUNCTION OF TEMPERATURE
7-1079
CD4093BMS
(Continued)
AMBIENT TEMPERATURE (TA) = +25oC
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
25
20
15
10V
10
5
5V
0
5
10
15
AMBIENT TEMPERATURE (TA) = +25oC
15.0
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
12.5
10.0
10V
7.5
5.0
2.5
5V
0
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 5. TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
0
AMBIENT TEMPERATURE (TA) = +25oC
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
FIGURE 6. MINIMUM OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
-5
-10
-15
-10V
-20
-25
-15V
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-15
-10
-5
0
-30
-5
-10V
TRANSITION TIME (tTHL, tTLH) (ns)
PROPAGATION DELAY TIME (tPHL, tPLH) (ns)
AMBIENT TEMPERATURE (TA) = +25oC
600
500
400
300
200
100
5
10
15
SUPPLY VOLTAGE (VDD)
-15
FIGURE 8. MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
LOAD CAPACITANCE (CL) = 50pF
0
-10
-15V
AMBIENT TEMPERATURE (TA) = +25oC
0
0
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
FIGURE 7. TYPICAL OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
700
0
AMBIENT TEMPERATURE (TA) = +25oC
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-15
-10
-5
5
10
15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
30
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
Typical Performance Curves
200
150
100
10V
FIGURE 9. TYPICAL PROPAGATION DELAY TIME vs. SUPPLY
VOLTAGE
15V
50
0
0
20
SUPPLY VOLTAGE (VDD) = 5V
20
40
60
80
100
LOAD CAPACITANCE (CL) (pF)
FIGURE 10. TYPICAL TRANSITION TIME vs. LOAD
CAPACITANCE
7-1080
CD4093BMS
(Continued)
AMBIENT TEMPERATURE (TA) = +25oC
INPUT ON TERMINALS 1, 5, 8, 12 OR 2, 6, 9, 13;
OTHER INPUTS TIED TO VDD
AMBIENT TEMPERATURE (TA) = +25oC
VH
x 100) (%)
VDD
15
VP
10
HYSTERESIS (
TRIGGER THRESHOLD VOLTAGE (VP, VN) (V)
Typical Performance Curves
VN
5
0
0
5
10V, 15pF
10V, 50pF
1038
6
4
2
2
10
8
6
4
2
5V, 50pF
10 8
6
4
2
0
10
10-1
2
4 68
100
2
4 68
101
2
4 68
102
2
5
0
5
10
15
SUPPLY VOLTAGE (VDD) (V)
20
6
4
SUPPLY VOLTAGE (VDD) = 15V, CL = 50pF
2
10
104
POWER DISSIPATION (PD) (µW)
POWER DISSIPATION (PD) (µW)
2
104
8
6
4
15
FIGURE 12. TYPICAL PERCENT HYSTERESIS vs. SUPPLY
VOLTAGE
AMBIENT TEMPERATURE (TA) = +25oC
6
4
20
0
10
15
20
SUPPLY VOLTAGE (VDD) (V)
FIGURE 11. TYPICAL TRIGGER THRESHOLD VOLTAGE vs.
VDD
105
25
4 68
103
2
2
103
8
6
4
2
1028
104
FIGURE 13. TYPICAL POWER DISSIPATION vs. FREQUENCY
CHARACTERISTICS
15V, 1kHz
10 8
6
4
2
10V, 1kHz
18
10
FREQUENCY (f) (kHz)
15V, 10kHz
6
4
2
6
4
2
-1
10
4 68
SUPPLY VOLTAGE (VDD) = 15V,
FREQUENCY (f) = 100kHz
5V, 1kHz
2
4 68
AMBIENT TEMPERATURE (TA) = +25oC
LOAD CAPACITANCE (CL) = 15pF
2
4 68
2
4 68
2
4 68
2
102
103
104
105
RISE AND FALL TIME (tR, tF) (ns)
4 68
106
FIGURE 14. TYPICAL POWER DISSIPATION vs. RISE AND
FALL TIMES
Applications
VDD TO CONTROL
SIGNAL OR
VDD
R
1
TO CONTROL
SIGNAL OR
VDD
VDD
1/3 CD4007A
VSS
1
2
2
3
tM
VDD
VDD
3
C
1/4 CD4093BMS
VSS
VDD
VSS
VSS
VSS
1/4 CD4093BMS
FREQUENCY RANGE OF WAVE SHAPE
IS FROM DC TO 1MHz
VDD
VDD-VP
50kΩ ≤ R ≤ 1MΩ
100pF ≤ C ≤ 1µF
tM = RC
n
FOR THE RANGE OF R AND C
GIVEN 5µs < tM < 1s
FIGURE 15. WAVE SHAPER
FIGURE 16. MONOSTABLE MULTIVIBRATOR
7-1081
CD4093BMS
Applications
(Continued)
tA
TO CONTROL
SIGNAL OR
VDD
1/4 CD4093BMS
1
3
2
VDD
VSS
tA = RC n
R
VP
VN
VDD-VN
VDD-VP
50kΩ ≤ R ≤ 1MΩ
100pF ≤ C ≤ 1µF
C
FOR THE RANGE OF R AND C
GIVEN 2µs < tA < 0.4s
VSS
FIGURE 17. ASTABLE MULTIVIBRATOR
Chip Dimensions and Pad Layout
Dimension in parenthesis are in millimeters and are
derived from the basic inch dimensions as indicated.
Grid graduations are in mils (10-3 inch).
METALLIZATION:
PASSIVATION:
Thickness: 11kÅ − 14kÅ,
AL.
10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 inches
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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1082
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