FUJITSU SEMICONDUCTOR DATA SHEET DS704-00008-0v01-E 16-bit Proprietary Microcontroller CMOS 2 F MC-16FX MB96620 Series MB96F622/F623/F625 * DESCRIPTION MB96620 series is based on Fujitsu’s advanced 16FX architecture (16-bit with instruction pipeline for RISC-like performance). The CPU uses the same instruction set as the established 16LX series - thus allowing for easy migration of 16LX Software to the new 16FX products. 16FX improvements compared to the previous generation include significantly improved performance even at the same operation frequency, reduced power consumption and faster start-up time. For high processing speed at optimized power consumption an internal PLL can be selected to supply the CPU with up to 32MHz operation frequency from an external 4MHz resonator. The result is a minimum instruction cycle time of 31.2ns going together with excellent EMI behavior. The emitted power is minimized by the on-chip voltage regulator that reduces the internal CPU voltage. A flexible clock tree allows selecting suitable operation frequencies for peripheral resources independent of the CPU speed. *: These devices are under development and specification is preliminary. These products under development may change its specification without notice. Note: F2MC is the abbreviation of Fujitsu Flexible Microcontroller For the information for microcontroller supports, see the following web site. http://edevice.fujitsu.com/micom/en-support/ Copyright©2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 2011.3 FUJITSU SEMICONDUCTOR CONFIDENTIAL r2.0 MB96620 Series FEATURES z Technology ⋅ 0.18μm CMOS z CPU ⋅ F MC-16FX CPU ⋅ Optimized instruction set for controller applications (bit, byte, word and long-word data types, 23 different addressing modes, barrel shift, variety of pointers) ⋅ 8-byte instruction execution queue ⋅ Signed multiply (16-bit ×16-bit) and divide (32-bit/16-bit) instructions available 2 z System clock ⋅ On-chip PLL clock multiplier (×1 to ×8, ×1 when PLL stop) ⋅ 4 MHz to 8 MHz external crystal oscillator clock (maximum frequency when using ceramic resonator depends on Q-factor) ⋅ Up to 16 MHz external clock for devices with fast clock input feature ⋅ 32.768 kHz subsystem quartz clock ⋅ 100kHz/2MHz internal RC clock for quick and safe startup, oscillator stop detection, watchdog ⋅ Clock source selectable from main- and subclock oscillator and on-chip RC oscillator, independently for CPU and 2 clock domains of peripherals ⋅ The subclock oscillator is enabled by the Boot ROM program controlled by a configuration marker after a Power or External reset ⋅ Low Power Consumption - 13 operating modes : (different Run, Sleep, Timer modes, Stop mode) z On-chip voltage regulator ⋅ Internal voltage regulator supports reduced internal MCU voltage, offering low EMI and low power consumption figures z Low voltage reset ⋅ Reset is generated when supply voltage is below minimum z Code Security ⋅ Protects Flash Memory content from unintended read-out z DMA ⋅ Automatic transfer function independent of CPU, can be assigned freely to resources z Interrupts ⋅ Fast Interrupt processing ⋅ 8 programmable priority levels ⋅ Non-Maskable Interrupt (NMI) 2 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series z CAN ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ Supports CAN protocol version 2.0 part A and B ISO16845 certified Bit rates up to 1 Mbit/s 32 message objects Each message object has its own identifier mask Programmable FIFO mode (concatenation of message objects) Maskable interrupt Disabled Automatic Retransmission mode for Time Triggered CAN applications Programmable loop-back mode for self-test operation z USART ⋅ ⋅ ⋅ ⋅ ⋅ Full duplex USARTs (SCI/LIN) Wide range of baud rate settings using a dedicated reload timer Special synchronous options for adapting to different synchronous serial protocols LIN functionality working either as master or slave LIN device Extended support for LIN-Protocol to reduce interrupt load z I2C ⋅ Up to 400 Kbps ⋅ Master and Slave functionality, 7-bit and 10-bit addressing z A/D converter ⋅ SAR-type ⋅ 8/10-bit resolution ⋅ Signals interrupt on conversion end, single conversion mode, continuous conversion mode, stop conversion mode, activation by software, external trigger, reload timers and PPGs ⋅ Range Comparator Function z Source Clock Timers ⋅ Three independent clock timers (23-bit RC clock timer, 23-bit Main clock timer, 17-bit Sub clock timer) z Hardware Watchdog Timer ⋅ Hardware watchdog timer is active after reset ⋅ Window function of Watchdog Timer is used to select the lower window limit of the watchdog interval z Reload Timers ⋅ 16-bit wide 1 2 3 4 5 6 ⋅ Prescaler with 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 of peripheral clock frequency ⋅ Event count function z Free Running Timers ⋅ Signals an interrupt on overflow, supports timer clear upon match with Output Compare (0, 4), 1 2 3 4 5 6 7 8 Prescaler with 1, 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 of peripheral clock frequency z Input Capture Units ⋅ 16-bit wide ⋅ Signals an interrupt upon external event ⋅ Rising edge, falling edge or rising and falling edge sensitive DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 3 MB96620 Series z Output Compare Units ⋅ 16-bit wide ⋅ Signals an interrupt when a match with 16-bit I/O Timer occurs ⋅ A pair of compare registers can be used to generate an output signal z Programmable Pulse Generator ⋅ ⋅ ⋅ ⋅ ⋅ 16-bit down counter, cycle and duty setting registers Can be used as 2 × 8-bit PPG Interrupt at trigger, counter borrow and/or duty match PWM operation and one-shot operation Internal prescaler allows 1, 1/4, 1/16, 1/64 of peripheral clock as counter clock and Reload timer underflow as clock input ⋅ Can be triggered by software or reload timer ⋅ Can trigger ADC conversion ⋅ Timing point capture z Quadrature Position/Revolution Counter (QPRC) ⋅ ⋅ ⋅ ⋅ ⋅ Edge count mode, Phase count mode, Level count mode 16-bit position counter 16-bit revolution counter Two 16-bit compare registers with interrupt Detection edge of the three external event input pins AIN, BIN and ZIN is configurable z Real Time Clock ⋅ ⋅ ⋅ ⋅ ⋅ Operational on main oscillation (4MHz), sub oscillation (32kHz) or RC oscillation (100kHz/2MHz) Capable to correct oscillation deviation of Sub clock or RC oscillator clock (clock calibration) Read/write accessible second/minute/hour registers Can signal interrupts every half second/second/minute/hour/day Internal clock divider and prescaler provide exact 1s clock z External Interrupts ⋅ ⋅ ⋅ ⋅ Edge or Level sensitive Interrupt mask and pending bit per channel Each available CAN channel RX has an external interrupt for wake-up Selected USART channels SIN have an external interrupt for wake-up z Non Maskable Interrupt ⋅ ⋅ ⋅ ⋅ Disabled after reset, can be enabled by Boot-ROM depending on ROM configuration block Once enabled, can not be disabled other than by reset High or Low level sensitive Pin shared with external interrupt 0 z I/O Ports ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ Most of the external pins can be used as general purpose I/O 2 All push-pull outputs (except when used as I C SDA/SCL line) Bit-wise programmable as input/output or peripheral signal Bit-wise programmable input enable One input level per GP-IO-pin (either Automotive or CMOS-Schmitt trigger) Bit-wise programmable pull-up resistor 4 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series z Built-in OCD (On Chip Debugger) ⋅ One-wire debug tool interface ⋅ Break function: - Hardware break: 6 points (shared with code event) - Software break: 4096 points ⋅ Event function: - Code event: 6 points (shared with hardware break) - Data event: 6 points - Event sequencer: 2 levels ⋅ Execution time measurement function ⋅ Trace function: 42 branches ⋅ Security function z Flash Memory ⋅ Dual operation flash allowing reading of one Flash bank while programming or erasing the other bank ⋅ Command sequencer for automatic execution of programming algorithm and for supporting DMA for programming of the Flash Memory ⋅ Supports automatic programming, Embedded Algorithm ⋅ Write/Erase/Erase-Suspend/Resume commands ⋅ A flag indicating completion of the algorithm ⋅ Erase can be performed on each sector individually ⋅ Sector protection ⋅ Flash Security feature to protect the content of the Flash ⋅ Low voltage detection during Flash erase DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 5 MB96620 Series PRODUCT LINEUP Features Product type Subclock Dual Operation Flash 32.5KB + 32KB 64.5KB + 32KB 128.5KB + 32KB MB96F620 Flash product: MB96F62x Subclock can be set by software RAM 4KB 10KB 10KB Package DMA USART with automatic LIN_Header transmission/reception with 16 byte RX- and TX-FIFO MB96F622 MB96F623 MB96F625 LQFP-64 FPT-64P-M23/M24 2ch 3ch LIN-USART 2/7/8 Yes (only 1ch) LIN-USART 2 IC 10-bit A/D Converter with Data Buffer with Range Comparator with Scan Disable with ADC Pulse Detection No 1ch 21ch No Yes No No 16-bit Reload Timer (RLT) 3ch 16-bit Free-Running Timer (FRT) 4ch 2 16-bit Input Capture (ICU) 16-bit Output Compare (OCU) 8/16-bit Programmable Pulse Generator (PPG) with Timing point capture with Start delay with Ramp Quadrature position/revolution counter (QPRC) I/O Ports Clock Caribration Unit (CAL) Clock Output Function 2 I C0 AN 0 to 14/24/25/28 to 31 8ch (2 channels for LIN-USART) 6ch RLT 1/3/6 Only RLT6 can be used as PPG clock source FRT 0 to 3 FRT 0/1 with external clock input pin ICU 0/1/4/5/6/7/9/10 (ICU 9/10 for LIN-USART) OCU 0/1/4/5/6/7 8ch (16-bit) / 16ch (8-bit) PPG 0/1/3/4/6/7/12/14 Yes No No 2ch CAN Interface External Interrupts (INTerrupt) Non-Maskable Interrupt (NMI) Real Time Clock (RTC) Remark 1ch 13ch 1ch 1ch 50(Dual clock mode) 52(Single clock mode) 1ch 2ch Low Voltage Reset Yes Hardware Watchdog Timer On-chip RC-oscillator On-chip Debugger Yes Yes Yes QPRC 0/1 CAN 2 32 Message Buffers INT 0/2/3/4/7 to 15 Low voltage reset can be disabled by software Note: All signals of the peripheral function in each product cannot be allocated by limiting the pins of package. It is necessary to use the port relocate function of the General I/O port according to your function use. 6 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series These devices are under development and specification is preliminary. These products under development may change its specification without notice. DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 7 MB96620 Series BLOCK DIAGRAM CKOT0_R, CKOT1, CKOT1_R CKOTX1 X0, X1 X0A, X1A RSTX MD NMI_R DEBUG I/F Interrupt Controller 16FX CPU OCD Clock & Mode Controller Flash Memory A 16FX Core Bus (CLKB) Peripheral Bus Bridge Watchdog SDA0 SCL0 I2C 1 ch. AVCC AVSS AN24, AN25 AN28 to AN31 ADTG_R TIN1, TIN3 TOT1, TOT3 FRCK0 10-bit ADC 21 ch. 16-bit Reload Timer 2 ch. IN0, IN1 OUT0_R, OUT1_R I/O Timer 0 FRT 0 ICU 0/1 OCU 0/1 FRCK1 IN4 to IN7 OUT4 to OUT7 I/O Timer 1 FRT 1 ICU 4/5/6/7 OCU 4/5/6/7 Peripheral Bus 1 (CLKP1) AVRH AN0 to AN14 Peripheral Bus Bridge Peripheral Bus 2 (CLKP2) DMA Controller I/O Timer 2 FRT 2 ICU 9 I/O Timer 3 FRT 3 ICU 10 8 FUJITSU SEMICONDUCTOR CONFIDENTIAL RAM Boot ROM Voltage Regulator VCC VSS C TX2 CAN Interface 1 ch. USART 3 ch. PPG 8 ch. (16-bit) / 16 ch. (8-bit) RLT6 Real Time Clock RX2 SIN2, SIN2_R, SIN7_R, SIN8_R SOT2, SOT2_R, SOT7_R, SOT8_R SCK2, SCK2_R, SCK7_R, SCK8_R TTG0, TTG1, TTG4, TTG5, TTG6, TTG7, TTG12, TTG13, TTG14, TTG15 PPG0, PPG1, PPG3, PPG4, PPG6, PPG7, PPG12, PPG14 PPG0_B, PPG1_B, PPG3_B, PPG4_B, PPG6_B, PPG7_B, PPG12_B, PPG14_B WOT AIN0, AIN1 QPRC 2 ch. External Interrupt 13 ch. BIN0, BIN1 ZIN0, ZIN1 INT8 to INT15 INT0_R, INT2_R, INT4_R INT7_R, INT9_R to INT11_R INT3_R1 DS704-00008-0v01-E MB96620 Series PIN ASSIGNMENTS P01_1 / TOT1 / CKOTX1 / OUT1_R P01_2 / INT11_R P01_3 P01_4 / PPG4_B P01_5 / SIN2_R / INT7_R* 1 1 P01_7 / SCK2_R / PPG7_B* P01_6 / SOT2_R / PPG6_B P02_0 / PPG12 / CKOT1_R P02_1 P02_2 / ZIN0 / PPG14 / CKOT0_R P02_3 P02_4 / AIN0 / IN0 / TTG0 RSTX X1 X0 Vss (TOP VIEW) 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 49 32 P01_0 / TIN1 / CKOT1 / OUT0_R C 50 31 P00_7 / INT15 P02_5 / BIN0 / IN1 / TTG1 / ADTG_R 51 30 P00_6 / INT14 52 29 P00_5 / INT13 / SIN8_R / PPG14_B* 53 28 P00_4 / INT12 / SOT8_R / PPG12_B P03_0 / AIN1 / IN4 / TTG4 / TTG12 / AN24 54 27 P00_3 / INT11 / SCK8_R / PPG3_B* P03_1 / BIN1 / IN5 / TTG5 / TTG13 / AN25 55 26 P00_2 / INT10 / SIN7_R* 25 P00_1 / INT9 / SOT7_R / PPG1_B 24 P00_0 / INT8 / SCK7_R / PPG0_B* Vcc P04_4 / SDA0 / FRCK0* 2 P04_5 / SCL0 / FRCK1* 2 P03_2 / INT10_R / RX2* 1 LQFP - 64 56 60 21 MD P03_7 / OUT7 / AN31 61 20 P04_1 / X1A* 3 P06_0 / AN0 / PPG0 62 19 P04_0 / X0A* 3 P06_1 / AN1 / PPG1 63 18 Vss 1 1 1 P04_3 / IN7 / TTG7 / TTG15 P04_2 / IN6 / INT9_R / TTG6 / TTG14 P05_6 / AN14 / INT4_R 17 9 10 11 12 13 14 15 16 P05_5 / AN13 / INT0_R / NMI_R 8 P05_3 / AN11 / TIN3 / WOT 7 P05_4 / AN12 / TOT3 / INT2_R 6 1 5 P05_2 / AN10 / SCK2* 4 P05_1 / AN9 / SOT2 3 1 2 P05_0 / AN8 / SIN2 / INT3_R1* 64 1 AVss AVcc P06_7 / AN7 / PPG7 P17_0 P03_6 / ZIN1 / OUT6 / AN30 P06_6 / AN6 / PPG6 DEBUG I/F 22 P06_5 / AN5 23 59 P06_4 / AN4 / PPG4 58 P03_5 / OUT5 / AN29 P06_3 / AN3 / PPG3 P03_4 / OUT4 / AN28 P06_2 / AN2 57 AVRH P03_3 / TX2 1 (FPT-64P-M23, FPT-64P-M24) *1: CMOS input level only 2 *2: CMOS input level only for I C *3: Please set Rom Configuration Block (RCB) to use the subclock. All other general-purpose pins have only Automotive input level. DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 9 MB96620 Series PIN FUNCTION DESCRIPTION Pin name Feature ADTG_R AINn ANn AVcc AVRH AVss BINn C CKOTn CKOTn_R CKOTXn FRCKn INn INTn INTn_R INTn_R1 MD NMI_R OUTn OUTn_R Pnn_m PPGn PPGn_B RSTX RXn SCKn SCKn_R SCLn SDAn SINn SINn_R SOTn SOTn_R TINn TOTn TTGn TXn Vcc Vss WOT X0 X0A X1 X1A ZINn DEBUG I/F ADC QPRC ADC Supply ADC Supply QPRC Voltage regulator Clock output function Clock output function Clock output function Free Running Timer ICU External Interrupt External Interrupt External Interrupt Core External Interrupt OCU OCU GPIO PPG PPG Core CAN USART USART 2 IC 2 IC USART USART USART USART Reload Timer Reload Timer PPG CAN Supply Supply RTC Clock Clock Clock Clock QPRC OCD Description Relocated A/D converter trigger input Quadrature Position/Revolution Counter Unit n input A/D converter channel n input Analog circuits power supply A/D converter high reference voltage input Analog circuits power supply Quadrature Position/Revolution Counter Unit n input Internally regulated power supply stabilization capacitor pin Clock Output function n output Relocated Clock Output function n output Clock Output function n inverted output Free Running Timer n input Input Capture Unit n input External Interrupt n input Relocated External Interrupt n input Relocated External Interrupt n input Input pins for specifying the operating mode Relocated Non-Maskable Interrupt input Output Compare Unit n output Relocated Output Compare Unit n output General purpose I/O Programmable Pulse Generator n output (16bit/8bit) Programmable Pulse Generator n output (8bit) Reset input CAN interface n RX input USART n serial clock input/output Relocated USART n serial clock input/output 2 I C interface n clock I/O input/output 2 I C interface n serial data I/O input/output USART n serial data input Relocated USART n serial data input USART n serial data output Relocated USART n serial data output Reload Timer n event input Reload Timer n output Programmable Pulse Generator n trigger input CAN interface n TX output Power supply Power supply Real Time clock output Oscillator input Subclock Oscillator input Oscillator output Subclock Oscillator output Quadrature Position/Revolution Counter Unit n input On Chip Debugger input/output 10 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series PIN CIRCUIT TYPE Pin no. Circuit type* Pin name 1 Supply AVSS 2 G AVRH 3 K P06_2 / AN2 4 K P06_3 / AN3 / PPG3 5 K P06_4 / AN4 / PPG4 6 K P06_5 / AN5 7 K P06_6 / AN6 / PPG6 8 K P06_7 / AN7 / PPG7 9 I P05_0 / AN8 / SIN2 / INT3_R1 10 K P05_1 / AN9 / SOT2 11 I P05_2 / AN10 / SCK2 12 K P05_3 / AN11 / TIN3 / WOT 13 K P05_4 / AN12 / TOT3 / INT2_R 14 K P05_5 / AN13 / INT0_R / NMI_R 15 K P05_6 / AN14 / INT4_R 16 H P04_2 / IN6 / INT9_R / TTG6 / TTG14 17 H P04_3 / IN7 / TTG7 / TTG15 18 Supply VSS 19 B P04_0 / X0A 20 B P04_1 / X1A 21 C MD 22 H P17_0 23 O DEBUG I/F 24 M P00_0 / INT8 / SCK7_R / PPG0_B 25 H P00_1 / INT9 / SOT7_R / PPG1_B 26 M P00_2 / INT10 / SIN7_R 27 M P00_3 / INT11 / SCK8_R / PPG3_B 28 H P00_4 / INT12 / SOT8_R / PPG12_B 29 M P00_5 / INT13 / SIN8_R / PPG14_B 30 H P00_6 / INT14 31 H P00_7 / INT15 32 H P01_0 / TIN1 / CKOT1 / OUT0_R DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 11 MB96620 Series Pin no. Circuit type* Function 33 H P01_1 / TOT1 / CKOTX1 / OUT1_R 34 H P01_2 / INT11_R 35 H P01_3 36 H P01_4 / PPG4_B 37 M P01_5 / SIN2_R / INT7_R 38 H P01_6 / SOT2_R / PPG6_B 39 M P01_7 / SCK2_R / PPG7_B 40 H P02_0 / PPG12 / CKOT1_R 41 H P02_1 42 H P02_2 / ZIN0 / PPG14 / CKOT0_R 43 H P02_3 44 H P02_4 / AIN0 / IN0 / TTG0 45 C RSTX 46 A X1 47 A X0 48 Supply Vss 49 Supply Vcc 50 F C 51 H P02_5 / BIN0 / IN1 / TTG1 / ADTG_R 52 N P04_4 / SDA0 / FRCK0 53 N P04_5 / SCL0 / FRCK1 54 K P03_0 / AIN1 / IN4 / TTG4 / TTG12 / AN24 55 K P03_1 / BIN1 / IN5 / TTG5 / TTG13 / AN25 56 M P03_2 / INT10_R / RX2 57 H P03_3 / TX2 58 K P03_4 / OUT4 / AN28 59 K P03_5 / OUT5 / AN29 60 K P03_6 / ZIN1 / OUT6 / AN30 61 K P03_7 / OUT7 / AN31 62 K P06_0 / AN0 / PPG0 63 K P06_1 / AN1 / PPG1 64 Supply AVcc *: Please refer to “ ■ I/O CIRCUIT TYPE” for details on the I/O circuit types. 12 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series I/O CIRCUIT TYPE Type A Circuit Remarks X1 R 0 1 FCI X0 FCI or osc disable DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL X out High-speed oscillation circuit: ⋅ Programmable between oscillation mode (external crystal or resonator connected to X0/X1 pins) and Fast external Clock Input (FCI) mode (external clock connected to X0 pin) ⋅ Feedback resistor = approx. 1.0 MΩ. Feedback resistor is grounded in the center when the oscillator is disabled or in FCI mode ⋅ The amplitude: 1.8V±0.15V to operate by the internal supply voltage 13 MB96620 Series Type Circuit B Remarks Pull-up control P-ch Standby control for input shutdown P-ch N-ch Pout Nout R Hysteresis input Low-speed oscillation circuit shared with GPIO functionality: ⋅ Feedback resistor = approx. 5 MΩ. Feedback resistor is grounded in the center when the oscillator is disabled ⋅ GPIO functionality selectable (CMOS hysteresis input with input shutdown function, IOL = 4mA, IOH = -4mA, Programmable pull-up resistor) X1A R X out 0 1 FCI X0A FCI or Osc disable Pull-up control P-ch Standby control for input shutdown P-ch N-ch Pout Nout R Hysteresis input ⋅ C CMOS hysteresis input pin R Hysteresis inputs 14 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series Type Circuit Remarks F ⋅ Power supply input protection circuit ⋅ A/D converter ref+ (AVRH) power supply input pin with protection circuit Without protection circuit against VCC for pins AVRH P-ch N-ch G ANE P-ch ⋅ AV R N-ch ANE ⋅ H Pull-up control ⋅ P-ch P-ch N-ch ⋅ Pout CMOS level output (IOL = 4mA, IOH = -4mA) Automotive input with input shutdown function Programmable pull-up resistor Nout R Automotive input Standby control for input shutdown I Pull-up control P-ch P-ch Pout N-ch Nout R ⋅ CMOS level output (IOL = 4mA, IOH = -4mA) ⋅ CMOS hysteresis input with input shutdown function ⋅ Programmable pull-up resistor ⋅ Analog input Hysteresis input Standby control for input shutdown Analog input DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 15 MB96620 Series Type Circuit Remarks ⋅ K Pull-up control P-ch ⋅ ⋅ P-ch Pout ⋅ N-ch CMOS level output (IOL = 4mA, IOH = -4mA) Automotive input with input shutdown function Programmable pull-up resistor Analog input Nout R Automotive input Standby control for input shutdown Analog input ⋅ M Pull-up control ⋅ ⋅ P-ch P-ch N-ch R Pout CMOS level output (IOL = 4mA, IOH = -4mA) CMOS hysteresis input with input shutdown function Programmable pull-up resistor Nout Hysteresis input Standby control for input shutdown 16 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series Type Circuit Remarks ⋅ N Pull-up control P-ch P-ch N-ch R Pout CMOS level output (IOL = 3mA, IOH = -3mA) ⋅ CMOS hysteresis input with input shutdown function ⋅ Programmable pull-up resistor * : N-channel transistor has slew 2 rate control according to I C spec, irrespective of usage. Nout* Hysteresis input Standby control for input shutdown ⋅ ⋅ O N-ch IOL: 25mA @ 2.7V TTL input Nout R Standby control for input shutdown DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL TTL input 17 MB96620 Series MEMORY MAP MB96F62x FF:FFFFH USER ROM *3 DE:0000H DD:FFFFH Reserved 10:0000H Boot-ROM 0F:E000H Peripheral 0E:9000H Reserved 01:0000H ROM/RAM MIRROR 00:8000H RAMSTART0 *2 Internal RAM bank0 Reserved 00:0C00H 00:0380H Peripheral 00:0180H GPR *1 00:0100H DMA 00:00F0H Reserved 00:0000H Peripheral *1: Unused GPR banks can be used as RAM area *2: For RAMSTART/END addresses, please refer to the table on the next page. *3: For details about USER ROM area, see the “USER ROM MEMORY MAP FOR FLASH DEVICES” on the following pages. The DMA area is only available if the device contains the corresponding resource. The available RAM and ROM area depends on the device. 18 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series RAMSTART ADDRESSES Devices MB96F622 MB96F623 MB96F625 Bank 0 RAM size 4KByte 10KByte DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL RAMSTART0 00:7200H 00:5A00H 19 MB96620 Series USER ROM MEMORY MAP FOR FLASH DEVICES Alternative mode CPU address Flash memory mode address FF:FFFFH FF:8000H FF:7FFFH FF:0000H FE:FFFFH 3F:FFFFH 3F:8000H 3F:7FFFH 3F:0000H 3E:FFFFH FE:0000H FD:FFFFH 3E:0000H MB96F622 MB96F623 MB96F625 Flash size 32.5KB + 32KB Flash size 64.5KB + 32KB Flash size 128.5KB + 32KB SA39 - 64KB SA39 - 64KB SA39 - 32KB Bank A of Flash A SA38 - 64KB Reserved Reserved Reserved DF:A000H DF:9FFFH DF:8000H DF:7FFFH DF:6000H DF:5FFFH DF:4000H DF:3FFFH DF:2000H DF:1FFFH DF:0000H DE:FFFFH DE:0000H 1F:9FFFH 1F:8000H 1F:7FFFH 1F:6000H 1F:5FFFH 1F:4000H 1F:3FFFH 1F:2000H 1F:1FFFH 1F:0000H SA3 - 8KB SA3 - 8KB SA3 - 8KB SA2 - 8KB SA2 - 8KB SA2 - 8KB SA1 - 8KB SA1 - 8KB SA1 - 8KB SA0 - 8KB SA0 - 8KB SA0 - 8KB SAS - 512B* SAS - 512B* SAS - 512B* Reserved Reserved Reserved Bank B of Flash A Bank A of Flash A *: Phiysical address area of SAS-512B is from DF:0000H to DF:01FFH. Others (from DF:0200H to DF:1FFFH) are all ROM Mirror area for SAS-512B. Sector SAS contains the ROM configuration block RCBA at CPU address DF:0000H - DF:01FFH. 2 SAS can not be used for E PROM emulation. 20 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series SERIAL PROGRAMMING COMMUNICATION INTERFACE USART pins for Flash serial programming (MD = 0, DEBUG I/F = 0, Serial Communication mode) MB96F62x Pin Number 9 37 10 38 11 39 26 25 USART Number USART2 USART7 Normal Function SIN2 SIN2_R SOT2 SOT2_R SCK2 SCK2_R SIN7_R SOT7_R 24 SCK7_R 29 SIN8_R 28 USART8 27 DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL SOT8_R SCK8_R 21 MB96620 Series INTERRUPT VECTOR TABLE Cleared by Vector Offset in Vector name DMA number vector table 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 3FC 3F8 3F4 3F0 3EC 3E8 3E4 3E0 3DC 3D8 3D4 3D0 3CC 3C8 3C4 3C0 3BC 3B8 3B4 3B0 3AC 3A8 3A4 3A0 39C 398 394 390 38C 388 384 380 37C 378 374 370 36C 368 364 360 35C 358 354 350 34C 348 344 340 33C 338 CALLV0 CALLV1 CALLV2 CALLV3 CALLV4 CALLV5 CALLV6 CALLV7 RESET INT9 EXCEPTION NMI DLY RC_TIMER MC_TIMER SC_TIMER LVDI EXTINT0 EXTINT2 EXTINT3 EXTINT4 EXTINT7 EXTINT8 EXTINT9 EXTINT10 EXTINT11 EXTINT12 EXTINT13 EXTINT14 EXTINT15 CAN2 PPG0 PPG1 PPG3 PPG4 PPG6 PPG7 - No No No No No No No No No No No No No No No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No Yes Yes Yes Yes Yes Yes - 22 FUJITSU SEMICONDUCTOR CONFIDENTIAL Index in ICR to program 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 Description Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Non-Maskable Interrupt Delayed Interrupt RC Timer Main Clock Timer Sub Clock Timer Low Voltage Detector External Interrupt 0 Reserved External Interrupt 2 External Interrupt 3 External Interrupt 4 Reserved Reserved External Interrupt 7 External Interrupt 8 External Interrupt 9 External Interrupt 10 External Interrupt 11 External Interrupt 12 External Interrupt 13 External Interrupt 14 External Interrupt 15 Reserved Reserved CAN Controller 2 Reserved Reserved Programmable Pulse Generator 0 Programmable Pulse Generator 1 Reserved Programmable Pulse Generator 3 Programmable Pulse Generator 4 Reserved Programmable Pulse Generator 6 Programmable Pulse Generator 7 Reserved Reserved Reserved Reserved DS704-00008-0v01-E MB96620 Series Cleared by Vector Offset in Vector name DMA number vector table Index in ICR to program 50 51 52 53 54 55 56 57 58 59 60 61 62 63 334 330 32C 328 324 320 31C 318 314 310 30C 308 304 300 PPG12 PPG14 RLT1 RLT3 - Yes Yes Yes Yes - 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 2FC PPGRLT Yes 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 2F8 2F4 2F0 2EC 2E8 2E4 2E0 2DC 2D8 2D4 2D0 2CC 2C8 2C4 2C0 2BC 2B8 2B4 2B0 2AC 2A8 2A4 2A0 29C 298 294 290 28C 288 284 280 27C 278 274 270 26C 268 ICU0 ICU1 ICU4 ICU5 ICU6 ICU7 ICU9 ICU10 OCU0 OCU1 OCU4 OCU5 OCU6 OCU7 FRT0 FRT1 FRT2 FRT3 RTC0 CAL0 IIC0 ADC0 - Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No No Yes Yes - 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Description Programmable Pulse Generator 12 Reserved Programmable Pulse Generator 14 Reserved Reserved Reserved Reserved Reserved Reserved Reload Timer 1 Reserved Reload Timer 3 Reserved Reserved Reload Timer 6 can be used as PPG clock source Input Capture Unit 0 Input Capture Unit 1 Reserved Reserved Input Capture Unit 4 Input Capture Unit 5 Input Capture Unit 6 Input Capture Unit 7 Reserved Input Capture Unit 9 Input Capture Unit 10 Reserved Output Compare Unit 0 Output Compare Unit 1 Reserved Reserved Output Compare Unit 4 Output Compare Unit 5 Output Compare Unit 6 Output Compare Unit 7 Reserved Reserved Reserved Reserved Free Running Timer 0 Free Running Timer 1 Free Running Timer 2 Free Running Timer 3 Real Time Clock Clock Calibration Unit Reserved 2 I C interface0 Reserved A/D Converter Reserved Reserved Reserved 23 MB96620 Series Cleared by Vector Offset in Vector name DMA number vector table 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 264 260 25C 258 254 250 24C 248 244 240 23C 238 234 230 22C 228 224 220 21C 218 214 210 20C 208 204 200 1FC 1F8 1F4 1F0 1EC 1E8 1E4 1E0 1DC 1D8 1D4 1D0 1CC 1C8 1C4 1C0 LINR2 LINT2 LINR7 LINT7 LINR8 LINT8 FLASHA QPRC0 QPRC1 ADCRC0 - Yes Yes Yes Yes Yes Yes Yes Yes Yes No - 24 FUJITSU SEMICONDUCTOR CONFIDENTIAL Index in ICR to program Description 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 Reserved Reserved Reserved LIN USART 2 RX LIN USART 2 TX Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved LIN USART 7 RX LIN USART 7 TX LIN USART 8 RX LIN USART 8 TX Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Flash memory A interrupt Reserved Reserved Reserved Quad Possition/Revolution counter 0 Quad Possition/Revolution counter 1 A/D Converter 0 - Range Comparator Reserved Reserved Reserved Reserved DS704-00008-0v01-E MB96620 Series HANDLING DEVICES Special care is required for the following when handling the device: • Latch-up prevention • Unused pins handling • External clock usage • Notes on PLL clock mode operation • Power supply pins (VCC/VSS) • Crystal oscillator circuit • Turn on sequence of power supply to A/D converter and analog inputs • Pin handling when not using the A/D converter • Notes on Power-on • Stabilization of power supply voltage • Serial communication 1. Latch-up prevention CMOS IC chips may suffer latch-up under the following conditions: • A voltage higher than VCC or lower than VSS is applied to an input or output pin. • A voltage higher than the rated voltage is applied between VCC pins and VSS pins. • The AVCC power supply is applied before the VCC voltage. Latch-up may increase the power supply current dramatically, causing thermal damages to the device. For the same reason, extra care is required to not let the analog power-supply voltage (AVCC, AVRH) exceed the digital power-supply voltage. 2. Unused pins handling Unused input pins can be left open when the input is disabled (corresponding bit of Port Input Enable register PIER = 0). Leaving unused input pins open when the input is enabled may result in misbehavior and possible permanent damage of the device. They must therefore be pulled up or pulled down through resistors. To prevent latch-up, those resistors should be more than 2 kΩ. Unused bidirectional pins can be set either to the output state and be then left open, or to the input state with either input disabled or external pull-up/pull-down resistor as described above. 3. External clock usage The permitted frequency range of an external clock depends on the oscillator type and configuration. See AC Characteristics for detailed modes and frequency limits. Single and opposite phase external clocks must be connected as follows: 1. Single phase external clock for Main oscillator • When using a single phase external clock for the Main oscillator, X0 pin must be driven and X1 pin left open. And supply 1.8V power to the external clock. DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 25 MB96620 Series 2. Single phase external clock for Sub oscillator • When using a single phase external clock for the Sub oscillator, ‘External clock mode’ must be selected and X0A/GP04_0 must be driven. X1A/GP04_1 must be configured as GPIO. 4. Notes on PLL clock mode operation If the PLL clock mode is selected and no external oscillator is operating or no external clock is supplied, the microcontroller attempts to work with the free oscillating PLL. Performance of this operation, however, cannot be guaranteed. 5. Power supply pins (VCC/VSS) It is required that all VCC-level as well as all VSS-level power supply pins are at the same potential. If there is more than one VCC or VSS level, the device may operate incorrectly or be damaged even within the guaranteed operating range. VCC and VSS must be connected to the device from the power supply with lowest possible impedance. As a measure against power supply noise, it is required to connect a bypass capacitor of about 0.1 μF between Vcc and Vss as close as possible to Vcc and Vss pins. 6. Crystal oscillator and ceramic resonator circuit Noise at X0, X1 pins or X0A, X1A pins might cause abnormal operation. It is required to provide bypass capacitors with shortest possible distance to X0, X1 pins and X0A, X1A pins, crystal oscillator (or ceramic resonator) and ground lines, and, to the utmost effort, that the lines of oscillation circuit do not cross the lines of other circuits. It is highly recommended to provide a printed circuit board art work surrounding X0, X1 pins and X0A, X1A pins with a ground area for stabilizing the operation. It is highly recommended to evaluate the quartz/MCU or resonator/MCU system at the quartz or resonator manufacturer, especially when using low-Q resonators at higher frequencies. 7. Turn on sequence of power supply to A/D converter and analog inputs It is required to turn the A/D converter power supply (AVCC, AVRH) and analog inputs (ANn) on after turning the digital power supply (VCC) on. It is also required to turn the digital power off after turning the A/D converter supply and analog inputs off. In this case, the voltage must not exceed AVRH or AVCC (turning the analog and digital power supplies simultaneously on or off is acceptable). 8. Pin handling when not using the A/D converter It is required to connect the unused pins of the A/D converter as AVCC = VCC, AVSS = AVRH = VSS. 9. Notes on Power-on To prevent malfunction of the internal voltage regulator, supply voltage profile while turning the power supply on should be slower than 50µs from 0.2V to 2.7V. 10. Stabilization of power supply voltage If the power supply voltage varies acutely even within the operation safety range of the Vcc power supply voltage, a malfunction may occur. The Vcc power supply voltage must therefore be stabilized. As stabilization guidelines, the power supply voltage must be stabilized in such a way that Vcc ripple fluctuations (peak to peak value) in the commercial frequencies (50Hz to 60 Hz) fall within 10% of the standard Vcc power supply voltage and the transient fluctuation rate becomes 0.1V/μs or less in instantaneous fluctuation for power supply switching. 26 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series 11. Serial communication There is a possibility to receive wrong data due to noise or other causes on the serial communication. Therefore, design a printed circuit board so as to avoid noise. Consider receiving of wrong data when designing the system. For example apply a checksum and retransmit the data if an error occurs. DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 27 MB96620 Series ELECTRICAL CHARACTERISTICS This section describes the electrical characteristics of MB96620 series. 1. Absolute Maximum Ratings Parameter Symbol Condition Power supply voltage*1 Vcc - AVcc - AVRH - Input voltage*1 VI Output voltage*1 Analog power supply voltage*1 Analog reference voltage*1 Maximum clamp current Total maximum clamp current "L" level maximum output current "L" level average output current "L" level maximum overall output current "L" level average overall output current "H" level maximum output current "H" level average output current "H" level maximum overall output current "H" level average overall output current Power consumption*5 Rating Min Max Unit Vss 0.3 Vss + 6.0 Vss 0.3 Vss 0.3 Vss + 6.0 Vss + 6.0 - Vss 0.3 VO - ICLAMP Remarks V V Vcc = AVcc*2 V AVCC ≥ AVRH AVRH ≥ AVSS Vcc + 0.3 V VI ≤ VCC + 0.3V*3 Vss 0.3 Vcc + 0.3 V VO ≤ VCC + 0.3V*3 - -4.0 +4.0 mA ∑|ICLAMP| - - 17 mA IOL - - 15 mA IOLAV - - 4 mA ∑IOL - - TBD mA ∑IOLAV - - 21 mA IOH - - -15 mA IOHAV - - -4 mA ∑IOH - - TBD mA ∑IOHAV - - -21 PD Applicable to general purpose I/O pins*4 Applicable to general purpose I/O pins*4 mA 6 TA=+85°C TA=+105°C - TBD* TBD*6 mW mW TA=+85°C - TBD*6 mW No Flash program erase*7 Operating ambient TA -40 +105 °C temperature Storage temperature TSTG - 55 + 150 °C *1: Base on Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to + 105°C. *2: AVCC and VCC must be set to the same voltage. It is required that AVCC does not exceed VCC and that the voltage at the analog inputs does not exceed AVCC when the power is switched on. *3: VI and VO should not exceed VCC + 0.3 V. VI should also not exceed the specified ratings. However if the maximum current to/from an input is limited by some means with external components, the ICLAMP rating supersedes the VI rating. Input/output voltages of standard ports depend on VCC. 28 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series *4: • Applicable to all general purpose I/O pins (Pnn_m) • Use within recommended operating conditions. • Use at DC voltage (current) • The +B signal should always be applied a limiting resistance placed between the +B signal and the microcontroller. • The value of the limiting resistance should be set so that when the +B signal is applied the input current to the microcontroller pin does not exceed rated values, either instantaneously or for prolonged periods. • Note that when the microcontroller drive current is low, such as in the power saving modes, the +B input potential may pass through the protective diode and increase the potential at the VCC pin, and this may affect other devices. • Note that if a +B signal is input when the microcontroller power supply is off (not fixed at 0 V), the power supply is provided from the pins, so that incomplete operation may result. • Note that if the +B input is applied during power-on, the power supply is provided from the pins and the resulting supply voltage may not be sufficient to operate the Power reset (except devices with persistent low voltage reset in internal vector mode). • Sample recommended circuits: Protective diode VCC P-ch Limiting resistance +B input (0 V to 16 V) N-ch R *5: The maximum permitted power dissipation depends on the ambient temperature, the air flow velocity and the thermal conductance of the package on the PCB. The actual power dissipation depends on the customer application and can be calculated as follows: PD = PIO + PINT PIO = Σ (VOL × IOL + VOH × IOH) (I/O load power dissipation, sum is performed on all I/O ports) PINT = VCC × (ICC + IA) (internal power dissipation) ICC is the total core current consumption into VCC as described in the “DC characteristics” and depends on the selected operation mode and clock frequency and the usage of functions like Flash programming. IA is the analog current consumption into AVCC. *6: Worst case value for a package mounted on single layer PCB at specified TA without air flow. *7: Please contact FUJITSU SEMICONDUCTOR for reliability limitations when using under these conditions. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 29 MB96620 Series 2. Recommended Operating Conditions (Vss = AVss = 0.0V) Parameter Power supply voltage Smoothing capacitor at C pin Value Symbol Unit Min Typ Max Vcc CS 2.7 0.5 - 1.0 5.5 1.5 Remarks V μF 1.0μF (Allowance within ± 50%) Please use the ceramic capacitor or the capacitor of the frequency response of this level. The smoothing capacitor at Vcc must use the one of a capacity value that is larger than Cs. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. 30 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series 3. DC Characteristics The following tables show the DC characteristics. 1. Current rating of MB96F622/F623/F625 (Provisional value) (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to + 105°C) Value Pin Parameter Symbol Conditions Unit Remarks name Min Typ Max PLL Run mode with 30 mA TA =+ 25°C CLKS1/2 = CLKB = CLKP1/2 = 32MHz ICCPLL (CLKRC and CLKSC 40 mA TA = +105°C stopped) Main Run mode with 5 mA TA = +25°C CLKS1/2 = CLKB = Power supply CLKP1/2 = 4MHz I CCMAIN current in Vcc (CLKPLL, CLKSC and 10 mA TA = +105°C Run modes*1 CLKRC stopped) Sub Run mode with 0.5 mA TA = +25°C CLKS1/2 = CLKB = CLKP1/2 = 32kHz ICCSUB (CLKMC, CLKPLL and 5 mA TA = +105°C CLKRC stopped) PLL Sleep mode with 10 mA TA =+ 25°C CLKS1/2 = CLKP1/2 = 32MHz ICCSPLL (CLKRC and CLKSC 15 mA TA = +105°C stopped) Main Sleep mode with 3 mA TA =+ 25°C Power supply CLKS1/2 = CLKP1/2 = 4MHz current in ICCSMAIN Vcc (CLKPLL, CLKRC Sleep modes*1 8 mA TA = +105°C and CLKSC stopped) Sub Sleep mode with 0.3 mA TA =+ 25°C CLKS1/2 = CLKP1/2 = 32kHz, ICCSSUB (CLKMC, CLKPLL and 4.5 mA TA = +105°C CLKRC stopped) Main Timer mode with 360 430 μA TA =+ 25°C CLKMC = 4MHz CL=10pF ICCTMAIN (CLKPLL, CLKRC 1250 μA TA = +105°C and CLKSC stopped) Power supply current in Timer modes*2 RC Timer mode with (CLKRC = 2MHz) ICCTRCH - 150 190 μA TA = +25°C - - 1025 μA TA = +105°C - 45 75 μA TA =+ 25°C - - 855 μA TA = +105°C - 40 75 μA TA = +25°C - - 840 μA TA = +105°C Vcc ICCTRCL ICCTSUB RC Timer mode with (CLKRC = 100kHz) Sub Timer mode with CLKSC = 32kHz CL=10pF (CLKMC, CLKPLL and CLKRC stopped) DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 31 MB96620 Series (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to + 105°C) Parameter Symbol Pin name Conditions Min Value Typ Max Unit Remarks Power 30 55 μA TA = +25°C supply ICCH current in 830 μA TA = +105°C Stop mode *3 Power supply This current must be Vcc current added to all Power Low voltage for active ICCLVD 5 10 μA supply currents detector enabled Low above Voltage detector Must be added to all Current for Flash Flash Write/ 15 25 mA ICCFLASH current above module Erase current *1: The power supply current is measured with a 4MHz external clock connected to the Main oscillator and a 32kHz external clock connected to the Sub oscillator. See chapter “Standby mode and voltage regulator control circuit” of the Hardware Manual for further details about voltage regulator control. *2: The power supply current in Timer mode is the value when Flash is in Flash Deep sleep mode. Main Timer mode is the value in crystal oscillator of 4MHz (CL=10pF). Sub Timer mode is the value in crystal oscillator of 32kHz (CL=10pF). *3: The power supply current in Stop mode is the value when Flash is in Flash Deep Sleep mode. 32 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series 2. Pin Characteristics (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to + 105°C) Parameter "H" level input voltage Symbol Pin name VIH Port inputs Pnn_m Conditions - - Vcc + 0.3 Vcc + 0.3 Unit V V Remarks CMOS Hysteresis Input AUTOMOTIVE Hysteresis Input X0 External clock in “oscillation mode” VD × 0.8 - VD V VIHX0AS X0A External clock in “oscillation mode” Vcc × 0.8 - Vcc + 0.3 V VIHR RSTX - Vcc × 0.8 - Vcc + 0.3 V CMOS Hysteresis Input VIHM MD - Vcc - 0.3 - Vcc + 0.3 V CMOS Hysteresis Input VIHD DEBUG I/F - 2.0 - V TTL Input VIL Port inputs Pnn_m External clock in “oscillation mode” External clock in “oscillation mode” X0 VILX0AS X0A VILR RSTX - VILM MD - VILD DEBUG I/F - VOH4 4mA type VOH3 3mA type VOL4 4mA type VOL3 3mA type Input leak current IIL Pnn_m Pull-up resistance value RPU Pnn_m "H" level output voltage "L" level output voltage Vcc × 0.7 Vcc × 0.8 Value Typ Max VIHX0S VILX0S "L" level input voltage Min 4.5V ≤ Vcc ≤ 5.5V IOH = -4mA 2.7V ≤ Vcc < 4.5V IOH = TBD 4.5V ≤ Vcc ≤ 5.5V IOH = -3mA 2.7V ≤ Vcc < 4.5V IOH = TBD 4.5V ≤ Vcc ≤ 5.5V IOH = +4mA 2.7V ≤ Vcc < 4.5V IOH = TBD 4.5V ≤ Vcc < 5.5V IOH = -3mA Vss < VI < Vcc AVss < VI < AVcc, AVRH Vcc=5.0V ±10% DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Vss - 0.3 Vss - 0.3 - Vcc + 0.3 Vcc × 0.3 Vcc × 0.5 VD × 0.2 Vcc × 0.2 V V V VD=1.8V±0.15V CMOS Hysteresis Input AUTOMOTIVE Hysteresis Input VD=1.8V±0.15V Vss - Vss - 0.3 - Vss - 0.3 - Vcc × 0.2 V CMOS Hysteresis Input - Vss + 0.3 V CMOS Hysteresis Input - 0.8 V TTL Input Vcc - 0.5 - Vcc V Vcc - 0.5 - Vcc V - - 0.4 V - - 0.4 V -1 - 1 μA 25 50 100 kΩ Vss - 0.3 Vss - 0.3 V 33 MB96620 Series Parameter Input capacitance Symbol Pin name Conditions CIN Other than Vcc, Vss, AVcc, AVss, AVRH - 34 FUJITSU SEMICONDUCTOR CONFIDENTIAL Value Min Typ Max - 5 15 Unit Remarks pF DS704-00008-0v01-E MB96620 Series 4. AC Characteristics The following tables show the AC characteristics. (1) Main Clock Input Characteristics (AVcc = 2.7V to 5.5V, Vcc= 1.8V ± 0.15V, Vss = AVss = 0V, TA = - 40°C to + 105°C) Parameter Symbol Input frequency Input frequency fC fFCI Value Typ Max 4 - 8 MHz - - 8 MHz 4 - 8 MHz - - 16 MHz 4 - 16 MHz Pin Conditions name Min X0, X1 X0 Unit - - Input clock cycle tCYLH - - 62.5 - - ns Input clock pulse width PWH, PWL - - 30 - 70 % Remarks When using a crystal oscillator, PLL off When using an opposite phase external clock, PLL off When using a crystal oscillator or opposite phase external clock, PLL on When using a single phase external clock in “Fast Clock Input mode” , PLL off When using a single phase external clock in “Fast Clock Input mode” , PLL on tCYLH The amplitude changes by resistance, capacity which added outside or the difference of the device. DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 35 MB96620 Series (2) Sub Clock Input Characteristics (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to + 105°C) Parameter Input frequency Input clock cycle Input clock pulse width Min Value Typ Max - - 32.768 - kHz - - - 100 kHz X0A - - - 50 kHz tCYLL - 10 - - μs - - PWH/tCYLL PWL/tCYLL 30 - 70 % Symbol Pin Conditions name FCL X0A, X1A Unit Remarks When using an oscillation circuit When using an opposite phase external clock When using a single phase external clock tCYLL X0A 0.8×Vcc 0.8×Vcc 0.8×Vcc 0.2×Vcc 0.2×Vcc PWH PWL (3) Built-in CR Oscillation Characteristics (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to + 105°C) Parameter Clock frequency Symbol Min Value Typ Max - 50 100 200 - 1 2 4 Conditions FCR Unit Remarks When using slow kHz frequency of RC oscillator When using fast MHz frequency of RC oscillator (4) Internal Clock timing (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to + 105°C) Parameter Symbol Value Min Max Unit Internal System clock frequency (CLKS1 and CLKS2) fCLKS1, fCLKS2 - 54 MHz Internal CPU clock frequency (CLKB), Internal peripheral clock frequency (CLKP1) fCLKB, fCLKP1 - 32 MHz Internal peripheral clock frequency (CLKP2) fCLKP2 - 32 MHz 36 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series (5) Operating Conditions of PLL (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to + 105°C) Parameter Symbol Value Min Typ Max Unit Remarks Time from when the PLL starts operating until the oscillation stabilizes PLL oscillation stabilization wait time (LOCK UP time) tLOCK 1 - 4 ms PLL input clock frequency PLL macro oscillation clock frequency fPLLI fPLLO 4 56 - 16 108 MHz MHz (6) Reset Input Characteristics (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to + 105°C) Parameter Symbol Reset input time RSTX TRSTL Rejection of reset input time Value Pin name Conditions Unit Min Max - 10 - µs - 1 - µs (7) Power-on Reset Timing (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to + 105°C) Parameter Symbol Power on rise time Power off time Tr Toff Min Value Typ Max 0.05 1 - 30 - Unit ms ms Toff Tr 2.7V 0.2V 0.2V 0.2V If the power supply is changed too rapidly, a power-on reset may occur. We recommend a smooth startup by restraining voltages when changing the power supply voltage during operation, as shown in the figure below. 3V DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Rising edge of 50 mV/ms maximum is allowed 37 MB96620 Series (8) USART Timing (Provisional value) (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to + 105°C, CL=50pF) Parameter Serial clock cycle time SCK ↓ → SOT delay time Symbol 4.5V ≤ Vcc < 5.5V Pin Conditions Min Max name tSCYC SCKn SCKn tSLOVI SOTn SCKn Internal shift clock SOTn operation SCKn SINn SCKn SINn SOT → SCK ↑ delay time tOVSHI SIN → SCK ↑ setup time tIVSHI SCK ↑ → SIN hold time tSHIXI Serial clock "L" pulse width tSLSH SCKn Serial clock "H" pulse width tSHSL SCKn 2.7V ≤ Vcc < 4.5V Min Max 4 tCLKP1 - 4 tCLKP1 - ns - 20 + 20 - 30 + 30 ns - ns - ns - ns - ns - ns N× tCLKP1 – 20* tCLKP1 + 45 0 tCLKP1 + 10 tCLKP1 + 10 - N× tCLKP1 – 30* tCLKP1 + 55 0 tCLKP1 + 10 tCLKP1 + 10 SCKn 2 tCLKP1 2 tCLKP1 External shift SOTn +45 + 55 clock SCKn tCLKP1/2 tCLKP1/2 operation tIVSHE SIN → SCK ↑ setup time SINn + 10 + 10 SCKn tCLKP1 + tCLKP1 + tSHIXE SCK ↑ → SIN hold time SINn 10 10 SCK fall time tF SCKn 20 20 SCK rise time tR SCKn 20 20 Notes: y The above characteristics apply to CLK synchronous mode. y CL is the load capacity value of pins when testing. y Depending on the used machine clock frequency, the maximum possible baud rate can be limited by some parameters. These parameters are shown in “MB96620 series HARDWARE MANUAL” y tCLKP1 indicates the peripheral clock 1 (CLKP1), Unit : ns y These characteristics only guarantee the same relocate port number. For example, The combination of SCLKn_0 and SOTn_1 is not guaranteed. SCK ↓ → SOT delay time Unit tSLOVE ns ns ns ns ns *: Parameter N depends on tSCYCI and can be calculated as follows: • If tSCYCI = 2× k× tCLKP1, then N = k, where k is an integer > 2 • If tSCYCI = (2× k+1) × tCLKP1, then N = k+1, where k is an integer > 1 Examples: tSCYC N 4× tCLKP1 2 5× tCLKP1, 6× tCLKP1 3 7× tCLKP1, 8× tCLKP1 4 ... ... 38 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series tSCYC VOH SCK VOL tSLOVI VOH SOT VOL tIVSHI tSHIXI VIH VIH VIL VIL SIN MS bit = 0 tSHSL tSLSH SCK VIH VIH VIL VIL tR tF SOT tSLOVE VOH VOL tIVSHE SIN tSHIXE VIH VIH VIL VIL MS bit = 1 DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 39 MB96620 Series (9) External input timing (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to + 105°C, CL=50pF) Parameter Symbol Pin name Value Unit Min Max Conditions Pnn_m ADTG_R TINn TTGn Input pulse width FRCKn tINH tINL - INn 2tCLKP1 +200 (tCLKP1= 1/fCLKP1)* - ns Remarks General Purpose I/O A/D converter trigger input Reload Timer PPG Trigger input Free-Running Timer input clock Input capture AINn BINn ZINn Quadrature position/revolution counter External interrupt INTn(_R, _R1), 200 ns NMI NMI_R * : tCLKP1 indicates the peripheral clock1 (CLKP1) cycle time except stop time at stop mode. tINH VILS tINL VILS 40 FUJITSU SEMICONDUCTOR CONFIDENTIAL VIHS VIHS DS704-00008-0v01-E MB96620 Series 2 (10) I C timing (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to +105°C) Parameter Symbol Conditions Typical mode Min Max High-speed Unit mode*4 Min Max SCL clock frequency fSCL 0 100 0 400 kHz (Repeated) START condition hold time tHDSTA 4.0 0.6 μs SDA ↓ → SCL ↓ SCLclock "L" width tLOW 4.7 1.3 μs SCLclock "H" width tHIGH 4.0 0.6 μs (Repeated) START setup time tSUSTA 4.7 0.6 μs SCL ↑ → SDA ↓ CL = 50pF, Data hold time 1 tHDDAT R = (Vp/IOL) * 0 3.45*2 0 0.9*3 μs SCL ↓ → SDA ↓ ↑ Data setup time tSUDAT 250 100 ns SDA ↓ ↑ → SCL ↑ STOP condition setup time tSUSTO 4.0 0.6 μs SCL ↑ → SDA ↑ Bus free time between "STOP condition" and tBUS 4.7 1.3 μs "START condition" Capacitive load for each bus line Cb 400 400 pF *1: R and C represent the pull-up resistance and load capacitance of the SCL and SDA lines, respectively. Vp indicates the power supply voltage of the pull-up resistance and IOL indicates VOL guaranteed current. *2: The maximum tHDDAT must satisfy that it doesn't extend at least "L" period (tLOW) of device's SCL signal. *3: A high-speed mode I2C bus device can be used on a standard mode I2C bus system as long as the device satisfies the requirement of "tSUDAT ≥ 250 ns". *4: tCLKP1 is the peripheral clock1 (CLKP1) cycle time. To use I2C, set the peripheral bus clock at 8 MHz or more. *5: Cb = Capacitance of each bus line in pF. SDA tSUDAT tLOW tSUSTA tBUS SCL tHDSTA tHDDAT tHIGH DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL tHDSTA tSUSTO 41 MB96620 Series z 10bit A/D Converter This chapter shows the electrical characteristics for the A/D converter. x Electrical characteristics for the A/D converter (Provisional value) (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to + 105°C) Parameter Symbol Pin name Min Value Typ Max Unit Resolution - - - - 10 bit Total error - - - 3.0 - + 3.0 LSB Nonlinearity error - - - 2.5 - + 2.5 LSB - - - 1.9 - + 1.9 LSB VOT ANx Typ - 20 Typ + 20 mV VFST ANx Typ - 20 Typ + 20 mV Compare time - - Sampling time - - 5.0 TBD 3.1 μs μs μs μs mA Differential Nonlinearity error Zero transition voltage Full transition voltage Power supply current Reference power supply current (between AVRH to AVSS) Analog input capacity Analog port input current Analog input voltage Reference voltage range IA IAH AVCC IR 1.0 2.0 0.5 1.2 - AVss + 0.5LSB AVRH - 1.5LSB 2.0 - - 3.3 μA - TBD TBD mA A/D Converter active - - TBD μA A/D Converter not operated AVRH IRH Remarks CVIN ANx - - 15.5 pF IAIN ANx - 0.3 - + 0.3 μA VAIN ANx AVSS - AVRH V - AVRH AVCC - 0.1 - AVCC V 42 FUJITSU SEMICONDUCTOR CONFIDENTIAL 4.5V ≤ ΑVCC ≤ 5.5V 2.7V ≤ ΑVCC < 4.5V 4.5V ≤ ΑVCC ≤ 5.5V 2.7V ≤ ΑVCC < 4.5V A/D Converter active A/D Converter not operated AVSS < V < AVCC, AVRH DS704-00008-0v01-E MB96620 Series Accuracy and setting of the A/D Converter sampling time If the external impedance is too high or the sampling time too short, the analog voltage charged to the internal sample and hold capacitor is insufficient, adversely affecting the A/D conversion precision. To satisfy the A/D conversion precision, a sufficient sampling time must be selected. The required sampling time depends on the external driving impedance Rext, the board capacitance of the A/D converter input pin Cext and the AVcc voltage level. The following replacement model can be used for the calculation: MCU Analog input RADC Rext Source Comparetor Cext CIN CADC Sampling switch Rext: External driving impedance Cext: Capacitance of PCB at A/D converter input CVIN: Capacitance of MCU input pin (I/O, analog switch and ADC are contained) RVIN: Analog input impedance (I/O, analog switch and ADC are contained) The following approximation formula for the replacement model above can be used: Tsamp [min] = TBD w Do not select a sampling time below the absolute minimum permitted value. (0.5μs for 4.5V ≤ AVcc ≤ 5.5V,1.2 μs for 2.7V ≤ AVcc < 4.5V). w If the sampling time cannot be sufficient, connect a capacitor of about 0.1 μF to the analog input pin. w A big external driving impedance also adversely affects the A/D conversion precision due to the pin input leakage current IIL (static current before the sampling switch) or the analog input leakage current IAIN (total leakage current of pin input and comparator during sampling). The effect of the pin input leakage current IIL cannot be compensated by an external capacitor. w The accuracy gets worse as |AVRH - AVSS| becomes smaller. DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 43 MB96620 Series • Definition of 10-bit A/D Converter Terms ⋅ Resolution ⋅ Linearity error : Analog variation that is recognized by an A/D converter. : Deviation of the line between the zero-transition point (0b0000000000←→ 0b0000000001) and the full-scale transition point (0b1111111110←→ 0b1111111111) from the actual conversion characteristics. ⋅ Differential linearity error : Deviation from the ideal value of the input voltage that is required to change the output code by 1 LSB. ⋅ Total error : Difference between the actual value and the theoretical value. The total error includes zero transition error, full-scale transition error, and linearity error. Linearity error 0x3FF Actual conversion characteristics 0x3FE Actual conversion characteristics 0x(N+1) {1 LSB(N-1) + VOT} VFST VNT 0x004 (Actuallymeasured value) (Actually-measured value) 0x003 Digital output Digital output 0x3FD Differential linearity error Actual conversion characteristics Ideal characteristics 0x002 0x001 0xN Ideal characteristics (Actually-measured value) VNT (Actually-measured value) 0x(N-2) VOT (Actually-measured value) AVss V(N+1)T 0x(N-1) Actual conversion characteristics AVRH AVss AVRH Analog input Linearity error of digital output N = Analog input VNT - {1LSB × (N - 1) + VOT} 1LSB’ Differential linearity error of digital output N = 1LSB = N VOT VFST VNT : : : : V(N + 1) T - VNT 1LSB [LSB] - 1 [LSB] VFST - VOT 1022 A/D converter digital output value. Voltage at which the digital output changes from 0x000 to 0x001. Voltage at which the digital output changes from 0x3FE to 0x3FF. Voltage at which the digital output changes from 0x(N − 1) to 0xN. (Continued) 44 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series (Continued) Total error 0x3FF 1.5 LSB' Digital output 0x3FE Actual conversion characteristics 0x3FD {1 LSB'(N-1) + 0.5 LSB'} 0x004 VNT 0x003 (Actually-measured value) Actual conversion characteristics Ideal characteristics 0x002 0x001 0.5 LSB' AVss AVRH Analog input 1LSB' (Ideal value) = AVRH - AVSS 1024 Total error of digital output N = [V] VNT - {1LSB' × (N - 1) + 0.5LSB'} 1LSB' N : A/D converter digital output value. VNT : Voltage at which the digital output changes from 0x(N + 1) to 0xN. VOT' (Ideal value) = AVSS + 0.5LSB[V] VFST' (Ideal value) = AVRH - 1.5LSB[V] DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 45 MB96620 Series z Low voltage detection characteristics x Low voltage detection reset (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to + 105°C) Parameter Detected voltage Detected voltage Detected voltage Detected voltage Detected voltage Detected voltage Detected voltage Change ration of power supply voltage Symbol Conditions Min Value Typ Max Unit VDL0 VDL1 VDL2 VDL3 VDL4 VDL5 VDL6 - 2.70 2.79 2.98 3.26 3.45 3.73 3.91 2.90 3.00 3.20 3.50 3.70 4.00 4.20 3.10 3.21 3.42 3.74 3.95 4.27 4.49 V V V V V V V dV/dt - -0.004 - - V/μs Remarks CILCR:LVL = 0000B CILCR:LVL = 0001B CILCR:LVL = 0010B CILCR:LVL = 0011B CILCR:LVL = 0100B CILCR:LVL = 0111B CILCR:LVL = 1001B Detected voltage (VDL) must be within standards. Voltage Vcc VDLx, max VDLx, min dV dt Time 46 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series z Flash Memory Write/Erase Characteristics (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, TA = - 40°C to + 105°C) Min Value Typ Max Large Sector - 0.6 Small Sector - Half word (16 bit) write time Chip erase time Parameter Sector erase time Unit Remarks 3.1 s 0.3 1.6 s Excludes write time prior to internal erase. - 25 400 μs - 2.7 14.2 s Not including system-level overhead time. Excludes write time prior to internal erase. Erase/write cycles and data hold time (target value) Erase/write cycles Data hold time (cycle) (year) 1,000 20 * 10,000 10 * 100,000 5* *: This value comes from the technology qualification (using Arrhenius equation to translate high temperature measurements into normalized value at + 85°C). DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 47 MB96620 Series ORDERING INFORMATION MCU with CAN controller Part number MB96F622RAPMC-GSE1 * MB96F622RAPMC-GSE2 * MB96F622RAPMC1-GSE1 * MB96F622RAPMC1-GSE2 * MB96F623RAPMC-GSE1 * MB96F623RAPMC-GSE2 * MB96F623RAPMC1-GSE1 * MB96F623RAPMC1-GSE2 * MB96F625RAPMC-GSE1 * MB96F625RAPMC-GSE2 * MB96F625RAPMC1-GSE1 * MB96F625RAPMC1-GSE2 * Flash/ROM Flash A (64.5KBytes) Flash A (96.5KBytes) Flash A (160.5KBytes) Package 64-pin plastic LQFP (FPT-64P-M23) 64-pin plastic LQFP (FPT-64P-M24) 64-pin plastic LQFP (FPT-64P-M23) 64-pin plastic LQFP (FPT-64P-M24) 64-pin plastic LQFP (FPT-64P-M23) 64-pin plastic LQFP (FPT-64P-M24) MCU without CAN controller Part number MB96F622AAPMC-GSE1 * MB96F622AAPMC-GSE2 * MB96F622AAPMC1-GSE1 * MB96F622AAPMC1-GSE2 * MB96F623AAPMC-GSE1 * MB96F623AAPMC-GSE2 * MB96F623AAPMC1-GSE1 * MB96F623AAPMC1-GSE2 * MB96F625AAPMC-GSE1 * MB96F625AAPMC-GSE2 * MB96F625AAPMC1-GSE1 * MB96F625AAPMC1-GSE2 * Flash/ROM Flash A (64.5KBytes) Flash A (96.5KBytes) Flash A (160.5KBytes) Package 64-pin plastic LQFP (FPT-64P-M23) 64-pin plastic LQFP (FPT-64P-M24) 64-pin plastic LQFP (FPT-64P-M23) 64-pin plastic LQFP (FPT-64P-M24) 64-pin plastic LQFP (FPT-64P-M23) 64-pin plastic LQFP (FPT-64P-M24) *: These devices are under development and specification is preliminary. These products under development may change its specification without notice. 48 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series PACKAGE DIMENSION 64-pin plastic LQFP Lead pitch 0.65 mm Package width × package length 12.0 × 12.0 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.70 mm MAX Weight 0.47 g Code (Reference) P-LQFP64-12×12-0.65 (FPT-64P-M23) 64-pin plastic LQFP (FPT-64P-M23) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 14.00±0.20(.551±.008)SQ *12.00±0.10(.472±.004)SQ 48 0.145±0.055 (.006 ±.002) 33 49 32 0.10(.004) Details of "A" part +0.20 1.50 –0.10 +.008 (Mounting height) .059 –.004 0.25(.010) INDEX 0~8° 64 17 1 0.65(.026) C "A" 16 0.32 ±0.05 (.013 ±.002) 0.50 ±0.20 (.020 ±.008) 0.60 ±0.15 (.024 ±.006) 0.10 ±0.10 (.004 ±.004) (Stand off) 0.13(.005) M 2003-2010 FUJITSU SEMICONDUCTOR LIMITED F64034S-c-1-4 Dimensions in mm (inches). Note: The values in parentheses are reference values Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ (Continued) DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 49 MB96620 Series (Continued) 64-pin plastic LQFP Lead pitch 0.50 mm Package width × package length 10.0 × 10.0 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.70 mm MAX Weight 0.32 g Code (Reference) P-LFQFP64-10×10-0.50 (FPT-64P-M24) 64-pin plastic LQFP (FPT-64P-M24) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 12.00±0.20 (.472±.008)SQ * 10.00±0.10 (.394±.004)SQ 48 0.145 ±0.055 (.006 ±.002) 33 32 49 0.08(.003) Details of "A" part +0.20 1.50 –0.10 +.008 (Mounting height) .059 –.004 INDEX 0°~8° 17 64 0.10±0.10 (.004±.004) (Stand off) "A" LEAD No. 1 16 0.50(.020) C 0.20±0.05 (.008±.002) 0.08(.003) M 2005-2010 FUJITSU SEMICONDUCTOR LIMITED F64036S-c-1-3 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.25(.010) Dimensions in mm (inches). Note: The values in parentheses are reference values Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ 50 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E MB96620 Series REVISION HISTORY Revision Date Prelim 1 2011-03-07 Modification Creation DS704-00008-0v01-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 51 MB96620 Series FUJITSU SEMICONDUCTOR LIMITED Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome, Kohoku-ku Yokohama Kanagawa 222-0033, Japan Tel: +81-45-415-5858 http://jp.fujitsu.com/fsl/en/ For further information please contact: North and South America FUJITSU SEMICONDUCTOR AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://us.fujitsu.com/micro/ Asia Pacific FUJITSU SEMICONDUCTOR ASIA PTE. LTD. 151 Lorong Chuan, #05-08 New Tech Park 556741 Singapore Tel : +65-6281-0770 Fax : +65-6281-0220 http://www.fujitsu.com/sg/services/micro/semiconductor/ Europe FUJITSU SEMICONDUCTOR EUROPE GmbH Pittlerstrasse 47, 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://emea.fujitsu.com/semiconductor/ FUJITSU SEMICONDUCTOR SHANGHAI CO., LTD. Rm. 3102, Bund Center, No.222 Yan An Road (E), Shanghai 200002, China Tel : +86-21-6146-3688 Fax : +86-21-6335-1605 http://cn.fujitsu.com/fss/ Korea FUJITSU SEMICONDUCTOR KOREA LTD. 206 Kosmo Tower Building, 1002 Daechi-Dong, Gangnam-Gu, Seoul 135-280, Republic of Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://kr.fujitsu.com/fmk/ FUJITSU SEMICONDUCTOR PACIFIC ASIA LTD. 10/F., World Commerce Centre, 11 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel : +852-2377-0226 Fax : +852-2376-3269 http://cn.fujitsu.com/fsp/ Specifications are subject to change without notice. For further information please contact each office. All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of FUJITSU SEMICONDUCTOR device; FUJITSU SEMICONDUCTOR does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. FUJITSU SEMICONDUCTOR assumes no liability for any damages whatsoever arising out of the use of the information. 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The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that FUJITSU SEMICONDUCTOR will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws. The company names and brand names herein are the trademarks or registered trademarks of their respective owners. Edited: Sales Promotion Department 52 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00008-0v01-E