Freescale Semiconductor Technical Data Document Number: MPC17529 Rev. 4.0, 10/2015 0.7 A Dual H-Bridge Motor Driver with 3.0 V/5.0 V Compatible Logic I/O 17529 The 17529 is a monolithic dual H-Bridge power IC ideal for portable electronic applications containing bipolar step motors and/or brush DC-motors (e.g., cameras and disk drive head positioners). The 17529 operates from 2.0 V to 6.8 V, with independent control of each HBridge via parallel MCU interface (3.0 V and 5.0 V compatible logic). The device features an on-board charge pump, as well as built-in shoot-through current protection and an undervoltage shutdown function. The 17529 has four operating modes: forward, reverse, brake, and tri-stated (high-impedance). The 17529 has a low total RDS(on) of 1.2 Ω (max at 25 °C). The 17529’s low output resistance and high slew rate provides efficient drive for many types of micromotors. DUAL H-BRIDGE EV SUFFIX (PB-FREE) 98ASA10616D 20-PIN VMFP Features • Low total RDS(on) 0.7 Ω (typ), 1.2 Ω (max) at 25 °C • Output current 0.7 A (DC), 1.4 A (peak) • Shoot-through current protection circuit • 3.0 V/ 5.0 V CMOS-compatible inputs • PWM control input frequency up to 200 kHz • Built-in charge pump circuit • Low power consumption • Undervoltage detection and shutdown circuit 5.0 V 5.0 V 17529 VDD VM 1/2 C1L C1H C2L OUT1A C2H CRES OUT1B MCU IN1A IN1B IN2A IN2B OE OUT2A GND PGND1/2 OUT2B N S Bipolar Step Motor Figure 1. 17529 Simplified Application Diagram © Freescale Semiconductor, Inc., 2012-2015. All rights reserved. EJ SUFFIX (PB-FREE) 98ASA00887D 20-PIN TSSOP WITH EXPOSED PAD ORDERABLE PARTS ORDERABLE PARTS Table 1. Orderable Part Variations (1) Part Number MPC17529EV/EL MPC17529EJ Temperature (TA) (2) Package 20 VMFP -20 °C to 65 °C 20 TSSOP (exposed pad) Notes 1. To order parts in Tape & Reel, add the R2 suffix to the part number. 2. Not recommended for new designs. 17529 2 Analog Integrated Circuit Device Data Freescale Semiconductor INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM CRES C2H Charge Pump C1H C1L C2L Low Voltage Shutdown VDD VM1 IN1A OUT1A H-Bridge OUT1B IN1B VDD PGND1 OE Control Logic Level Shifter Pre-driver VM2 IN2A OUT2A H-Bridge OUT2B IN2B PGND2 LGND Figure 2. 17529 Simplified Internal Block Diagram 17529 Analog Integrated Circuit Device Data Freescale Semiconductor 3 PIN CONNECTIONS PIN CONNECTIONS Transparent top view VDD IN1A IN1B OE OUT2A PGND1 OUT1A VM1 CRES C2H 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 LGND IN2A IN2B VM2 OUT2B PGND2 OUT1B C2L C1L CIH Figure 3. 17529 Pin Connections on Table 2. Pin Function Description Pin PinName Formal Name Definition 1 VDD Control Circuit Power Supply 2 IN1A Logic Input Control 1A Logic input control of OUT1A (refer to Table 6, Truth Table, page 8). 3 IN1B Logic Input Control 1B Logic input control of OUT1B (refer to Table 6, Truth Table, page 8). Positive power source connection for control circuit. 4 OE Output Enable 5 OUT2A H-Bridge Output 2A Logic output Enable control of H-Bridges (Low = True). 6 PGND1 Power Ground 1 7 OUT1A H-Bridge Output 1A 8 VM1 Motor Drive Power Supply 1 9 CRES Pre-driver Power Supply 10 C2H Charge Pump 2H Charge pump bucket capacitor 2 (positive pole). 11 C1H Charge Pump 1H Charge pump bucket capacitor 1 (positive pole). 12 C1L Charge Pump 1L Charge pump bucket capacitor 1 (negative pole). 13 C2L Charge Pump 2L Charge pump bucket capacitor 2 (negative pole). 14 OUT1B H-Bridge Output 1B 15 PGND2 Power Ground 2 16 OUT2B H-Bridge Output 2B 17 VM2 Motor Drive Power Supply 2 18 IN2B Logic Input Control 2B Logic input control of OUT2B (refer to Table 6, Truth Table, page 8). 19 IN2A Logic Input Control 2A Logic input control of OUT2A (refer to Table 6, Truth Table, page 8). 20 LGND Logic Ground Low-current logic signal ground. - - - Exposed pad on 20-Pin TSSOP Output A of H-Bridge channel 2. High-current power ground 1. Output A of H-Bridge channel 1. Positive power source connection for H-Bridge 1 (Motor Drive Power Supply). Internal triple charge pump output as pre-driver power supply. Output B of H-Bridge channel 1. High-current power ground 2. Output B of H-Bridge channel 2. Positive power source connection for H-Bridge 2 (Motor Drive Power Supply). 17529 4 Analog Integrated Circuit Device Data Freescale Semiconductor MAXIMUM RATINGS MAXIMUM RATINGS Table 3. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding the ratings may cause a malfunction or permanent damage to the device. Symbol VM VCRES Rating Value Unit Motor Supply Voltage -0.5 to 8.0 V Charge Pump Output Voltage -0.5 to 14 V VDD Logic Supply Voltage -0.5 to 7.0 V VIN Signal Input Voltage -0.5 to VDD + 0.5 V 0.7 1.4 A ±1500 ± 200 V IO IOPK VESD1 VESD2 Driver Output Current • Continuous • Peak ESD Voltage • Human Body Model • Machine Model Notes (3) (4) (5) TJ Operating Junction Temperature -20 to 150 °C TA Operating Ambient Temperature -20 to 65 °C TSTG Storage Temperature Range -65 to 150 °C RθJA Thermal Resistance 120 °C/W (6) Power Dissipation 1040 mW (7) Peak Package Reflow Temperature During Reflow Note 9 °C (8), (9) PD TPPRT Notes 3. TA = 25 °C, 10 ms pulse at 200 ms interval. 4. ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 Ω). 5. ESD2 testing is performed in accordance with the Machine Model (CZAP = 200 pF, RZAP = 0 Ω). 6. 7. Mounted on 37 x 50 Cu area (1.6 mm FR-4 PCB). TA = 25 °C. 8. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause a malfunction or permanent damage to the device. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts (i.e. MC33xxxD enter 33xxx), and review parametrics. 9. 17529 Analog Integrated Circuit Device Data Freescale Semiconductor 5 STATIC ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 4. Static Electrical Characteristics Characteristics noted under conditions TA = 25 °C, VDD = VM = 5.0 V, GND = 0 V, unless otherwise noted. Symbol Characteristic Min Typ Max Unit V Notes POWER (VM1, VM2, VDD) VM Motor Supply Voltage 2.0 5.0 6.8 VDD Logic Supply Voltage 2.7 5.0 5.6 V IQM Driver Quiescent Supply Current (No Signal Input) – – 1.0 μA IQVDD Logic Quiescent Supply Current (No Signal Input) (10) – – 1.0 mA IDVDD ICRES Operating Power Supply Current • Logic Supply Current (11) • Charge Pump Circuit Supply Current (12) – – – – 3.0 0.7 mA 1.5 2.0 2.5 V – 0.7 1.2 Ohms 12 13 13.5 V 0.01 0.1 1.0 μF 0.0 – VDD V VDD x 0.7 – – -1.0 – – – – – 50 – VDD x 0.3 1.0 – 100 V V μA μA μA VDDDET RDS(ON) Low VDD Detection Voltage (13) Driver Output ON Resistance (14) GATE DRIVE (C1L – C1H, C2L – C2H, CRES) VCRES CCP Gate Drive Voltage Recommended External Capacitance (C1L – C1H, C2L – C2H, CRES – GND) CONTROL LOGIC (OE, N1A, N1B, N2A, N2B) VIN Logic Input Voltage VIH VIL IIH IIL Logic Inputs (2.7 V < VDD < 5.7 V) • High-Level Input Voltage • Low-Level Input Voltage • High-Level Input Current • Low-Level Input Current • OE Pin Input Current Low IOILOE Notes 10. IQVDD includes the current to pre-driver circuit. 11. IVDD includes the current to pre-driver circuit at fIN = 100 kHz. 12. At fIN = 20 kHz. 13. Detection voltage is defined as when the output becomes high-impedance after VDD drops below the detection threshold. When the gate voltage VCRES is applied from an external source, VCRES = 7.5 V. 14. Source + sink at IO = 0.7 A. 17529 6 Analog Integrated Circuit Device Data Freescale Semiconductor DYNAMIC ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 5. Dynamic Electrical Characteristics Characteristics noted under conditions TA = 25 °C, VDD = VM = 5.0 V, GND = 0 V, unless otherwise noted. Symbol Characteristic Min Typ Max Unit INPUT (IN1A, IN1B, OE, IN2A, IN2B) f IN Pulse Input Frequency – – 200 kHz tR Input Pulse Rise Time – – 1.0 (16) μs (15) – – (16) μs (17) Propagation Delay Time • Turn-ON Time • Turn-OFF Time – – 0.1 0.1 0.5 0.5 μs (18) t VGON Charge Pump Wake-Up Time – 1.0 3.0 ms (19) t VDDDET Low-Voltage Detection Time – – 10 ms tF Input Pulse Fall Time 1.0 OUTPUT (OUT1A, OUT1B, OUT2A, OUT2B) t PLH t PHL Notes 15. 16. 17. 18. 19. Time is defined between 10% and 90%. That is, the input waveform slope must be steeper than this. Time is defined between 90% and 10%. Load of Output is 8.0 Ω resistance. CCP = 0.1 μF. 17529 Analog Integrated Circuit Device Data Freescale Semiconductor 7 TIMING DIAGRAMS TIMING DIAGRAMS IN1, IN2, OE VDDDETON 50% tPLH 2.5 V/3.5 V VDD 0.8 V/ 1.5 V tPHL 50% tVDDDET 90% OUTA, OUTB VDDDETOFF tVDDDET 90% 0% (<1.0 μA) IM 10% Figure 4. tPLH, tPHL, and tPZH Timing Figure 5. Low-Voltage Detection Timing Diagram VDD tVGON VCRES 11 V Figure 6. Charge Pump Timing Diagram Table 6. Truth Table INPUT OUTPUT IN1A IN2A IN1B IN2B OUT1A OUT2A OUT1B OUT2B L L L H L L L L H L L L H L H L H H Z Z H X X Z Z OE H = High. L = Low. Z = High-impedance. X = Don’t care. OE Pin is pulled up to VDD with internal resistance. 17529 8 Analog Integrated Circuit Device Data Freescale Semiconductor SYSTEM / APPLICATION INFORMATION INTRODUCTION SYSTEM / APPLICATION INFORMATION INTRODUCTION The 17529 is a monolithic dual H-Bridge ideal for portable electronic applications to control bipolar step motors and brush DC motors, such as those found in camera lens assemblies, camera shutters, optical disk drives, etc. The 17529 operates from 2.0 V to 6.8 V, providing dual H-bridge motor drivers with parallel 3.0 V or 5.0 V compatible I/O. The device features an on-board charge pump, as well as built-in shoot-through current protection and undervoltage shutdown. The 17529 has four operating modes: forward, reverse, brake, and tri-stated (high-impedance). The MOSFETs comprising the output bridge have a total source + sink RDS(ON) ≤ 1.2 Ω. The 17529 can simultaneously drive two brush DC motors or, as shown in Figure 1, 17529 Simplified Application Diagram on page 1, one bipolar step motor. The drivers are designed to be PWM’ed at frequencies up to 200 kHz. FUNCTIONAL PIN DESCRIPTION CONTROL CIRCUIT POWER SUPPLY (VDD) The VDD pin carries the logic supply voltage and current into the logic sections of the IC. VDD has an undervoltage threshold. If the supply voltage drops below the undervoltage threshold, the output power stage switches to a tri-state condition. When the supply voltage returns to a level that is above the threshold, the power stage automatically resumes normal operation according to the established condition of the input pins. LOGIC INPUT CONTROL (IN1A, IN1B, IN2A, AND IN2B) These logic input pins control each H-Bridge output. IN1A logic HIGH = OUT1A HIGH. However, if all inputs are taken HIGH, the outputs bridges are both tri-stated (refer to Table 6, Truth Table, page 8). OUTPUT ENABLE (OE) The OE pin is a LOW = TRUE enable input. When OE = HIGH, all H-Bridge outputs (OUT1A, OUT1B, OUT2A, and OUT2B) are tristated (high-impedance), regardless of logic input (IN1A, IN1B, IN2A, and IN2B) states. H-BRIDGE OUTPUT (OUT1A, OUT1B, OUT2A, AND OUT2B) These pins provide connection to the outputs of each of the internal H-Bridges (see Figure 2, 17529 Simplified Internal Block Diagram, page 3). MOTOR DRIVE POWER SUPPLY (VM1 AND VM2) The VM pins carry the main supply voltage and current into the power sections of the IC. This supply then becomes controlled and/or modulated by the IC as it delivers the power to the loads attached between the output pins. All VM pins must be connected together on the printed circuit board. CHARGE PUMP (C1L AND C1H, C2L AND C2H) These two pairs of pins, the C1L and C1H and the C2L and C2H, connect to the external bucket capacitors required by the internal charge pump. The typical value for the bucket capacitors is 0.1 μF. PRE-DRIVER POWER SUPPLY (CRES) The CRES pin is the output of the internal charge pump. Its output voltage is approximately three times the VDD voltage. The VCRES voltage is power supply for internal pre-driver circuit of H-Bridges. POWER GROUND (PGND) Power ground pins. They must be tied together on the PCB. LOGIC GROUND (LGND) Logic ground pin. 17529 Analog Integrated Circuit Device Data Freescale Semiconductor 9 APPLICATIONS FUNCTIONAL PIN DESCRIPTION APPLICATIONS TYPICAL APPLICATION Figure 7 shows a typical application for the 17529. When applying the gate voltage to the CRES pin from an external source, be sure to connect it via a resistor equal to, or greater than, RG = VCRES / 0.02 Ω. The internal charge pump of this device is generated from the VDD supply; therefore, care must be taken to provide sufficient gatesource voltage for the high side MOSFETs when VM >> VDD (e.g., VM = 5.0 V, VDD = 3.0 V), in order to ensure full enhancement of the high-side MOSFET channels. 5.0 V 17529 VC RES < 14 V RG > VCRES /0.02 Ω RG NC NC NC NC VDD VM C1L C1H OUT1A C2L C2H CRES 0.01 μF OUT1B OUT2A IN1A IN1B IN2A IN2B MCU OE OUT2B GND NC = No Connect Figure 7. 17529 Typical Application Diagram CONDUCTED ELECTROMOTIVE FORCE (CEMF) SNUBBING TECHNIQUES Care must be taken to protect the IC from potentially damaging CEMF spikes induced when commutating currents in inductive loads. Typical practice is to provide snubbing of voltage transients by placing a capacitor or zener at the supply pin (VM) (see Figure 8). 5.0 V 5.0 V 175XX VDD VM 5.0 V 5.0 V 175XX VDD VM C1L C1L C1H C1H C2L C2H OUT CRES C2L C2H OUT CRES OUT GND OUT GND Figure 8. CEMF Snubbing Techniques PCB LAYOUT When designing the printed circuit board (PCB), connect sufficient capacitance between power supply and ground pins to ensure proper filtering from transients. For all high-current paths, use wide copper traces and shortest possible distances. 17529 10 Analog Integrated Circuit Device Data Freescale Semiconductor PACKAGE DIMENSIONS FUNCTIONAL PIN DESCRIPTION PACKAGE DIMENSIONS Package dimensions are provided in package drawings. To find the most current package outline drawing, go to www.freescale.com and perform a keyword search for the drawing’s document number. Table 7. Package Suffix Package Outline Drawing Number 20-PIN VMFP EV 98ASA10616D 20-TSSOP EJ 98ASA00887D 17529 Analog Integrated Circuit Device Data Freescale Semiconductor 11 PACKAGE DIMENSIONS FUNCTIONAL PIN DESCRIPTION 17529 12 Analog Integrated Circuit Device Data Freescale Semiconductor PACKAGE DIMENSIONS FUNCTIONAL PIN DESCRIPTION 17529 Analog Integrated Circuit Device Data Freescale Semiconductor 13 PACKAGE DIMENSIONS FUNCTIONAL PIN DESCRIPTION . 17529 14 Analog Integrated Circuit Device Data Freescale Semiconductor PACKAGE DIMENSIONS FUNCTIONAL PIN DESCRIPTION 17529 Analog Integrated Circuit Device Data Freescale Semiconductor 15 PACKAGE DIMENSIONS FUNCTIONAL PIN DESCRIPTION 17529 16 Analog Integrated Circuit Device Data Freescale Semiconductor PACKAGE DIMENSIONS FUNCTIONAL PIN DESCRIPTION 17529 Analog Integrated Circuit Device Data Freescale Semiconductor 17 REVISION HISTORY REVISION HISTORY Revision Date Description of Changes 9/2005 • • Implemented Revision History page Converted to Freescale format 12/2013 • • • No technical changes Revised back page Updated document properties 7/2015 • • • Added 98ASA00887D package information and updated tables where applicable Added MPC17529EJ to the ordering information Updated as per PCN # 16724 8/2015 • Corrected the 98A package information for 20-pin TSSOP 10/2015 • • • Added EP notation for TSSOP package. Fixed notations for TSSOP in Orderable Parts and Pin Connections. Updated Package Dimensions 98A drawing for TSSOP 2.0 3.0 4.0 17529 18 Analog Integrated Circuit Device Data Freescale Semiconductor How to Reach Us: Information in this document is provided solely to enable system and software implementers to use Freescale products. Home Page: freescale.com There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based Web Support: freescale.com/support Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no on the information in this document. warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address: freescale.com/SalesTermsandConditions. Freescale and the Freescale logo, are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. SMARTMOS is a trademark of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2015 Freescale Semiconductor, Inc. Document Number: MPC17529 Rev. 4.0 10/2015