Plastic Packages for Integrated Circuits Package Outline Drawing W8x8.64 8x8 Array 64 Balls Wafer Level Chip Scale Package Rev 0, 4/14 X 4.025 ± 0.030 Y 0.500 64x 0.320 ± 0.030 H G F 4.025 ± 0.030 E D C B 0.263 A (4X) 0.10 1 2 3 4 5 6 0.250 PIN 1 (A1 CORNER) 7 8 0.263 TOP VIEW BOTTOM VIEW PACKAGE OUTLINE 0.330 0.05 Z Z SEATING PLANE 3 0.500 0.280 0.320 ± 0.030 0.10 M Z X Y 0.05 M Z 0.240 ± 0.030 0.600 ± 0.060mm TYPICAL RECOMMENDED LAND PATTERN SIDE VIEW NOTES: 1. All dimensions are in millimeters. 2. Dimension and tolerance conform to ASMEY14.5-1994. 3. NSMD refers to non-solder mask defined pad design per Intersil Technical Brief http://www.intersil.com/data/tb/tb451.pdf 1