Package Outline Drawing (POD)

Plastic Packages for Integrated Circuits
Package Outline Drawing
W5x5.25E
5X5 ARRAY 25 BALLS WITH 0.40 PITCH WAFER LEVEL CHIP SCALE PACKAGE (With BSC)
Rev 0, 1/14
Y
X
2.070 ± 0.030
25x 0.265 ± 0.035
E
D
1.600
C
2.330 ± 0.030
B
0.400
A
0.365
0.10
1
(4X)
2
3
4
5
0.400
PIN 1 (A1 CORNER)
TOP VIEW
0.235
BOTTOM VIEW
SEATING PLANE
Z
3
0.05 Z
PACKAGE OUTLINE
0.240
0.0400 BSC
(BACK SIDE COATING)
0.400
0.265 ± 0.035
0.10
0.05
0.290
ZXY
Z
3 NSMD
0.200 ± 0.03
TYPICAL RECOMMENDED LAND PATTERN
0.540 ± 0.050
SIDE VIEW
NOTES:
1. All dimensions are in millimeters.
2. Dimension and tolerance per ASMEY 14.5M-1994,
and JESD 95-1 SPP-010.
3. NSMD refers to Non-Solder Mask Defined pad design per
Intersil Tech Brief TB451 located at:
http://www.intersil.com/content/dam/Intersil/documents/
tb45/tb451.pdf
1