Package Outline Drawing (POD)

Plastic Packages for Integrated Circuits
Package Outline Drawing
W11x11.121
121 BALL WAFER LEVEL CHIP SCALE PACKAGE (WLCSP 0.5mm Pitch)
Rev 2, 9/13
5.455±0.030
5.000
X
0.500
Y
121x 0.320±0.030
L
K
J
H
G
5.535±0.030
5.000
F
E
D
C
B
A
(4x)
0.10
1
PIN 1
2
3
4
5
6
7
9
8
10
11
0.2675
0.2275
0.500
TOP VIEW
BOTTOM VIEW
0.05
Z
Z SEATING PLANE
PACKAGE OUTLINE
0.330
0.500
0.320±0.030 121x
0.10 M Z X Y
0.05 M Z
0.280
3 NSMD
TYPICAL RECOMMENDED LAND PATTERN
0.240±0.030
0.600±0.060
SIDE VIEW
NOTES:
1. All dimensions are in millimeters.
2. Dimensions and tolerance per ASMEY 14.5M - 1994 and JESD 95-1, SPP-010.
3. NSMD refers to non-solder mask defined pad design per Intersil Techbrief TB451
1