LT8570/LT8570-1 Boost/SEPIC/Inverting DC/DC Converter with 65V Switch, Soft-Start and Synchronization Features Description 65V Power Switch n Current Limit Options of 0.5A (LT8570) or 0.25A (LT8570-1) n Adjustable Switching Frequency n Single Feedback Resistor Sets V OUT n Synchronizable to External Clock n High Gain SHDN Pin Accepts Slowly Varying Input Signals n Wide Input Voltage Range: 2.55V to 40V n Low V CESAT Switch n Integrated Soft-Start Function n Easily Configurable as a Boost, SEPIC, or Inverting Converter n User Configurable Undervoltage Lockout (UVLO) n Pin Compatible with LT3580 and LT8580 n Tiny Thermally Enhanced 8-Lead 3mm × 3mm DFN and 8-Lead MSOP Packages The LT®8570 and LT8570-1 are PWM DC/DC converters. The LT8570 contains a 0.5A, 65V power switch, while the LT8570-1 contains a 0.25A, 65V power switch. The LT8570 and LT8570-1 can be configured as either a boost, SEPIC or inverting converter. n Applications n n n n n VFD Bias Supplies TFT-LCD Bias Supplies GPS Receivers DSL Modems Local Power Supply The LT8570/LT8570-1 have an adjustable oscillator, set by a resistor from the RT pin to ground. Additionally, the LT8570/LT8570-1 can be synchronized to an external clock. The switching frequency of the part may be free running or synchronized, and can be set between 200kHz and 1.5MHz. The LT8570/LT8570-1 also feature innovative SHDN pin circuitry that allows for slowly varying input signals and an adjustable undervoltage lockout function. Additional features such as frequency foldback and softstart are integrated. The LT8570/LT8570-1 are available in tiny thermally enhanced 3mm × 3mm 8-lead DFN and 8-lead MSOP packages. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 7579816. Typical Application Efficiency and Power Loss 1.5MHz, 5V to 12V Boost Converter 22µH VIN SW SHDN FBX 130k 2.2µF LT8570 1µF SYNC RT VC GND 56.2k 6.19k SS 47pF 0.1µF 100 320 90 280 80 240 70 200 60 160 50 120 40 80 EFFICIENCY POWER LOSS 30 2.2nF 20 8570 TA01a 0 25 50 100 75 LOAD CURRENT (mA) POWER LOSS (mW) 10k EFFICIENCY (%) VIN 5V VOUT 12V 125mA 40 0 125 8570 TA01b 85701f For more information www.linear.com/LT8570 1 LT8570/LT8570-1 Absolute Maximum Ratings (Note 1) VIN Voltage.................................................. –0.3V to 40V SW Voltage................................................. –0.4V to 65V RT Voltage.................................................... –0.3V to 5V SS Voltage................................................. –0.3V to 2.5V FBX Voltage..................................................................5V FBX Current.............................................................–1mA VC Voltage.................................................... –0.3V to 2V SHDN Voltage............................................. –0.3V to 40V SYNC Voltage............................................. –0.3V to 5.5V Operating Junction Temperature Range LT8570E, LT8570-1E (Notes 2, 5)....... –40°C to 125°C LT8570I, LT8570-1I (Notes 2, 5)......... –40°C to 125°C Storage Temperature Range...............–65°C to 150°C Lead Temperature (Soldering, 10 sec) MS8E Package Only........................................... 300°C pIN CONFIGURATION TOP VIEW FBX 1 VC 2 VIN 3 TOP VIEW 8 SYNC 9 GND SW 4 FBX VC VIN SW 7 SS 6 RT 5 SHDN 1 2 3 4 9 GND 8 7 6 5 SYNC SS RT SHDN MS8E PACKAGE 8-LEAD PLASTIC MSOP DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN θJA = 35°C/W TO 40°C/W EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB θJA = 43°C/W EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB order information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT8570EDD#PBF LT8570EDD#TRPBF LGRY 8-Lead (3mm × 3mm) Plastic DFN – 40°C to 125°C LT8570IDD#PBF LT8570IDD#TRPBF LGRY 8-Lead (3mm × 3mm) Plastic DFN – 40°C to 125°C LT8570EMS8E#PBF LT8570EMS8E#TRPBF LTGRZ 8-Lead Plastic MSOP – 40°C to 125°C LT8570IMS8E#PBF LT8570IMS8E#TRPBF LTGRZ 8-Lead Plastic MSOP – 40°C to 125°C LT8570EDD-1#PBF LT8570EDD-1#TRPBF LGSB 8-Lead (3mm × 3mm) Plastic DFN – 40°C to 125°C LT8570IDD-1#PBF LT8570IDD-1#TRPBF LGSB 8-Lead (3mm × 3mm) Plastic DFN – 40°C to 125°C LT8570EMS8E-1#PBF LT8570EMS8E-1#TRPBF LTGSC 8-Lead Plastic MSOP – 40°C to 125°C LT8570IMS8E-1#PBF LT8570IMS8E-1#TRPBF LTGSC 8-Lead Plastic MSOP – 40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 2 85701f For more information www.linear.com/LT8570 LT8570/LT8570-1 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VSHDN = VIN unless otherwise noted. (Note 2) PARAMETER Operating Voltage Range Positive Feedback Voltage Negative Feedback Voltage Positive FBX Pin Bias Current Negative FBX Pin Bias Current CONDITIONS l l l VFBX = Positive Feedback Voltage, Current Into Pin VFBX = Negative Feedback Voltage, Current Out of Pin l l MIN TYP MAX UNITS 2.55 1.185 –3 81 81 1.204 3 83.3 83.3 40 1.220 12 85 86 V V mV µA µA Error Amplifier Transconductance 200 Error Amplifier Voltage Gain Quiescent Current Quiescent Current in Shutdown Reference Line Regulation Switching Frequency, fOSC 60 1.2 0 0.01 1.5 200 1/6 Switching Frequency in Foldback Switching Frequency Set Range SYNC High Level for Synchronization SYNC Low Level for Synchronization SYNC Clock Pulse Duty Cycle Recommended Minimum SYNC Ratio fSYNC/fOSC Minimum Off-Time Minimum On-Time Switch Current Limit Switch VCESAT Switch Leakage Current Soft-Start Charging Current SHDN Minimum Input Voltage High SHDN Minimum Input Voltage Hysteresis SHDN Input Voltage Low SHDN Pin Bias Current VSHDN = 2.5V, Not Switching VSHDN = 0V 2.55V ≤ VIN ≤ 40V RT = 56.2k RT = 422k Compared to Normal fOSC SYNCing or Free Running l l 1.23 165 l 200 1.3 l 1.7 1 0.05 1.77 235 1500 0.4 65 l VSYNC = 0V to 2V µmhos 35 V/V mA µA %/V MHz kHz Ratio kHz V V % 3/4 Minimum Duty Cycle (Note 3), LT8570 Maximum Duty Cycle (Notes 3, 4), LT8570, fOSC = 1.5MHz Maximum Duty Cycle (Notes 3, 4), LT8570, fOSC = 200kHz Minimum Duty Cycle (Note 3), LT8570-1 Maximum Duty Cycle (Notes 3, 4), LT8570-1, fOSC = 1.5MHz Maximum Duty Cycle (Notes 3, 4), LT8570-1, fOSC = 200kHz ISW = 0.4A (LT8570) ISW = 0.2A (LT8570-1) VSW = 5V VSS = 0.5V Active Mode, SHDN Rising Active Mode, SHDN Falling l l l Shutdown Mode VSHDN = 3V VSHDN = 1.3V VSHDN = 0V l Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT8570E/LT8570-1E are guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT8570I/LT8570-1I are guaranteed over the full –40°C to 125°C operating l l l l l l 0.6 0.27 0.15 0.3 0.15 0.075 4 1.23 1.21 9 100 100 0.75 0.5 0.4 0.375 0.25 0.2 250 250 0.01 6 1.31 1.27 40 44 12 0 1 0.85 0.8 0.5 0.43 0.4 1 8 1.4 1.33 0.3 56 15 0.1 ns ns A A A A A A mV mV µA µA V V mV V µA µA µA junction temperature range. Operating lifetime is derated at junction temperatures greater than 125°C. Note 3: Current limit guaranteed by design and/or correlation to static test. Note 4: Current limit measured at equivalent of listed switching frequency. Note 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. 85701f For more information www.linear.com/LT8570 3 LT8570/LT8570-1 Typical Performance Characteristics Switch Current Limit vs Duty Cycle 700 LT8570, 1.5MHz LT8570, 200kHz 0.25 0 20 30 500 400 300 200 0.4 0.2 40 50 60 70 DUTY CYCLE (%) 80 90 0 0 0.8 0.2 0.4 0.6 SWITCH CURRENT (A) 0.0 0 Switch Current Limit vs Temperature 1.215 25 0.8 1.210 20 1.205 15 1.200 10 POSITIVE FBX VOLTAGE (V) 30 0.6 0.4 LT8570 LT8570-1 1.195 5 1.190 0 1.185 –5 1.180 –10 1.175 –15 1.170 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) 0 –20 25 50 75 100 125 150 TEMPERATURE (°C) 8570 G04 8570 G05 Positive and Negative FBX Current at Output Voltage Regulation Oscillator Frequency 85 85 84 84 83 83 82 82 81 81 0 80 25 50 75 100 125 150 TEMPERATURE (°C) 1.8 RT = 56.2k 1.6 1.4 FREQUENCY (MHz) 86 NEGATIVE FBX CURRENT OUT OF PIN (µA) 86 80 –50 –25 1.2 NEGATIVE FBX VOLTAGE (mV) 1.220 0 1 8570 G03 1.0 0.0 –50 –25 POSITIVE FBX CURRENT INTO PIN (µA) 0.4 0.6 0.8 SS VOLTAGE (V) Positive and Negative Output Voltage Regulation 0.2 1.2 1.0 0.8 0.6 0.4 RT = 422k 0.2 0 –50 –25 8570 G06 4 0.2 8570 G02 8570 G01 SWITCH CURRENT (A) 0.6 100 LT8570-1, 1.5MHz LT8570-1, 200kHz 10 LT8570 LT8570-1 0.8 SWITCH CURRENT (A) 0.50 1.0 LT8570 LT8570-1 600 0.75 Maximum Switch Current vs SS Switch Saturation Voltage SATURATION VOLTAGE (mV) SWITCH CURRENT (A) 1.00 TA = 25°C, unless otherwise specified 0 25 50 75 100 125 150 TEMPERATURE (°C) 8570 G07 85701f For more information www.linear.com/LT8570 LT8570/LT8570-1 Typical Performance Characteristics Internal UVLO 1/2 0 INVERTING CONFIGURATIONS 0 0.2 1 2.6 25 2.5 2.4 2.3 2.2 NONINVERTING CONFIGURATIONS 0.4 0.6 0.8 FBX VOLTAGE (V) 30 2.1 –50 –25 1.2 0 200 150 100 1.34 1.32 SHDN RISING 1.30 1.28 1.26 SHDN FALLING 10 15 20 25 30 35 40 SHDN VOLTAGE (V) 8570 G11 1.20 –50 –25 200 RECOMMENDED MINIMUM ON-TIME 160 120 80 MEASURED MINIMUM ON-TIME 40 1.22 5 2 240 1.24 50 0.25 0.5 0.75 1 1.25 1.5 1.75 SHDN VOLTAGE (V) Minimum On-Time vs Temperature 1.36 250 0 280 1.38 SHDN VOLTAGE (V) SHDN PIN CURRENT (µA) Active/Lockout Threshold 125°C 25°C –40°C 0 10 8570 G10 1.40 300 0 15 8570 G09 SHDN Pin Current 350 20 0 25 50 75 100 125 150 TEMPERATURE (°C) 8570 G08 400 125°C 25°C –40°C 5 MINIMUM ON TIME (ns) 1/3 1/4 1/5 1/6 SHDN Pin Current 2.7 SHDN PIN CURRENT (µA) 1 VIN VOLTAGE (V) NORMALIZED OSCILLATOR FREQUENCY (F/FNOM) Oscillator Frequency During Soft-Start TA = 25°C, unless otherwise specified 0 25 50 75 100 125 150 TEMPERATURE (°C) 8570 G12 0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 8570 G13 85701f For more information www.linear.com/LT8570 5 LT8570/LT8570-1 Pin Functions FBX (Pin 1): Positive and Negative Feedback Pin. For a noninverting or inverting converter, tie a resistor from the FBX pin to VOUT according to the following equations: RFBX = ( VOUT − 1.204V ) ; Noninverting Converter RFBX = ( VOUT + 3mV ) ; Inverting Converter 83.3µA 83.3µA VC (Pin 2): Error Amplifier Output Pin. Tie external compensation network to this pin. VIN (Pin 3): Input Supply Pin. Must be locally bypassed. SW (Pin 4): Switch Pin. This is the collector of the internal NPN Power switch. Minimize the metal trace area connec ted to this pin to minimize EMI. RT (Pin 6): Timing Resistor Pin. Adjusts the switching frequency. Place a resistor from this pin to ground to set the frequency to a fixed free running level. Do not float this pin. SS (Pin 7): Soft-Start Pin. Place a soft-start capacitor here. Upon start-up, the SS pin will be charged by a (nominally) 280k resistor to about 2.1V. SYNC (Pin 8): To synchronize the switching frequency to an outside clock, simply drive this pin with a clock. The high voltage level of the clock needs to exceed 1.3V, and the low level should be less 0.4V. Drive this pin to less than 0.4V to revert to the internal free-running clock. See the Applications Information section for more information. GND (Exposed Pad Pin 9): Ground. Exposed pad must be soldered directly to local ground plane. SHDN (Pin 5): Shutdown Pin. In conjunction with the UVLO (undervoltage lockout) circuit, this pin is used to enable/disable the chip and restart the soft-start sequence. Drive below 1.21V to disable the chip. Drive above 1.40V to activate the chip and restart the soft-start sequence. Do not float this pin. 6 85701f For more information www.linear.com/LT8570 LT8570/LT8570-1 Block Diagram RC VIN CSS 7 50k SHDN 5 1.3V – + 3 VC L1 SR2 Q ILIMIT COMPARATOR – Q2 A3 + R 4 SR1 S DRIVER + ∑ A1 A4 – – SLOPE COMPENSATION FBX + 1 14.5k VOUT C1 Q1 Q + 14.5k D1 SW VC SOFTSTART S 1.204V REFERENCE CIN 280k R VIN 2 SS DISCHARGE DETECT UVLO CC A2 FREQUENCY FOLDBACK RFBX 0.04Ω (LT8570) 0.08Ω (LT8570-1) GND 9 ÷N ADJUSTABLE OSCILLATOR – SYNC BLOCK SYNC 8 6 RT RT 8570 BD 85701f For more information www.linear.com/LT8570 7 LT8570/LT8570-1 Operation The LT8570/LT8570-1 use a constant-frequency, current mode control scheme to provide excellent line and load regulation. Refer to the Block Diagram for the following description of the part’s operation. At the start of each oscillator cycle, the SR latch (SR1) is set, which turns on the power switch, Q1. The switch current flows through the internal current sense resistor, generating a voltage proportional to the switch current. This voltage (amplified by A4) is added to a stabilizing ramp and the resulting sum is fed into the positive terminal of the PWM comparator A3. When this voltage exceeds the level at the negative input of A3, the SR latch is reset, turning off the power switch. The level at the negative input of A3 (VC pin) is set by the error amplifier A1 (or A2) and is simply an amplified version of the difference between the feedback voltage (FBX pin) and the reference voltage (1.204V or 3mV, depending on the configuration). In this manner, the error amplifier sets the correct peak current level to keep the output in regulation. The LT8570/LT8570-1 have an FBX pin architecture that can be used for either noninverting or inverting configurations. When configured as a noninverting converter, the FBX pin is pulled up to the internal bias voltage of 1.204V by the RFBX resistor connected from VOUT to FBX. Amplifier A2 becomes inactive and amplifier A1 performs the inverting amplification from FBX to VC. When the LT8570/LT8570-1 are in an inverting configuration, the FBX pin is pulled VIN > VOUT OR VIN = VOUT OR VIN < VOUT • + VIN C2 L1 D1 VOUT SW SHUTDOWN FBX RT GND SYNC RT • SHDN SS SEPIC Topology As shown in Figure 1, the LT8570/LT8570-1 can be configured as a SEPIC (single-ended primary inductance converter). This topology allows for the input to be higher, equal, or lower than the desired output voltage. Output disconnect is inherently built into the SEPIC topology, meaning no DC path exists between the input and output. This is useful for applications requiring the output to be disconnected from the input source when the circuit is in shutdown. Inverting Topology The LT8570/LT8570-1 can also work in a dual inductor inverting topology, as shown in Figure 2. The part’s unique feedback pin allows for the inverting topology to be built by simply changing the connection of external components. This solution results in very low output voltage ripple due to the inductor L2 in series with the output. Abrupt changes in output capacitor current are eliminated because the output inductor delivers current to the output during both the off-time and the on-time of the LT8570/LT8570-1 switch. • VIN L2 LT8570/LT8570-1 C1 down to 3mV by the RFBX resistor connected from VOUT to FBX. Amplifier A1 becomes inactive and amplifier A2 performs the noninverting amplification from FBX to VC. + R1 VIN + C3 RT CC 8570 F01 Figure 1. SEPIC Topology Allows for the Input to Span the Output Voltage. Coupled or Uncoupled Inductors Can Be Used. Follow Noted Phasing if Coupled 8 SW SHDN FBX RT GND SYNC RC CSS L2 SS • R1 VC + RC CSS VOUT D1 LT8570/LT8570-1 C1 SHUTDOWN VC C2 L1 C3 CC 8570 F02 Figure 2. Dual Inductor Inverting Topology Results in Low Output Ripple. Coupled or Uncoupled Inductors Can Be Used. Follow Noted Phasing if Coupled 85701f For more information www.linear.com/LT8570 LT8570/LT8570-1 Operation Start-Up Operation Several functions are provided to enable a very clean start-up for the LT8570/LT8570-1. • First, the SHDN pin voltage is monitored by an internal voltage reference to give a precise turn-on voltage level. An external resistor (or resistor divider) can be connected from the input power supply to the SHDN pin to provide a user-programmable undervoltage lockout function. • Second, the soft-start circuitry provides for a gradual ramp-up of the switch current. When the part is brought out of shutdown, the external SS capacitor is first discharged (providing protection against SHDN pin glitches and slow ramping), then an integrated 280k resistor pulls the SS pin up to ~2.1V. By connecting an external capacitor to the SS pin, the voltage ramp rate on the pin can be set. Typical values for the soft-start capacitor range from 100nF to 1µF. • Finally, the frequency foldback circuit reduces the switching frequency when the FBX pin is in a nominal range of 300mV to 920mV. This feature reduces the minimum duty cycle that the part can achieve thus allowing better control of the switch current during start-up. When the FBX voltage is pulled outside of this range, the switching frequency returns to normal. Current Limit and Thermal Shutdown Operation The LT8570/LT8570-1 have a current limit circuit not shown in the Block Diagram. The switch current is constantly monitored and not allowed to exceed the maximum switch current at a given duty cycle (see the Electrical Characteristics table). If the switch current reaches this value, the SR latch (SR1) is reset regardless of the state of the comparator (A1/A2). Also, not shown in the Block Diagram is the thermal shutdown circuit. If the temperature of the part exceeds approximately 165°C, the SR2 latch is set regardless of the state of the amplifier (A1/A2). When the part temperature falls below approximately 160°C, a full soft-start cycle will then be initiated. The current limit and thermal shutdown circuits protect the power switch as well as the external components connected to the LT8570/LT8570-1. 85701f For more information www.linear.com/LT8570 9 LT8570/LT8570-1 Applications Information Setting Output Voltage The output voltage is set by connecting a resistor (RFBX) from VOUT to the FBX pin. RFBX is determined from the following equation: RFBX = |VOUT − VFBX | 83.3µA where VFBX is 1.204V (typical) for noninverting topologies (i.e., boost and SEPIC regulators) and 3mV (typical) for inverting topologies (see the Electrical Characteristics). Power Switch Duty Cycle In order to maintain loop stability and deliver adequate current to the load, the power NPN (Q1 in the Block Diagram) cannot remain “on” for 100% of each clock cycle. The maximum allowable duty cycle is given by: DCMAX = (TP − Min Off Time) • 100% TP where TP is the clock period and Min Off Time (found in the Electrical Characteristics) is typically 100ns. The application should be designed so that the operating duty cycle does not exceed DCMAX. The minimum allowable duty cycle is given by: Min On Time •100% TP where TP is the clock period and Min On-Time is as shown in the Typical Performance Characteristics. DCMIN = The application should be designed so that the operating duty cycle is at least DCMIN. Duty cycle equations for several common topologies are given below, where VD is the diode forward voltage drop and VCESAT is typically 250mV at 0.4A for the LT8570 and 250mV at 0.2A for the LT8570-1. For the boost topology: VOUT − VIN + VD DC ≅ VOUT + VD − VCESAT 10 For the SEPIC or dual inductor inverting topology (see Figure 1 and Figure 2): VD + |VOUT | DC ≅ VIN + |VOUT | + VD − VCESAT The LT8570/LT8570-1 can be used in configurations where the duty cycle is higher than DCMAX, but it must be operated in the discontinuous conduction mode so that the effective duty cycle is reduced. Inductor Selection General Guidelines: The high frequency operation of the LT8570/LT8570-1 allows for the use of small surface mount inductors. For high efficiency, choose inductors with high frequency core material, such as ferrite, to reduce core losses. To improve efficiency, choose inductors with more volume for a given inductance. The inductor should have low DCR (copper wire resistance) to reduce I2R losses, and must be able to handle the peak inductor current without saturating. Note that in some applications, the current handling requirements of the inductor can be lower, such as in the SEPIC topology, where each inductor only carries a fraction of the total switch current. Multilayer or chip inductors usually do not have enough core area to support peak inductor currents in the 0.25A to 1A range. To minimize radiated noise, use a toroidal or shielded inductor. Note that the inductance of shielded types will drop more as current increases, and will saturate more easily. See Table 1 for a list of inductor manufacturers. Thorough lab evaluation is recommended to verify that the following guidelines properly suit the final application. Table 1. Inductor Manufacturers Coilcraft LPS5030, MSS7341, LPS4018, LPD6235 and LPD5030 Series www.coilcraft.com Coiltronics DR, DRQ, SD and SDQ Series www.coiltronics.com Sumida CDRH8D58/LD, CDRH64B, and CDRH70D430MN Series www.sumida.com Würth WE-PD, WE-DD, WE-TPC, WE-LHMI and WE-LQS Series www.we-online.com Minimum Inductance : Although there can be a trade-off with efficiency, it is often desirable to minimize board space by choosing smaller inductors. When choosing an inductor, there are two conditions that limit the minimum inductance: (1) providing adequate load current, 85701f For more information www.linear.com/LT8570 LT8570/LT8570-1 Applications Information and (2) avoiding subharmonic oscillation. Choose an inductance that is high enough to meet both of these requirements. Adequate Load Current : Small value inductors result in increased ripple currents and thus, due to the limited peak switch current, decrease the average current that can be provided to a load (IOUT). In order to provide adequate load current, L should be at least: is greater than 50%, provided that the inductance exceeds a minimum value. In applications that operate with duty cycles greater than 50%, the inductance must be at least: VIN 2 i DC − 1 i kSC • (DC − 300ns • f) • f 1− DC LMIN = L1 for boost topologies (see Figure 15) LMIN = L1 = L2 for coupled dual inductor topologies (see Figure 16 and Figure 17) DC • VIN LBOOST > ⎛ |V | • I ⎞ 2 • f • ⎜ ILIM − OUT OUT ⎟ VIN • η ⎠ ⎝ LMIN = L1||L2 for uncoupled dual inductor topologies (see Figure 16 and Figure 17) kSC = 0.6 for LT8570 and 0.3 for LT8570-1 for boost, topologies, or: LDUAL > LMIN > DC • VIN ⎛ ⎞ V •I 2 • f • ⎜ ILIM− OUT OUT − IOUT ⎟ VIN • η ⎝ ⎠ for the SEPIC and inverting topologies. Maximum Inductance: Excessive inductance can reduce current ripple to levels that are difficult for the current comparator (A3 in the Block Diagram) to cleanly discriminate, thus causing duty cycle jitter and/or poor regulation. The maximum inductance can be calculated by: where: LMAX = LBOOST = L1 for boost topologies (see Figure 15) LDUAL = L1 = L2 for coupled dual inductor topologies (see Figure 16 and Figure 17) where VIN − VCESAT DC • IMIN-RIPPLE f LMIN = L1 for boost topologies (see Figure 15) LDUAL = L1||L2 for uncoupled dual inductor topologies (see Figure 16 and Figure 17) LMIN = L1 = L2 for coupled dual inductor topologies (see Figure 16 and Figure 17) DC = switch duty cycle (see previous section) LMIN = L1||L2 for uncoupled dual inductor topologies (see Figure 16 and Figure 17) ILIM = switch current limit, typically about 0.6A for LT8570 and 0.3A for LT8570-1 at 50% duty cycle (see the Typical Performance Characteristics section). h = power conversion efficiency (typically 85% for boost and 83% for dual inductor topologies at high currents). f = switching frequency IOUT = maximum load current Negative values of L indicate that the output load current IOUT exceeds the switch current limit capability of the LT8570/LT8570-1. Avoiding Subharmonic Oscillations : The LT8570/ LT8570-1’s internal slope compensation circuit can prevent subharmonic oscillations that can occur when the duty cycle IMIN-RIPPLE = typically 40mA for LT8570 and 20mA for LT8570-1 Current Rating: Finally, the inductor(s) must have a rating greater than its peak operating current to prevent inductor saturation resulting in efficiency loss. In steady state, the peak input inductor current (continuous conduction mode only) is given by: IL1-PEAK = |VOUT • IOUT | VIN • DC + VIN • η 2 • L1• f for the boost, SEPIC and dual inductor inverting topologies. 85701f For more information www.linear.com/LT8570 11 LT8570/LT8570-1 Applications Information For uncoupled dual inductor topologies, the peak output inductor current is given by: V • (1− DC) + OUT 2 • L2 • f IL2-PEAK = IOUT For the coupled inductor topologies: IL2-PEAK = IOUT ⎡ ⎢VOUT⎪⎤ VIN • DC ⎢1+ ⎥+ η • VIN ⎦ 2 • L • f ⎣ Note: Inductor current can be higher during load transients. It can also be higher during start-up if inadequate soft-start capacitance is used. Capacitor Selection Low ESR (equivalent series resistance) capacitors should be used at the output to minimize the output ripple voltage. Multilayer ceramic capacitors are an excellent choice, as they have an extremely low ESR and are available in very small packages. X5R or X7R dielectrics are preferred, as these materials retain their capacitance over wider voltage and temperature ranges. For LT8570, a 0.22µF to 4.7µF and for LT8570-1, a 0.1µF to 2.2µF output capacitor is sufficient for most applications. Always use a capacitor with a sufficient voltage rating. Although many ceramic capacitors have greatly reduced capacitance at the desired output voltage, ceramic capacitors with larger case sizes are less sensitive to applied voltage. Solid tantalum or OS-CON capacitors can be used, but they will occupy more board area than a ceramic and will have a higher ESR with greater output ripple. Ceramic capacitors also make a good choice for the input decoupling capacitor, which should be placed as closely as possible to the VIN pin of the LT8570/LT8570-1 as well as to the inductor connected to the input of the power path. If it is not possible to optimally place a single input capacitor, then use one at the VIN pin of the chip (CVIN) and one at the VIN side of the inductor (CPWR). See equations in Table 4, Table 5 and Table 6 for sizing information. For LT8570, a 0.47µF to 1µF and for LT8570-1, a 0.22µF to 0.47µF input capacitor is sufficient for most applications. Table 2. Ceramic Capacitor Manufacturers Kemet www.kemet.com Murata www.murata.com Taiyo Yuden www.t-yuden.com TDK www.tdk.com Compensation—Adjustment To compensate the feedback loop of the LT8570/LT8570-1, a series resistor-capacitor network in parallel with a single capacitor should be connected from the VC pin to GND. For most applications, the series capacitor should be in the range of 470pF to 2.2nF with 1nF being a good starting value. The parallel capacitor should range in value from 10pF to 100pF with 47pF a good starting value. The compensation resistor, RC , is usually in the range of 5k to 50k. A good technique to compensate a new application is to use a 100kΩ potentiometer in place of series resistor RC. With the series capacitor and parallel capacitor at 1nF and 47pF respectively, adjust the potentiometer while observing the transient response and the optimum value for RC can be found. Figure 3 (3a to 3c) illustrates this process for the circuit of Figure 4 with a load current stepped between 30mA and 90mA. Figure 3a shows the transient response with RC equal to 1.04k. The phase margin is poor, as evidenced by the excessive ringing in the output voltage and inductor current. In Figure 3b, the value of RC is increased to 2.09k, which results in a more damped response. Figure 3c shows the results when RC is increased further to 6.19k. The transient response is nicely damped and the compensation procedure is complete. Compensation—Theory Like all other current mode switching regulators, the LT8570/LT8570-1 need to be compesated for stable and efficient operation. Two feedback loops are used in the LT8570/LT8570-1 — a fast current loop which does not require compensation, and a slower voltage loop which does. Standard bode plot analysis can be used to understand and adjust the voltage feedback loop. Table 2 shows a list of several ceramic capacitor manufacturers. Consult the manufacturers for detailed information on their entire selection of ceramic parts. 12 85701f For more information www.linear.com/LT8570 LT8570/LT8570-1 Applications Information VOUT 500mV/DIV AC-COUPLED VOUT 500mV/DIV AC-COUPLED ISTEP 50mA/DIV ISTEP 50mA/DIV IL1 100mA/DIV IL1 100mA/DIV RC = 1.04k 50µs/DIV RC = 2.09k 8570 F03a (3a) Transient Response Shows Excessive Ringing 50µs/DIV 8570 F03b (3b) Transient Response Is Better VOUT 500mV/DIV AC-COUPLED ISTEP 50mA/DIV IL1 100mA/DIV RC = 6.19k 50µs/DIV 8570 F03c (3c) Transient Response Is Well Damped Figure 3. Transient Response D1 22µH VIN 5V VOUT 12V 125mA 10k VIN CIN 1µF SW SHDN FBX RFBX 130k COUT 2.2µF LT8570 SYNC RT VC GND RT 56.2k RC 6.19k SS CSS 0.1µF CC 2.2nF CF 47pF 8570 F04 Figure 4. 1.5MHz, 5V to 12V Boost Converter 85701f For more information www.linear.com/LT8570 13 LT8570/LT8570-1 Applications Information As with any feedback loop, identifying the gain and phase contribution of the various elements in the loop is critical. Figure 5 shows the key equivalent elements of a boost converter. Because of the fast current control loop, the power stage of the IC, inductor and diode have been replaced by a combination of the equivalent transconductance amplifier gmp and the current controlled current source which converts IVIN to (ηVIN/VOUT) • IVIN. gmp acts as a current source where the peak input current, IVIN, is proportional to the VC voltage. η is the efficiency of the switching regulator, and is typically about 85%. From Figure 5, the DC gain, poles and zeros can be calculated as follows: DC Gain: (Breaking Loop at FBX Pin) ADC = AOL (0) = ⎛ (gma • R0 ) • gmp • ⎜ η • VVIN ⎝ Note that the maximum output currents of gmp and gma are finite. The limits for gmp are in the Electrical Characteristics section (switch current limit), and gma is nominally limited to about +15µA and –17µA. Output Pole: P1= – + gmp RC CC RESR η • VIN •IVIN CPL VOUT VC CF VOUT IVIN RO + gma 1.204V REFERENCE R2 – ∂VC ∂IVIN ∂VOUT ∂VFBX • • • = ∂VFBX ∂VC ∂IVIN ∂VOUT RL 2 2 • π • RL • COUT 1 2 • π • ⎡⎣RO + RC ⎤⎦ • CC Error Amp Zero: Z1= 1 2 • π • RC • CC R1 FBX RHP Zero: Z3 = 8570 F05 1 2 • π • RESR • COUT VIN2 • RL 2 • π • VOUT2 • L R2 High Frequency Pole: P3 > CC: COMPENSATION CAPACITOR COUT: OUTPUT CAPACITOR CPL: PHASE LEAD CAPACITOR CF: HIGH FREQUENCY FILTER CAPACITOR gma: TRANSCONDUCTANCE AMPLIFIER INSIDE IC gmp: POWER STAGE TRANSCONDUCTANCE AMPLIFIER RC: COMPENSATION RESISTOR RL: OUTPUT RESISTANCE DEFINED AS VOUT DIVIDED BY ILOAD(MAX) RO: OUTPUT RESISTANCE OF gma R1, R2: FEEDBACK RESISTOR DIVIDER NETWORK RESR: OUTPUT CAPACITOR ESR η: CONVERTER EFFICIENCY (~85% AT HIGHER CURRENTS) Phase Lead Zero: Z4 = Phase Lead Pole: P4 = Figure 5. Boost Converter Equivalent Model RL ⎞ 0.5R2 • ⎟ 2 ⎠ R1+ 0.5R2 Error Amp Pole: P2 = ESR Zero: Z2 = COUT OUT • fS 3 1 2 • π • R1• CPL 1 R2 2 •C 2•π• R2 PL R1+ 2 R1• Error Amp Filter Pole: P5 = C 1 , CF < C R •R 10 2 • π • C O • CF RC + RO 14 85701f For more information www.linear.com/LT8570 LT8570/LT8570-1 Applications Information The current mode zero (Z3) is a right-half plane zero which can be an issue in feedback control design, but is manageable with proper external component selection. Using the circuit in Figure 4 as an example, Table 3 shows the parameters used to generate the bode plot shown in Figure 6. 140 0 120 –45 PHASE –90 80 –135 60 40 –180 45° AT 17kHz –225 GAIN PHASE (DEG) GAIN (dB) 100 In Figure 6, the phase is –135° when the gain reaches 0dB giving a phase margin of 45°. The crossover frequency is 17kHz, which is more than three times lower than the frequency of the RHP zero to achieve adequate phase margin. Diode Selection Schottky diodes, with their low forward-voltage drops and fast switching speeds, are recommended for use with the LT8570/LT8570-1. For applications where VR (see Tables 4, 5 and 6) < 40V, the Diodes, Inc. PD3S140 is a good choice. Where VR > 40V, the Diodes Inc. DFLS1100 works well. These diodes are rated to handle an average forward current of 1A. 20 –270 Oscillator 0 –315 The operating frequency of the LT8570/LT8570-1 can be set by the internal free-running oscillator. When the SYNC pin is driven low (< 0.4V), the frequency of operation is set by a resistor from RT to ground. An internally trimmed timing capacitor resides inside the IC. The oscillator frequency is calculated using the following formula: –20 10 100 1k 10k FREQUENCY (Hz) 100k –360 1M 8570 F06 Figure 6. Bode Plot for Example Boost Converter Table 3. Bode Plot Parameters PARAMETER VALUE UNITS COMMENT RL 96 W Application Specific COUT 2.2 µF Application Specific RESR 10 mW Application Specific RO 300 kW Not Adjustable CC 2200 pF Adjustable CF 47 pF Optional/Adjustable CPL 0 pF Optional/Adjustable RC 6.19 kW Adjustable R1 130 kW Adjustable R2 14.5 kW Not Adjustable VOUT 12 V Application Specific VIN 5 V Application Specific gma 200 µmho Not Adjustable gmp 7 mho Not Adjustable L 22 µH Application Specific fS 1.5 MHz Adjustable fOSC = 85.5 (RT + 1) where fOSC is in MHz and RT is in kΩ. Conversely, RT (in kΩ) can be calculated from the desired frequency (in MHz) using: RT = 85.5 −1 fOSC Clock Synchronization The operating frequency of the LT8570/LT8570-1 can be synchronized to an external clock source. To synchronize to the external source, simply provide a digital clock signal into the SYNC pin. The LT8570/LT8570-1 will operate at the SYNC clock frequency. The LT8570/LT8570-1 will revert to the internal free-running oscillator clock after SYNC is driven low for a few free-running clock periods. 85701f For more information www.linear.com/LT8570 15 LT8570/LT8570-1 Applications Information Driving SYNC high for an extended period of time effectively stops the operating clock and prevents latch SR1 from becoming set (see the Block Diagram). As a result, the switching operation of the LT8570/LT8570-1 will stop. The duty cycle of the SYNC signal must be between 35% and 65% for proper operation. Also, the frequency of the SYNC signal must meet the following two criteria: (1) SYNC may not toggle outside the frequency range of 200kHz to 1.5MHz unless it is stopped low to enable the free-running oscillator. (2) The SYNC frequency can always be higher than the free-running oscillator frequency, fOSC , but should not be less than 25% below fOSC . Operating Frequency Selection There are several considerations in selecting the operating frequency of the converter. The first is staying clear of sensitive frequency bands, which cannot tolerate any spectral noise. For example, in products incorporating RF communications, the 455kHz IF frequency is sensitive to any noise, therefore switching above 600kHz is desired. Some communications have sensitivity to 1.1MHz, and in that case, a 1.5MHz switching converter frequency may be employed. The second consideration is the physical size of the converter. As the operating frequency goes up, the inductor and filter capacitors go down in value and size. The trade-off is efficiency, since the switching losses due to NPN base charge (see Thermal Calculations), Schottky diode charge, and other capacitive loss terms increase proportionally with frequency. This capacitor is slowly charged to ~2.1V by an internal 280k resistor once the part is activated. SS pin voltages below ~1.1V reduce the internal current limit. Thus, the gradual ramping of the SS voltage also gradually increases the current limit as the capacitor charges. This, in turn, allows the output capacitor to charge gradually toward its final value while limiting the start-up current. In the event of a commanded shutdown or lockout (SHDN pin), internal undervoltage lockout (UVLO) or a thermal lockout, the soft-start capacitor is automatically discharged to ~200mV before charging resumes, thus assuring that the soft-start occurs after every reactivation of the chip. Shutdown The SHDN pin is used to enable or disable the chip. For most applications, SHDN can be driven by a digital logic source. Voltages above 1.4V enable normal active operation. Voltages below 300mV will shutdown the chip, resulting in extremely low quiescent current. While the SHDN voltage transitions through the lockout voltage range (0.3V to 1.21V) the power switch is disabled and the SR2 latch is set (see the Block Diagram). This causes the soft-start capacitor to begin discharging, which continues until the capacitor is discharged and active operation is enabled. Although the power switch is disabled, SHDN voltages in the lockout range do not necessarily reduce quiescent current until the SHDN voltage is near or below the shutdown threshold. Also note that SHDN can be driven above VIN or VOUT as long as the SHDN voltage is limited to less than 40V. Soft-Start The start-up current can be limited by connecting an external capacitor (typically 100nF to 1µF) to the SS pin. 16 ACTIVE (NORMAL OPERATION) 1.40V (HYSTERESIS AND TOLERANCE) 1.21V SHDN (V) The LT8570/LT8570-1 contain a soft-start circuit to limit peak switch currents during start-up. High start-up current is inherent in switching regulators in general since the feedback loop is saturated due to VOUT being far from its final value. The regulator tries to charge the output capacitor as quickly as possible, which results in large peak currents. LOCKOUT (POWER SWITCH OFF, SS CAPACITOR DISCHARGED) 0.3V SHUTDOWN (LOW QUIESCENT CURRENT) 0.0V 8570 F07 Figure 7. Chip States vs SHDN Voltage 85701f For more information www.linear.com/LT8570 LT8570/LT8570-1 Applications Information Configurable Undervoltage Lockout Figure 8 shows how to configure an undervoltage lockout (UVLO) for the LT8570/LT8570-1. Typically, UVLO is used in situations where the input supply is current-limited, has a relatively high source resistance, or ramps up/down slowly. A switching regulator draws constant power from the source, so source current increases as source voltage drops. This looks like a negative resistance load to the source and can cause the source to current-limit or latch low under low source voltage conditions. UVLO prevents the regulator from operating at source voltages where these problems might occur. The shutdown pin comparator has voltage hysteresis with typical thresholds of 1.31V (rising) and 1.27V (falling). Resistor RUVLO2 is optional. RUVLO2 can be included to reduce the overall UVLO voltage variation caused by variations in SHDN pin current (see the Electrical Characteristics). A good choice for RUVLO2 is ≤10k ±1%. After choosing a value for RUVLO2 , RUVLO1 can be determined from either of the following: RUVLO1 = VIN+ − 1.31V ⎛ 1.31V ⎞ ⎜⎝ R ⎟ + 12µA UVLO2 ⎠ RUVLO1 = 3.5V − 1.27V = 187k ⎛ 1.27V ⎞ ⎜⎝ ⎟ + 12µA ∞ ⎠ To activate the LT8570/LT8570-1 for VIN voltages greater than 4.5V using the double resistor configuration, choose RUVLO2 = 10k and: RUVLO1 = 4.5V − 1.31V = 22.1k ⎛ 1.31V ⎞ ⎜⎝ ⎟ + 12µA 10k ⎠ Internal Undervoltage Lockout The LT8570/LT8570-1 monitor the VIN supply voltage in case VIN drops below a minimum operating level (typically about 2.35V). When VIN is detected low, the power switch is deactivated, and while sufficient VIN voltage persists, the soft-start capacitor is discharged. After VIN is detected high, the power switch will be reactivated and the soft-start capacitor will begin charging. Thermal Considerations or RUVLO1 = For example, to disable the LT8570/LT8570-1 for VIN voltages below 3.5V using the single resistor configuration, choose: − VIN − 1.27V ⎛ 1.27V ⎞ ⎜⎝ R ⎟ + 12µA UVLO2 ⎠ where VIN+ and VIN– are the VIN voltages when rising or falling, respectively. For the LT8570/LT8570-1 to deliver their full output power, it is imperative that a good thermal path be provided to dissipate the heat generated within the package. This is accomplished by taking advantage of the thermal pad on the underside of the IC. It is recommended that multiple vias in the printed circuit board be used to conduct heat away from the IC and into a copper plane with as much area as possible. VIN VIN 1.3V RUVLO1 SHDN – ACTIVE/ LOCKOUT + 12µA AT 1.3V RUVLO2 (OPTIONAL) GND 8570 F08 Figure 8. Configurable UVLO 85701f For more information www.linear.com/LT8570 17 LT8570/LT8570-1 Applications Information Thermal Lockout PSW = 32mW If the die temperature reaches approximately 165°C, the part will go into thermal lockout, the power switch will be turned off and the soft-start capacitor will be discharged. The part will be enabled again when the die temperature has dropped by ~5°C (nominal). PBAC = 85mW Thermal Calculations Power dissipation in the LT8570/LT8570-1 chip comes from four primary sources: switch I2R loss, NPN base drive (AC), NPN base drive (DC), and additional input current. The following formulas can be used to approximate the power losses. These formulas assume continuous mode operation, so they should not be used for calculating efficiency in discontinuous mode or at light load currents. Average Input Current: IIN = VOUT • IOUT VIN • η Switch Conduction Loss: PSW = (DC)(IIN )(VSW ) Base Drive Loss (AC): PBAC = 20ns(IIN )(VOUT )(f) Base Drive Loss (DC): PBDC = (VIN )(IIN )(DC) 40 Input Power Loss: PINP = 4.5mA (VIN ) where: VSW = switch on voltage (see Typical Performance Characteristics for Switch Saturation Voltage) DC = duty cycle (see the Power Switch Duty Cycle section for formulas) h = power conversion efficiency (typically 85% at high currents) Example: LT8570 in boost configuration, VIN = 5V, VOUT = 12V, IOUT = 0.1A, f = 1.25MHz, VD = 0.5V: IIN = 0.28A DC = 62.0% 18 PBDC = 22mW PINP = 23mW Total LT8570 power dissipation (PTOT) = 161mW Thermal resistance for the LT8570/LT8570-1 is influenced by the presence of internal, topside or backside planes. To calculate die temperature, use the appropriate thermal resistance number and add in worst-case ambient temperature: TJ = TA + θJA • PTOT where TJ = junction temperature, TA = ambient temperature, and θJA is the thermal resistance from the silicon junction to the ambient air. The published θJA value is 43°C/W for the 3mm × 3mm DFN package and 35°C/W to 40°C/W for the MSOP exposed pad package. In practice, lower θJA values can be obtained if the board layout uses ground as a heat sink. For instance, thermal resistances of 34.7°C/W for the DFN package and 22.5°C/W for the MSOP package were obtained on a board designed with large ground planes. VIN Ramp Rate While initially powering a switching converter application, the VIN ramp rate should be limited. High VIN ramp rates can cause excessive inrush currents in the passive components of the converter. This can lead to current and/or voltage overstress and may damage the passive components or the chip. Ramp rates less than 500mV/µs, depending on component parameters, will generally prevent these issues. Also, be careful to avoid hot-plugging. Hot-plugging occurs when an active voltage supply is “instantly” connected or switched to the input of the converter. Hot-plugging results in very fast input ramp rates and is not recommended. Finally, for more information, refer to Linear application note AN88, which discusses voltage overstress that can occur when an inductive source impedance is hot-plugged to an input pin bypassed by ceramic capacitors. 85701f For more information www.linear.com/LT8570 LT8570/LT8570-1 Applications Information Layout Hints As with all high frequency switchers, when considering layout, care must be taken to achieve optimal electrical, thermal and noise performance. One will not get advertised performance with a careless layout. For maximum efficiency, switch rise and fall times are typically in the 10ns to 20ns range. To prevent noise, both radiated and conducted, the high speed switching current path, shown in Figure 9, must be kept as short as possible. This is implemented in the suggested layout of a boost configuration in Figure 10. Shortening this path will also reduce the parasitic trace inductance. At switch-off, this parasitic inductance produces a flyback spike across the LT8570/LT8570-1 switch. When operating at higher currents and output voltages, with poor layout, this spike can generate voltages across the LT8570/LT8570-1 that may exceed the absolute maximum rating. A ground plane should also be used under the switcher circuitry to prevent interplane coupling and overall noise. The VC and FBX components should be kept as far away as practical from the switch node, while still remaining close to the chip. The ground for these components should be separated from the switch current path. Failure to do so can result in poor stability or subharmonic oscillation. Board layout also has a significant effect on thermal resistance. The exposed package ground pad is the copper plate that runs under the LT8570/LT8570-1 die. This is D1 VOUT SW VIN LT8570/ LT8570-1 Layout Hints for Inverting Topology Figure 12 shows recommended component placement for the dual inductor inverting topology. Input bypass capacitor, C1,shouldbeplacedclosetotheLT8570/LT8570-1,asshown. The load should connect directly to the output capacitor, C2, for best load regulation. The local ground may be tied into the system ground plane at the C3 ground terminal. The cut ground copper at D1’s cathode is essential to obtain low noise. This important layout issue arises due to the chopped nature of the currents flowing in Q1 and D1. If they are both tied directly to the ground plane before being combined, switching noise will be introduced into the ground plane. It is almost impossible to get rid of this noise, once present in the ground plane. The solution is to tie D1’s cathode to the ground pin of the LT8570/LT8570-1 before the combined currents are dumped in the ground plane as drawn in Figure 12, Figure 13 and Figure 14. This single layout technique can virtually eliminate high frequency “spike” noise, so often present on switching regulator outputs. Differences from LT3580 L1 C1 a good thermal path for heat out of the package. Soldering the pad onto the board reduces die temperature and increases the power capability of the LT8570/LT8570-1. Provide as much copper area as possible around this pad. Adding multiple feedthroughs around the pad to the ground plane will also help. Figure 10 and Figure 11 show the recommended component placement for the boost and SEPIC configurations, respectively. HIGH FREQUENCY SWITCHING PATH LT8570/LT8570-1 are very similar to LT3580. However, LT8570/LT8570-1 do deviate from LT3580 in a few areas: • 65V, 0.5A switch for LT8570 • 65V, 0.25A switch for LT8570-1 C2 LOAD • 40V VIN and SHDN absolute maximum rating GND • FB renamed to FBX 8570 F09 Figure 9. High Speed “Chopped” Switching Path for Boost Topology • 5V FBX absolute maximum rating 85701f For more information www.linear.com/LT8570 19 LT8570/LT8570-1 Applications Information GND GND 1 8 9 2 C1 VIN L1 7 3 6 4 5 1 SYNC 2 C1 VIN SHDN L1 8 9 SYNC 7 3 6 4 5 SHDN SW SW D1 C2 8570 F10 VOUT C2 L2 VIAS TO GROUND PLANE REQUIRED TO IMPROVE THERMAL PERFORMANCE D1 8570 F11 VOUT Figure 10. Suggested Component Placement for Boost Topology (Both DFN and MSOP Packages. Not to Scale). Pin 9 (Exposed Pad) Must Be Soldered Directly to the Local Ground Plane for Adequate Thermal Performance. Multiple Vias to Additional Ground Planes Will Improve Thermal Performance VIAS TO GROUND PLANE REQUIRED TO IMPROVE THERMAL PERFORMANCE C3 Figure 11. Suggested Component Placement for SEPIC Topology (Both DFN And MSOP Packages. Not to Scale). Pin 9 (Exposed Pad) Must Be Soldered Directly to the Local Ground Plane for Adequate Thermal Performance. Multiple Vias to Additional Ground Planes Will Improve Thermal Performance GND 1 2 C1 VIN L1 8 9 SYNC 7 3 6 4 5 SHDN SW C2 L2 D1 VIAS TO GROUND PLANE REQUIRED TO IMPROVE THERMAL PERFORMANCE C3 VOUT 8570 F12 Figure 12. Suggested Component Placement for Inverting Topology (Both DFN and MSOP Packages. Not to Scale). Note Cut in Ground Copper at Diode’s Cathode. Pin 9 (Exposed Pad) Must be Soldered Directly to Local Ground Plane for Adequate Thermal Performance. Multiple Vias to Additional Ground Planes Will Improve Thermal Performance 20 85701f For more information www.linear.com/LT8570 LT8570/LT8570-1 Applications Information –(VIN + VOUT) VCESAT L1 SW VIN L2 SWX –VOUT D1 Q1 C1 + + C2 C3 RLOAD 8570 F13 Figure 13. Switch-On Phase of an Inverting Converter. L1 and L2 Have Positive dI/dt VIN + VOUT+ VD L1 SW VIN Q1 C2 L2 SWX –VOUT D1 C1 + + VD C3 RLOAD 8570 F14 Figure 14. Switch-Off Phase of an Inverting Converter. L1 and L2 Currents Have Negative dI/dt 85701f For more information www.linear.com/LT8570 21 LT8570/LT8570-1 Applications Information Boost Converter Component Selection D1 22µH VIN 5V VOUT 12V 125mA 10k VIN CIN 1µF SW SHDN FBX RFBX 130k RT OUT VC GND RC 6.19k SS RT 56.2k CSS 0.1µF PARAMETERS/EQUATIONS Step 1: Pick VIN, VOUT, and fOSC to calculate equations below Inputs Step 2: VOUT – VIN(MIN) + 0.5 V DCMAX = DC + 0.5 V– 0.4 V V COUT 2.2µF LT8570 SYNC Table 4. Boost Design Equations CC 2.2nF DCMIN = Step 3: L1 CF 47pF L MIN = 8570 F15 For a desired output voltage over a given input voltage range, Table 4 is a step-by-step set of equations to calculate component values for the LT8570/LT8570-1 when operating as a boost converter. Refer to the Applications Information section for further information on the design equations presented in Table 4. Variable Definitions: (VIN(MIN) – 0.4V) • DCMAX fOSC •IRTYP k SC • (DCMAX − 300ns • fOSC ) • fOSC • (1– DCMAX ) (VIN(MIN) – 0.4V) • DCMAX LMAX2 = fOSC •IRMIN (2) (3) (VIN(MAX) – 0.4V) • DCMIN (4) fOSC •IRMIN • Solve equations 1 to 4 for a range of L values • The minimum of the L value range is the higher of LTYP and LMIN • The maximum of the L value range is the lower of LMAX1 and LMAX2 Step 4: IRIPPLE IRIPPLE(MIN) = IRIPPLE(MAX) = Step 5: IOUT (VIN(MIN) – 0.4V) • DCMAX fOSC • L1 (VIN(MAX) – 0.4V) • DCMIN fOSC • L1 IRIPPLE(MIN) ⎞ ⎛ IOUT(MIN) = ⎜ILIM − ⎟ • (1− DCMAX ) 2 ⎝ ⎠ IRIPPLE(MAX) ⎞ ⎛ IOUT(MAX) = ⎜ILIM − ⎟ • (1− DCMIN ) 2 ⎝ ⎠ Step 6: VR > VOUT; IAVG > IOUT D1 Step 7: IOUT • DCMAX COUT ≥ COUT f • 0.005 • V Step 8: CIN VOUT = Output Voltage (1) (VIN(MIN) – 0.4V) • (2 • DCMAX – 1) OSC VIN = Input Voltage DC = Power Switch Duty Cycle OUT CIN ≥ C VIN + CPWR ≥ IRIPPLE(MAX) ILIM • DCMAX + 40 • fOSC • 0.005 • VIN(MIN) 8 • fOSC • 0.005 • VIN(MAX) •Refer to the Capacitor Selection Section for definition of CVIN and CPWR fOSC = Switching Frequency IOUT = Maximum Average Output Current IRIPPLE = Inductor Ripple Current IRTYP = 150mA for LT8570 and 75mA for LT8570-1 kSC = 0.6A for LT8570 and 0.3A for LT8570-1 IRMIN = 0.04A for LT8570 and 0.02A for LT8570-1 ILIM = 0.5A for LT8570 and 0.25A for LT8570-1 22 VOUT + 0.5 V– 0.4 V LMAX1 = Figure 15. Boost Converter: The Component Values Given Are Typical Values for a 1.5MHz, 5V to 12V Boost The LT8570/LT8570-1 can be configured as a boost converter as in Figure 15. This topology allows for positive output voltages that are higher than the input voltage. A single feedback resistor sets the output voltage. For output voltages higher than 60V, see the Charge Pump Aided Regulators section. L TYP = VOUT – VIN(MAX) + 0.5 V Step 9: RFBX RFBX = Step 10: RT RT = 85.5 –1; fOSC in MHz and R T in kΩ fOSC VOUT − 1.204V 83.3µA Note 1: This table uses 0.5A and 0.25A for the peak switch current. Refer to the Electrical Characteristics Table and Typical Performance Characteristics plots for the peak switch current at an operating duty cycle. Note 2: The final values for COUT and CIN may deviate from the previous equations in order to obtain desired load transient performance. 85701f For more information www.linear.com/LT8570 LT8570/LT8570-1 Applications Information SEPIC Converter Component Selection (Coupled or UnCoupled Inductors) • VIN 9V TO 16V C1 0.47µF L1 47µH PARAMETERS/EQUATIONS D1 VOUT 12V 160mA L2 47µH 487k VIN CIN 1µF Table 5. SEPIC Design Equations SHDN LT8570 RFBX 130k FBX SYNC RT • SW COUT 2.2µF VC GND RC 26.7k SS RT 84.5k CSS 0.22µF CC 2.2nF Step 1: Inputs Step 2: DC Step 3: L CF 47pF Pick VIN, VOUT and fOSC to calculate equations below DCMAX = VOUT + 0.5 V VIN(MIN) + VOUT + 0.5 V– 0.4V DCMIN = VOUT + 0.5 V VIN(MAX) + VOUT + 0.5 V– 0.4V L TYP = L MIN = 8570 F16 For a desired output voltage over a given input voltage range, Table 5 is a step-by-step set of equations to calculate component values for the LT8570/LT8570-1 when operating as a SEPIC converter. Refer to the Applications Information section for further information on the design equations presented in Table 5. Variable Definitions: VIN = Input Voltage VOUT = Output Voltage DC = Power Switch Duty Cycle fOSC •IRTYP (1) (VIN(MIN) – 0.4V) • (2 • DCMAX – 1) k SC • (DCMAX − 300ns • fOSC ) • fOSC • (1– DCMAX ) (VIN(MIN) – 0.4V) • DCMAX fOSC •IRMIN (2) (3) • Solve equations 1, 2 and 3 for a range of L values • The minimum of the L value range is the higher of LTYP and LMIN • The maximum of the L value range is LMAX • L = L1 = L2 for coupled inductors • L = L1 || L2 for uncoupled inductors Figure 16. SEPIC Converter: The Component Values and Voltages Given Are Typical Values for a 1MHz, 9V-16V to 12V SEPIC Converter Using Coupled Inductors Figure 16 shows the LT8570 configured as a SEPIC. This topology allows for positive output voltages that are lower, equal or higher than the input voltage. Output disconnect is inherent to the SEPIC topology, meaning no DC path exists between the input and output due to capacitor C1. LMAX = (VIN(MIN) – 0.4V) • DCMAX Step 4: IRIPPLE IRIPPLE(MIN) = IRIPPLE(MAX) = Step 5: IOUT (VIN(MIN) – 0.4V) • DCMAX fOSC • L (VIN(MAX) – 0.4V) • DCMIN fOSC • L IRIPPLE(MIN) ⎞ ⎛ IOUT(MIN) = ⎜ILIM − ⎟ • (1− DCMAX ) 2 ⎝ ⎠ IRIPPLE(MAX) ⎞ ⎛ IOUT(MAX) = ⎜ILIM − ⎟ • (1− DCMIN) 2 ⎝ ⎠ Step 6: D1 Step 7: C1 Step 8: COUT VR > VIN + VOUT; IAVG > IOUT Step 9: CIN CIN ≥ C VIN + CPWR ≥ fOSC = Switching Frequency VRATING ≥ VIN C1 ≥ 0.47µF for LT8570, C1 ≥ 0.22µF for LT8570-1 COUT ≥ IOUT(MIN) • DCMAX fOSC • 0.005 • VOUT IRIPPLE(MAX) ILIM • DCMAX + 40 • fOSC • 0.005 • VIN(MIN) 8 • fOSC • 0.005 • VIN(MAX) •Refer to the Capacitor Selection Section for definition of CVIN and CPWR IOUT = Maximum Average Output Current IRIPPLE = Inductor Ripple Current IRTYP = 150mA for LT8570 and 75mA for LT8570-1 kSC = 0.6A for LT8570 and 0.3A for LT8570-1 IRMIN = 0.04A for LT8570 and 0.02A for LT8570-1 ILIM = 0.5A for LT8570 and 0.25A for LT8570-1 Step 10: RFBX RFBX = Step 11: RT RT = 85.5 –1; fOSC in MHz and R T in kΩ fOSC VOUT − 1.204V 83.3µA Note 1: This table uses 0.5A and 0.25A for the peak switch current. Refer to the Electrical Characteristics Table and Typical Performance Characteristics plots for the peak switch current at an operating duty cycle. Note 2: The final values for COUT, CIN and C1 may deviate from the previous equations in order to obtain desired load transient performance. For more information www.linear.com/LT8570 85701f 23 LT8570/LT8570-1 Applications Information Dual Inductor Inverting Converter Component Selection (Coupled or UnCoupled Inductors) • VIN 5V TO 35V C1 0.47µF L1 47µH 232k VOUT –15V 65mA (VIN = 5V) 150mA (VIN = 12V) 210mA (VIN = 24V) • D1 VIN CIN 2.2µF L2 47µH SW SHDN FBX RFBX 182k COUT 2.2µF LT8570 SYNC RT VC GND RT 121k RC 20.5k SS CSS 0.1µF CC 2.2nF Table 6. Dual Inductor Inverting Design Equations Step 1: Inputs Step 2: DC Step 3: L PARAMETERS/EQUATIONS Pick VIN, VOUT and fOSC to calculate equations below DCMAX = VOUT + 0.5 V VIN(MIN) + VOUT + 0.5 V– 0.4 V DCMIN = VOUT + 0.5 V VIN(MAX) + VOUT + 0.5 V– 0.4 V CF 47pF 8570 F17 Figure 17. Dual Inductor Inverting Converter: The Component Values Given Are Typical Values for a 700kHz 5V-35V to –15V Inverting Topology Using Coupled Inductors Due to its unique FBX pin, the LT8570/LT8570-1 can work in an inverting configuration as in Figure 17. Changing the connections of L2 and the Schottky diode in the SEPIC topology results in negative output voltages. Output disconnect is inherently built into this topology due to the capacitor C1. For a desired output voltage over a given input voltage range, Table 6 is a step-by-step set of equations to calculate component values for the LT8570/LT8570-1 when operating as a dual inductor inverting converter. Refer to the Applications Information section for further information on the design equations presented in Table 6. Variable Definitions: VIN = Input Voltage VOUT = Output Voltage Step 4: IRIPPLE L TYP = L MIN = LMAX = (VIN(MIN) – 0.4V) • DCMAX fOSC •IRTYP (VIN(MIN) – 0.4V) • (2 • DCMAX – 1) k SC • (DCMAX − 300ns • fOSC ) • fOSC • (1– DCMAX ) (VIN(MIN) – 0.4V) • DCMAX fOSC •IRMIN (2) (3) •Solve equations 1, 2 and 3 for a range of L values •The minimum of the L value range is the higher of LTYP and LMIN •The maximum of the L value range is LMAX •L = L1 = L2 for coupled inductors •L = L1|| L2 for uncoupled inductors (VIN(MIN) – 0.4V) • DCMAX IRIPPLE(MIN) = fOSC • L IRIPPLE(MAX) = Step 5: IOUT (1) (VIN(MAX) – 0.4V) • DCMIN fOSC • L IRIPPLE(MIN) ⎞ ⎛ IOUT(MIN) = ⎜ILIM − ⎟ • (1− DCMAX ) 2 ⎝ ⎠ IRIPPLE(MAX) ⎞ ⎛ IOUT(MAX) = ⎜ILIM − ⎟ • (1− DCMIN) 2 ⎝ ⎠ Step 6: D1 Step 7: C1 Step 8: COUT VR > VIN + |VOUT|; IAVG > IOUT Step 9: CIN CIN ≥ C VIN + CPWR ≥ VRATING ≥ VIN(MAX) + |VOUT| C1 ≥ 0.47µF for LT8570, C1 ≥ 0.22µF for LT8570-1 COUT ≥ IRIPPLE(MAX) 8 • fOSC (0.005 • VOUT ) DC = Power Switch Duty Cycle IRIPPLE(MAX) ILIM • DCMAX + 40 • fOSC • 0.005 • VIN(MIN) 8 • fOSC • 0.005 • VIN(MAX) fOSC = Switching Frequency •Refer to the Capacitor Selection Section for definition of CVIN and CPWR IOUT = Maximum Average Output Current IRIPPLE = Inductor Ripple Current IRTYP = 150mA for LT8570 and 75mA for LT8570-1 kSC = 0.6A for LT8570 and 0.3A for LT8570-1 IRMIN = 0.04A for LT8570 and 0.02A for LT8570-1 ILIM = 0.5A for LT8570 and 0.25A for LT8570-1 24 Step 10: RFBX RFBX = Step 11: RT RT = 85.5 –1; fOSC in MHz and R T in kΩ fOSC VOUT + 3mV 83.3µA Note 1: This table uses 0.5A and 0.25A for the peak switch current. Refer to the Electrical Characteristics Table and Typical Performance Characteristics plots for the peak switch current at an operating duty cycle. Note 2: The final values for COUT, CIN and C1 may deviate from the previous equations in order to obtain desired load transient performance. For more information www.linear.com/LT8570 85701f LT8570/LT8570-1 typical Applications 1.5MHz, 5V to 12V Output Boost Converter L1 22µH VIN 5V D1 VOUT 12V 125mA 10k VIN VIN 130k FBX COUT 2.2µF LT8570 SYNC RT CIN 0.47µF VC GND 56.2k 6.19k SS VOUT 12V 60mA 2.2nF SW SHDN FBX 130k COUT 1µF LT8570-1 SYNC RT 47pF 0.1µF D1 10k SW SHDN CIN 1µF L1 47µH VIN 5V VC GND 56.2k 6.19k SS 47pF 2.2nF 0.1µF 8570 TA02a L1: WÜRTH 22µH WE-LQS 74404042220 D1: DIODES INC. PD3S140 CIN: 1µF, 16V, 0805, X7R COUT : 2.2µF, 16V, 0805, X7R 8570 TA02b L1: WÜRTH 47µH WE-LQS 74404032470 D1: DIODES INC. PD3S140 CIN: 0.47µF, 16V, 0805, X7R COUT : 1µF, 16V, 0805, X7R Efficiency and Power Loss (LT8570-1) 100 180 90 320 90 160 80 280 80 140 70 240 70 120 60 200 60 100 50 160 50 80 40 120 40 60 EFFICIENCY POWER LOSS 30 20 0 25 100 50 75 LOAD CURRENT (mA) EFFICIENCY (%) 360 80 30 40 125 20 EFFICIENCY POWER LOSS 0 45 15 30 LOAD CURRENT (mA) 8570 TA02c 40 60 20 8570 TA02d 30mA to 90mA to 30mA Output Load Step (LT8570) 15mA to 45mA to 15mA Output Load Step (LT8570-1) VOUT 500mV/DIV AC-COUPLED VOUT 500mV/DIV AC-COUPLED ISTEP 50mA/DIV ISTEP 20mA/DIV IL1 100mA/DIV IL1 50mA/DIV 50µs/DIV POWER LOSS (mW) 100 POWER LOSS (mW) EFFICIENCY (%) Efficiency and Power Loss (LT8570) 8570 TA02e 50µs/DIV 8570 TA02f 85701f For more information www.linear.com/LT8570 25 LT8570/LT8570-1 typical Applications 700kHz, –15V Output Inverting Converter Accepts 5V to 35V Input • VIN 5V TO 35V C1 0.47µF L1 47µH 232k VOUT –15V 65mA (VIN = 5V) 150mA (VIN = 12V) 210mA (VIN = 24V) • D1 VIN SW SHDN CIN 2.2µF L2 47µH 182k FBX COUT 2.2µF LT8570 SYNC VC RT GND 20.5k SS 47pF 0.1µF 121k 2.2nF 8570 TA03a L1: COILCRAFT 47µH LPD6235-473 D1: DIODES INC SBR160S23 CIN, COUT : 2.2µF, 50V, 0805, X7R C1: 0.47µF, 100V, 0805, X7S • VIN 5V TO 35V C1 0.22µF L1 100µH 232k VOUT –15V 35mA (VIN = 5V) 75mA (VIN = 12V) 105mA (VIN = 24V) • D1 VIN SW SHDN CIN 1µF L2 100µH FBX 182k COUT 1µF LT8570-1 SYNC RT VC GND 121k 20.5k SS 47pF 0.1µF 2.2nF 8570 TA03b L1: COILCRAFT 100µH LPD5030-104 D1: DIODES INC SBR160S23 CIN, COUT : 1µF, 50V, 0805, X7R C1: 0.22µF, 100V, 0805, X7S Efficiency and Power Loss (LT8570-1, VIN = 12V) 90 280 80 490 80 245 70 420 70 210 60 350 60 175 50 280 50 140 40 210 40 105 140 30 EFFICIENCY POWER LOSS 20 10 0 40 120 80 LOAD CURRENT (mA) 70 0 160 EFFICIENCY (%) 560 70 30 EFFICIENCY POWER LOSS 20 10 0 8570 TA03c 26 20 60 40 LOAD CURRENT (mA) POWER LOSS (mW) 90 POWER LOSS (mW) EFFICIENCY (%) Efficiency and Power Loss (LT8570, VIN = 12V) 35 80 0 8570 TA03c 85701f For more information www.linear.com/LT8570 LT8570/LT8570-1 typical Applications 1MHz Inverting Converter Generates –48V Output From 12V Input • VIN 12V C1 0.47µF L1 120µH 576k VOUT –48V 50mA • D1 VIN CIN 0.47µF L2 120µH SW SHDN 576k FBX COUT 0.47µF LT8570 SYNC RT VC GND 84.5k 16.2k SS 47pF 0.1µF 2.2nF 8570 TA04a L1, L2: COILCRAFT 120µH MSD7342-124 D1: DIODES, INC. DFLS1100 CIN, COUT : 0.47µF, 50V, 0805, X7R C1: 0.47µF, 100V, 0805, X7S 90 640 80 560 70 480 60 400 50 320 40 240 30 160 EFFICIENCY POWER LOSS 20 10 0 10 20 30 40 LOAD CURRENT (mA) POWER LOSS (mW) EFFICIENCY (%) Efficiency and Power Loss 80 50 0 8570 TA04b Switching Waveforms Start-Up Waveforms VSW 50V/DIV VSW 20V/DIV VOUT 20V/DIV VOUT 200mV/DIV AC-COUPLED IL1 + IL2 100mA/DIV IL1 + IL2 100mA/DIV 500µs/DIV 8570 TA04c 500µs/DIV 8570 TA04d 85701f For more information www.linear.com/LT8570 27 LT8570/LT8570-1 typical Applications VFD (Vacuum Fluorescent Display) Power Supply Switches at 1MHz Danger High Voltage! Operation by High Voltage Trained Personnel Only D5 30.1Ω D4 C4 0.22µF 30.1Ω L1 150µH VIN 9V TO 16V C2 0.22µF C5 0.22µF D3 C3 0.22µF D2 D1 CIN 0.47µF SW SHDN FBX 698k C1 0.22µF LT8570 SYNC RT VOUT2 120V 20mA* VOUT1 60V 40mA* 487k VIN VOUT3 180V 13mA* VC GND 84.5k 27.4k SS 330pF 0.47µF 6.8nF 8570 TA05a *MAX TOTAL OUTPUT POWER 2.5W L1: WÜRTH 150µH WE-PD2SR 744787151 D1-D5: CENTRAL SEMI CMOD6263 CIN: 0.47µF, 25V, 0805, X7R C1-C5: 0.22µF, 100V, 0805, X7S Start-Up Waveforms 90 900 80 800 70 700 60 600 50 500 40 400 30 20 300 EFFICIENCY POWER LOSS 0 0.5 1 1.5 OUTPUT POWER (W) 2 2.5 VOUT3 50V/DIV VOUT2 50V/DIV VOUT1 50V/DIV POWER LOSS (mW) EFFICIENCY (%) Efficiency and Power Loss (VIN = 12V with Load on VOUT3) IL1 100mA/DIV 1ms/DIV 8570 TA05c 200 8570 TA05b 28 85701f For more information www.linear.com/LT8570 LT8570/LT8570-1 typical Applications 1.2MHz Charge Pump Creates ±12V From a Single Lithium Ion Battery C2 0.22µF D4 10Ω D3 VIN 2.6V TO 5.5V D2 VIN D1 SW SHDN 130k FBX COUT1 1µF LT8570-1 SYNC VC RT GND 26.1k SS 47pF 0.1µF 69.8k COUT2 1µF VOUT1 12V 20mA* (VIN = 2.6V) 30mA* (VIN = 3.8V) 40mA* (VIN = 5V) 10Ω 10k CIN 0.47µF R1 **32.4k C1 0.22µF L1 68µH VOUT2 –12V 20mA* (VIN = 2.6V) 30mA* (VIN = 3.8V) 40mA* (VIN = 5V) 2.2nF 8570 TA06a L1: WÜRTH 68µH WE-LQS 74404054680 D1-D4: DIODES INC SDM10K45 CIN: 0.47µF, 25V, 0805, X7R COUT1, COUT2: 1µF, 16V, 0805, X7R C1-C2: 0.22µF, 25V, 0805, X7R *MAX TOTAL OUTPUT POWER FOR VIN = 2.6V: 240mW VIN = 3.8V: 350mW VIN = 5V: 480mW **IF DRIVING ASYMETRICAL LOADS, PLACE A 32.4k RESISTOR FROM THE 12V OUTPUT TO THE –12V OUTPUT FOR IMPROVED LOAD REGULATION OF THE –12V OUTPUT Efficiency and Power Loss (Load Between VOUT1 AND VOUT2) Transient Response with 5mA to 15mA to 5mA Output Load Step (VIN = 5V) 90 140 EFFICIENCY 70 110 60 95 POWER LOSS 50 80 40 65 30 50 20 10 4 12 8 16 LOAD CURRENT (mA) VOUT2 200mV/DIV AC-COUPLED ISTEP 10mA/DIV IL1 50mA/DIV 35 VIN = 5V VIN = 3.8V 0 VOUT1 200mV/DIV AC-COUPLED 125 POWER LOSS (mW) EFFICIENCY (%) 80 20 100µs/DIV 8570 TA06c 20 8570 TA06b 85701f For more information www.linear.com/LT8570 29 LT8570/LT8570-1 typical Applications 1MHz Boost Converter Generates 24V from 5V-12V Input L1 47µH VIN 5V-12V D1 VOUT 24V 60mA (VIN = 5V) 200mA (VIN = 12V) 232k VIN SW SHDN CIN 1µF FBX 274k COUT 1µF LT8570 SYNC VC RT GND 15k SS 47pF 2.2nF 0.1µF 84.5k 8570 TA07a L1: WÜRTH 47µH WE-LQS 74404042470 D1: MBR0540 CIN: 1µF, 16V, 0603, X7R COUT : 1µF, 50V, 0805, X7R L1 100µH VIN 5V-12V D1 VOUT 24V 30mA (VIN = 5V) 100mA (VIN = 12V) 232k VIN SW SHDN CIN 0.47µF FBX 274k COUT 0.47µF LT8570-1 SYNC VC RT GND 84.5k 11.3k SS 47pF 0.1µF 2.2nF 8570 TA07b L1: WÜRTH 100µH WE-LQS 74404054101 D1: FAIFCHILD BAT42XV2 CIN: 0.47µF, 16V, 0603, X7R COUT : 0.47µF, 50V, 0805, X7R Efficiency and Power Loss (LT8570-1, VIN = 12V) 100 350 90 540 90 300 80 450 80 250 70 360 70 200 60 270 60 150 50 180 50 100 40 30 EFFICIENCY POWER LOSS 0 40 80 160 120 LOAD CURRENT (mA) 90 0 200 EFFICIENCY (%) 630 40 30 EFFICIENCY POWER LOSS 0 8570 TA07c 30 20 40 80 60 LOAD CURRENT (mA) POWER LOSS (mW) 100 POWER LOSS (mW) EFFICIENCY (%) Efficiency and Power Loss (LT8570, VIN = 12V) 50 0 100 8570 TA07d 85701f For more information www.linear.com/LT8570 LT8570/LT8570-1 typical Applications 12V Battery Stabilizer Survives 40V Transients VIN 9V-16V UP TO 40V TRANSIENT C1 0.47µF L1 47µH • D1 10k SHDN CIN 1µF • SW VIN VOUT 12V 160mA L2 47µH 130k FBX COUT 2.2µF LT8570 SYNC L1, L2: COILCRAFT 47µH LPD6235-473 D1: DIODES INC. DFLS1100 CIN: 1µF, 50V, 0805, X7R COUT : 2.2µF, 25V, 0805, X7R C1: 0.47µF, 100V, 0805, X7S VC RT GND 26.7k SS 47pF 2.2nF 0.22µF 84.5k 8570 TA08a VIN 9V-16V UP TO 40V TRANSIENT L1 68µH • C1 0.22µF D1 10k CIN 0.47µF • SW VIN SHDN FBX VOUT 12V 70mA L2 68µH 130k COUT 1µF LT8570-1 SYNC VC RT GND 84.5k L1, L2: COILCRAFT 68µH LPD5030-683 D1: DIODES INC. DFLS1100 CIN: 0.47µF, 50V, 0805, X7R COUT : 1µF, 25V, 0805, X7R C1: 0.22µF, 100V, 0805, X7S 16.5k SS 47pF 0.22µF 2.2nF 8570 TA08b Efficiency and Power Loss (LT8570-1, VIN = 12V) 90 240 80 450 80 200 70 360 70 160 60 270 60 120 50 180 50 80 40 30 EFFICIENCY POWER LOSS 0 40 80 120 LOAD CURRENT (mA) 90 0 160 EFFICIENCY (%) 540 40 30 EFFICIENCY POWER LOSS 0 8570 TA08c 20 40 60 LOAD CURRENT (mA) 80 POWER LOSS (mW) 90 POWER LOSS (mW) EFFICIENCY (%) Efficiency and Power Loss (LT8570, VIN = 12V) 40 0 8570 TA08d 85701f For more information www.linear.com/LT8570 31 LT8570/LT8570-1 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698 Rev C) 0.70 ±0.05 3.5 ±0.05 1.65 ±0.05 2.10 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 2.38 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED PIN 1 TOP MARK (NOTE 6) 0.200 REF 3.00 ±0.10 (4 SIDES) R = 0.125 TYP 5 0.40 ±0.10 8 1.65 ±0.10 (2 SIDES) 0.75 ±0.05 4 0.25 ±0.05 1 (DD8) DFN 0509 REV C 0.50 BSC 2.38 ±0.10 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 32 85701f For more information www.linear.com/LT8570 LT8570/LT8570-1 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MS8E Package 8-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1662 Rev K) BOTTOM VIEW OF EXPOSED PAD OPTION 1.88 (.074) 1 1.88 ±0.102 (.074 ±.004) 0.29 REF 1.68 (.066) 0.889 ±0.127 (.035 ±.005) 0.05 REF 5.10 (.201) MIN DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 1.68 ±0.102 3.20 – 3.45 (.066 ±.004) (.126 – .136) 8 3.00 ±0.102 (.118 ±.004) (NOTE 3) 0.65 (.0256) BSC 0.42 ±0.038 (.0165 ±.0015) TYP 8 7 6 5 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) DETAIL “A” 0° – 6° TYP GAUGE PLANE 0.53 ±0.152 (.021 ±.006) DETAIL “A” 1 2 3 4 1.10 (.043) MAX 0.86 (.034) REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) BSC 0.1016 ±0.0508 (.004 ±.002) MSOP (MS8E) 0213 REV K NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 85701f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LT8570 33 LT8570/LT8570-1 Typical Application 1.2MHz Boost Converter Creates 48V from 9V-16V Input VIN 9V TO 16V D1 VOUT 48V 35mA (VIN = 9V) 50mA (VIN = 12V) 576k CIN 0.22µF SW SHDN 562k FBX COUT 0.22µF LT8570-1 SYNC RT VC GND 69.8k 8.87k SS 47pF 540 80 450 70 360 60 270 50 180 40 3.3nF 0.1µF 90 8570 TA09a 30 90 EFFICIENCY POWER LOSS 0 L1: COILCRAFT 220µH LPS6235-224 D1: DIODES INC. ZHCS506 CIN: 0.22µF, 25V, 0603, X7R COUT : 0.22µF, 50V, 0805, X7R 10 20 40 30 LOAD CURRENT (mA) POWER LOSS (mW) VIN Efficiency and Power Loss (VIN = 12V) EFFICIENCY (%) L1 220µH 50 0 8570 TA09b Related Parts PART NUMBER DESCRIPTION COMMENTS LT1613 550mA (ISW), 1.4MHz High Efficiency Step-Up DC/DC Converter VIN: 0.9V to 10V, VOUT(MAX) = 34V, IQ = 3mA, ISD < 1µA, ThinSOT Package LT1618 1.5A (ISW), 1.4MHz High Efficiency Step-Up DC/DC Converter VIN: 1.6V to 18V, VOUT(MAX) = 35V, IQ = 1.8mA, ISD < 1µA, MS10, 3mm × 3mm DFN Packages LT1930/LT1930A 1A (ISW), 1.2MHz/2.2MHz High Efficiency Step-Up DC/DC Converter VIN: 2.6V to 16V, VOUT(MAX) = 34V, IQ = 4.2mA/5.5mA, ISD < 1µA, ThinSOT Package LT1935 2A (ISW), 40V, 1.2MHz High Efficiency Step-Up DC/DC Converter VIN: 2.3V to 16V, VOUT(MAX) = 38V, IQ = 3mA, ISD < 1µA, ThinSOT Package LT1944/LT1944-1 Dual Output 350mA (ISW), Constant Off-Time, High Efficiency Step-Up DC/DC Converter VIN: 1.2V to 15V, VOUT(MAX) = 34V, IQ = 20µA, ISD < 1µA, MS10 Package LT1946/LT1946A 1.5A (ISW), 1.2MHz/2.7MHz High Efficiency Step-Up DC/DC Converter VIN: 2.6V to 16V, VOUT(MAX) = 34V, IQ = 3.2mA, ISD < 1µA, MS8E Package LT3467 1.1A (ISW), 1.3MHz High Efficiency Step-Up DC/DC Converter VIN: 2.4V to 16V, VOUT(MAX) = 40V, IQ = 1.2mA, ISD < 1µA, ThinSOT, 2mm × 3mm DFN Packages LT3479 3A Full-Featured DC/DC Converter with Soft-Start and Inrush Current Protection VIN: 2.5V to 24V, VOUT(MAX) = 40V, IQ = 5mA, ISD < 1µA, DFN, TSSOP Packages LT3580 2A (ISW), 42V, 2.5MHz, High Efficiency Step-Up DC/DC Converter VIN: 2.5V to 32V, VOUT(MAX) = 42V, IQ = 1mA, ISD = <1µA, 3mm × 3mm DFN-8, MSOP-8E LT3581 3.3A (ISW), 42V, 2.5MHz, High Efficiency Step-Up DC/DC Converter VIN: 2.5V to 22V, VOUT(MAX) = 42V, IQ = 1.9mA, ISD = <1µA, 4mm × 3mm DFN-14, MSOP-16E LT3579 6A (ISW), 42V, 2.5MHz, High Efficiency, Step-Up DC/DC Converter VIN: 2.5V to 16V, VOUT(MAX) = 42V, IQ = 1.9mA, ISD = <1µA, 4mm × 5mm DFN-20, TSSOP-20 LT8582 Dual Channel, 3A (ISW), 42V, 2.5MHz, High Efficiency Step-Up DC/DC Converter VIN: 2.5V to 22V, VOUT(MAX) = 42V, IQ = 2.1mA, ISD = <1µA, 4mm × 7mm DFN-24 LT8580 1A (ISW), 65V 1.5MHz, High Efficiency Step-Up DC/DC Converter VIN: 2.55V to 40V, VOUT(MAX) = 65V, IQ = 1.2mA, ISD = <1µA, 3mm × 3mm DFN-8, MSOP-8E 34 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT8570 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT8570 85701f LT 0215 • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2015