VS-VSKT105.., VS-VSKH105.., VS-VSKL105.., VS-VSKN105.. Series www.vishay.com Vishay Semiconductors ADD-A-PAK Generation VII Power Modules Thyristor/Diode and Thyristor/Thyristor, 105 A FEATURES • High voltage • Industrial standard package • Low thermal resistance • UL approved file E78996 • Designed and qualified for industrial level • Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 ADD-A-PAK BENEFITS • Excellent thermal performances obtained by the usage of exposed direct bonded copper substrate PRODUCT SUMMARY IT(AV) or IF(AV) 105 A Type Modules - Thyristor, Standard • Up to 1600 V • High surge capability • Easy mounting on heatsink MECHANICAL DESCRIPTION The ADD-A-PAK Generation VII, new generation of ADD-A-PAK module, combines the excellent thermal performances obtained by the usage of exposed direct bonded copper substrate, with advanced compact simple package solution and simplified internal structure with minimized number of interfaces. ELECTRICAL DESCRIPTION These modules are intended for general purpose high voltage applications such as high voltage regulated power supplies, lighting circuits, temperature and motor speed control circuits, UPS and battery charger. MAJOR RATINGS AND CHARACTERISTICS SYMBOL CHARACTERISTICS VALUES IT(AV) or IF(AV) 85 °C IO(RMS) As AC switch 235 ITSM, IFSM 50 Hz 2000 60 Hz 2094 I2t 50 Hz 20 60 Hz 18.26 I2t VRRM Range UNITS 105 A kA2s 200 kA2s 400 to 1600 V TStg -40 to 130 TJ -40 to 130 °C Revision: 21-Mar-14 Document Number: 94628 1 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-VSKT105.., VS-VSKH105.., VS-VSKL105.., VS-VSKN105.. Series www.vishay.com Vishay Semiconductors ELECTRICAL SPECIFICATIONS VOLTAGE RATINGS TYPE NUMBER VOLTAGE CODE VRRM, MAXIMUM REPETITIVE PEAK REVERSE VOLTAGE V VRSM, MAXIMUM NON-REPETITIVE PEAK REVERSE VOLTAGE V VDRM, MAXIMUM REPETITIVE PEAK OFF-STATE VOLTAGE, GATE OPEN CIRCUIT V 04 400 500 400 06 600 700 600 VS-VSK.105 08 800 900 800 10 1000 1100 1000 12 1200 1300 1200 14 1400 1500 1400 16 1600 1700 1600 IRRM, IDRM AT 130 °C mA 20 ON-STATE CONDUCTION PARAMETER SYMBOL Maximum average on-state current (thyristors) IT(AV) Maximum average forward current (diodes) IF(AV) Maximum continuous RMS on-state current, as AC switch TEST CONDITIONS VALUES 180° conduction, half sine wave, TC = 85 °C IO(RMS) I(RMS) or UNITS 105 I(RMS) 235 A t = 10 ms Maximum peak, one-cycle non-repetitive on-state or forward current ITSM or IFSM No voltage reapplied t = 8.3 ms 100 % VRRM reapplied t = 10 ms t = 8.3 ms t = 10 ms Maximum I2t for fusing I2t Maximum value or threshold voltage Maximum value of on-state slope resistance Maximum peak on-state or forward voltage Maximum non-repetitive rate of rise of turned on current I2t (1) VT(TO) (2) rt (2) Sinusoidal half wave, initial TJ = TJ maximum t = 8.3 ms 100 % VRRM reapplied t = 10 ms 2094 1682 1760 20 No voltage reapplied t = 8.3 ms Maximum I2t for fusing 2000 Initial TJ = TJ maximum 18.26 14.14 12.91 t = 0.1 ms to 10 ms, no voltage reapplied TJ = TJ maximum 200 Low level (3) 0.98 High level (4) Low level (3) High level (4) VTM ITM = x IT(AV) VFM IFM = x IF(AV) dI/dt TJ = TJ maximum TJ = TJ maximum TJ = 25 °C kA2s 1.12 2.7 2.34 kA2s V m 1.8 V TJ = 25 °C, from 0.67 VDRM, ITM = x IT(AV), Ig = 500 mA, tr < 0.5 μs, tp > 6 μs 150 A/μs Maximum holding current IH TJ = 25 °C, anode supply = 6 V, resistive load, gate open circuit 250 Maximum latching current IL TJ = 25 °C, anode supply = 6 V, resistive load 400 mA Notes (1) I2t for time t = I2t x t x x (2) Average power = V 2 T(TO) x IT(AV) + rt x (IT(RMS)) (3) 16.7 % x x I AV < I < x IAV (4) I > x I AV Revision: 21-Mar-14 Document Number: 94628 2 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-VSKT105.., VS-VSKH105.., VS-VSKL105.., VS-VSKN105.. Series www.vishay.com Vishay Semiconductors TRIGGERING PARAMETER SYMBOL Maximum peak gate power Maximum average gate power Maximum peak gate current Maximum peak negative gate voltage TEST CONDITIONS VALUES PGM 12 PG(AV) 3 IGM 3 - VGM VGT Anode supply = 6 V resistive load TJ = 25 °C V 2.5 1.7 270 TJ = -40 °C IGT A 4.0 TJ = 125 °C Maximum gate current required to trigger W 10 TJ = -40 °C Maximum gate voltage required to trigger UNITS Anode supply = 6 V resistive load TJ = 25 °C mA 150 TJ = 125 °C 80 Maximum gate voltage that will not trigger VGD TJ = 125 °C, rated VDRM applied 0.25 V Maximum gate current that will not trigger IGD TJ = 125 °C, rated VDRM applied 6 mA VALUES UNITS 20 mA 3000 (1 min) 3600 (1 s) V 1000 V/μs VALUES UNITS -40 to 130 °C BLOCKING PARAMETER SYMBOL TEST CONDITIONS Maximum peak reverse and off-state leakage current at VRRM, VDRM IRRM, IDRM TJ = 130 °C, gate open circuit Maximum RMS insulation voltage VINS 50 Hz Maximum critical rate of rise of off-state voltage dV/dt TJ = 130 °C, linear to 0.67 VDRM THERMAL AND MECHANICAL SPECIFICATIONS PARAMETER SYMBOL Junction operating temperature range TEST CONDITIONS TJ Storage temperature range TStg Maximum internal thermal resistance, junction to case per leg RthJC DC operation 0.22 Typical thermal resistance, case to heatsink per module RthCS Mounting surface flat, smooth and greased 0.1 °C/W A mounting compound is recommended and the torque should be rechecked after a period of 3 hours to allow for the spread of the compound. to heatsink Mounting torque ± 10 % busbar 4 Nm 3 Approximate weight JEDEC® Case style 75 g 2.7 oz. AAP GEN VII (TO-240AA) R CONDUCTION PER JUNCTION DEVICES VSK.105.. SINE HALF WAVE CONDUCTION RECTANGULAR WAVE CONDUCTION 180° 120° 90° 60° 30° 180° 120° 90° 60° 30° 0.04 0.048 0.063 0.085 0.125 0.033 0.052 0.067 0.088 0.127 UNITS °C/W Note • Table shows the increment of thermal resistance RthJC when devices operate at different conduction angles than DC Revision: 21-Mar-14 Document Number: 94628 3 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-VSKT105.., VS-VSKH105.., VS-VSKL105.., VS-VSKN105.. Series Maximum average on-state power loss (W) 130 RthJC (DC) = 0.22°C/W 120 110 100 90 180° 120° 90° 60° 30° 80 70 0 Maximum allowable case temperature (°C) Vishay Semiconductors 20 40 60 80 100 120 180° 120° 90° 60° 30° DC RMS limit Per leg, Tj = 130°C 0 20 40 60 80 100 120 140 160 180 Average on-state current (A) Fig. 1 - Current Ratings Characteristics Fig. 4 - On-State Power Loss Characteristics 1800 130 RthJC (DC) = 0.22°C/W 120 110 100 DC 180° 120° 90° 60° 30° 90 80 70 0 At any rated load condition and with rated Vrrm applied following surge Initial Tj = Tj max @ 60 Hz 0.0083 s @ 50 Hz 0.0100s 1600 1400 1200 1000 Per leg 800 20 40 60 80 100 120 140 160 180 1 10 100 Number of equal amplitude half cycle current pulses (N) Average on-state current (A) Fig. 2 - Current Ratings Characteristics Fig. 5 - Maximum Non-Repetitive Surge Current 2000 200 Peak half sine wave on-state current (A) Maximum average on-state power loss (W) 260 240 220 200 180 160 140 120 100 80 60 40 20 0 Average on-state current (A) Peak half sine wave on-state current (A) Maximum allowable case temperature (°C) www.vishay.com 180° 120° 90° 60° 30° 180 160 140 120 RMS limit 100 80 60 40 20 Per leg, Tj = 130°C 0 0 20 40 60 80 100 120 Average on-state current (A) Fig. 3 - On-State Power Loss Characteristics 1800 1600 Maximum Non-repetitive Surge Current Versus Pulse Train Duration. Control of conduction may not be maintained. Initial Tj = 130°C No Voltage Reapplied Rated Vrrm reapplied 1400 1200 1000 800 0.01 Per leg 0.1 1 Pulse train duration (s) Fig. 6 - Maximum Non-Repetitive Surge Current Revision: 21-Mar-14 Document Number: 94628 4 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-VSKT105.., VS-VSKH105.., VS-VSKL105.., VS-VSKN105.. Series www.vishay.com Vishay Semiconductors Maximum total on-state power loss (W) 400 350 RthSA = 0.1 °C/W 0.2 °C/W 0.3 °C/W 0.5 °C/W 0.7 °C/W 1 °C/W 2°C/W 180° 120° 90° 60° 30° 300 250 200 150 100 VSK.105 Series Per module Tj = 130°C 50 0 0 40 80 120 160 200 Total RMS output current (A) 240 0 20 40 60 80 100 120 140 Maximum allowable ambient temperature (°C) Fig. 7 - On-State Power Loss Characteristics Maximum total power loss (W) 700 RthSA = 0.1 °C/W 0.2 °C/W 0.3 °C/W 0.5 °C/W 0.7 °C/W 1 °C/W 2 °C/W 180° (sine) 180° (rect) 600 500 400 ∼ 300 200 2 x VSK.105 Series single phase bridge connected Tj = 130°C 100 0 0 40 80 120 160 200 0 20 40 60 80 100 120 140 Maximum allowable ambient temperature (°C) Total output current (A) Fig. 8 - On-State Power Loss Characteristics Maximum total power loss (W) 900 RthSA = 0.1 °C/W 0.2 °C/W 0.3 °C/W 0.5 °C/W 1 °C/W 800 700 600 120° (rect) 500 400 300 200 3 x VSK.105 Series three phase bridge connected Tj = 130°C 100 0 0 40 80 120 160 Total output current (A) 200 240 0 20 40 60 80 100 120 140 Maximum allowable ambient temperature (°C) Fig. 9 - On-State Power Loss Characteristics Revision: 21-Mar-14 Document Number: 94628 5 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-VSKT105.., VS-VSKH105.., VS-VSKL105.., VS-VSKN105.. Series www.vishay.com Vishay Semiconductors Instantaneous on-state current (A) 1000 Per leg 100 10 Tj = 130°C Tj = 25°C 1 0.5 1.0 1.5 2.0 2.5 3.0 3.5 Instantaneous on-state voltage (V) Transient thermal impedance Z thJC (°C/W) Fig. 10 - On-State Voltage Drop Characteristics 1 Steady state value RthJC = 0.22 °C/W (DC operation) 0.1 0.01 Per leg 0.001 0.001 0.01 0.1 1 10 Square wave pulse duration (s) Fig. 11 - Thermal Impedance ZthJC Characteristics Rec tangular gate pulse a)Rec ommended load line for rated di/ dt: 20 V, 20 ohms tr = 0.5 µs, tp >= 6 µs b)Rec ommended load line for <= 30% rated di/ dt: 15 V, 40 ohms tr = 1 µs, tp >= 6 µs 10 (1) PGM = 200 W, tp = 300 µs (2) PGM = 60 W, tp = 1 ms (3) PGM = 30 W, tp = 2 ms (4) PGM = 12 W, tp = 5 ms (a) TJ = 125 °C 1 TJ = -40 °C (b) TJ = 25 °C Instantaneous gate voltage (V) 100 (4) (3) (2) (1) VGD IGD 0.1 0.001 0.01 VSK. IRK.105.. Series 0.1 1 Frequenc y Limited by PG(AV) 10 100 1000 Instantaneous gate current (A) Fig. 12 - Gate Characteristics Revision: 21-Mar-14 Document Number: 94628 6 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-VSKT105.., VS-VSKH105.., VS-VSKL105.., VS-VSKN105.. Series www.vishay.com Vishay Semiconductors ORDERING INFORMATION TABLE Device code VS-VS K T 105 1 2 3 4 1 - / 16 5 Vishay Semiconductors product 2 - Module type 3 - Circuit configuration (see Circuit Configuration table) 4 - Current code (105 A) 5 - Voltage code (see Voltage Ratings table) Note • To order the optional hardware go to www.vishay.com/doc?95172 CIRCUIT CONFIGURATION CIRCUIT DESCRIPTION CIRCUIT CONFIGURATION CODE CIRCUIT DRAWING (1) ~ VSKT Two SCRs doubler circuit 1 + 2 T (2) 3 4 5 7 6 (3) G1 K1 K2 G2 (4) (5) (7) (6) (1) ~ VSKH 1 SCR/diode doubler circuit, positive control + 2 H (2) 3 4 5 (3) G1 K1 (4) (5) (1) ~ VSKL SCR/diode doubler circuit, negative control 1 2 L + (2) 3 7 6 (3) K2 G2 (7) (6) (1) - VSKN SCR/diode common anodes 1 2 N + (2) 3 4 5 + (3) G1 K1 (4) (5) LINKS TO RELATED DOCUMENTS Dimensions www.vishay.com/doc?95368 Revision: 21-Mar-14 Document Number: 94628 7 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Outline Dimensions Vishay Semiconductors ADD-A-PAK Generation VII - Thyristor DIMENSIONS in millimeters (inches) 29 ± 0.5 (1 ± 0.020) 30 ± 0.5 (1.18 ± 0.020) 35 REF. 18 (0.7) REF. 30 ± 1 (1.18 ± 0.039) 15.5 ± 0.5 (0.6 ± 0.020) 24 ± 0.5 (1 ± 0.020) Viti M5 x 0.8 Screws M5 x 0.8 6.7 ± 0.3 (0.26 ± 0.012) Fast-on tab 2.8 x 0.8 (0.110 x 0.03) Document Number: 95368 Revision: 11-Nov-08 20 ± 0.5 (0.79 ± 0.020) 20 ± 0.5 (0.79 ± 0.020) 92 ± 0.75 (3.6 ± 0.030) 5.8 ± 0.25 (0.228 ± 0.010) 15 ± 0.5 (0.59 ± 0.020) For technical questions, contact: [email protected] 4 ± 0.2 (0.157 ± 0.008) 7 6 4 5 3 2 1 6.3 ± 0.2 (0.248 ± 0.008) 22.6 ± 0.2 (0.89 ± 0.008) 80 ± 0.3 (3.15 ± 0.012) www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000