TVS Diodes Transient Voltage Suppressor Diodes TVS3V3L4U Low Capacitance ESD / Transient / Surge Protection Array TVS3V3L4U Data Sheet Revision 2.4, 2013-02-06 Final Power Management & Multimarket Edition 2013-02-06 Published by Infineon Technologies AG 81726 Munich, Germany © 2013 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. TVS3V3L4U Revision History: Rev. 2.3 2012-01-11 Page or Item Subjects (major changes since previous revision) Revision 2.4, 2013-02-06 4 Halogen free deleted Trademarks of Infineon Technologies AG AURIX™, BlueMoon™, COMNEON™, C166™, CROSSAVE™, CanPAK™, CIPOS™, CoolMOS™, CoolSET™, CORECONTROL™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, EUPEC™, FCOS™, HITFET™, HybridPACK™, ISOFACE™, I²RF™, IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PROFET™, PRO-SIL™, PRIMARION™, PrimePACK™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SMARTi™, SmartLEWIS™, TEMPFET™, thinQ!™, TriCore™, TRENCHSTOP™, X-GOLD™, XMM™, X-PMU™, XPOSYS™. Other Trademarks Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, PRIMECELL™, REALVIEW™, THUMB™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG. FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Sattelite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited. Last Trademarks Update 2010-06-09 FinalData Sheet 3 Revision 2.4, 2013-02-06 TVS3V3L4U Low Capacitance ESD / Transient / Surge Protection Array 1 Low Capacitance ESD / Transient / Surge Protection Array 1.1 Features • • • • • • ESD/Transient/Surge protection according to: IEC61000-4-2 (ESD): ±30 kV air/contact discharge IEC61000-4-4 (EFT): ±80 A (5/50 ns) IEC61000-4-5 (Surge): ±20 A (8/20 μs) Reverse working voltage maximum: VRWM = 3.3 V Low leakage current: IR < 50 nA Low capacitance: CL = 2 pF typ. (I/O to GND), 1 pF typ. (I/O to I/O) Low clamping voltage: VCL = 7.7 V typ. @ 20 A (8/20 μs) Pb-free (RoHS compliant) package 1.2 • • • Application Examples 10/100/1000 Ethernet 4 lines uni-directional (Pin 2 to GND) 2 lines bi-directional (Pin 2 n.c.) 1.3 Product Description Pin 6 Pin 5 Pin 4 Pin 1 Pin 2 Pin 3 a) Pin configuration Pin 1 Pin 3 Pin 5 n.c. Pin 4 Pin 6 GND b) Schematic diagram Pin 2 TVS3V3L4U_PinConf_and_SchematicDiag1.vsd Figure 1-1 Pin configuration and Schematic diagram Table 1-1 Ordering Information Type Package Configuration TVS3V3L4U SC74 4 lines, uni-directional or 2 lines, bidirectional FinalData Sheet 4 Marking code E1s Revision 2.4, 2013-02-06 TVS3V3L4U Electrical Characteristics 2 Electrical Characteristics 2.1 Maximum Ratings Table 2-1 Maximum Ratings at TA = 25 °C, unless otherwise specified Parameter ESD discharge air contact Symbol 1) Values Unit Min. Typ. Max. -30 -30 – – 30 30 -20 – 20 kV VESD Peak pulse current (tP = 8/20 μs)2) IPP Peak pulse power tP = 8/20 μs2) tP = 100 ns3) PPK Operating temperature Storage temperature A W – – – – 154 1044 TOP -55 – 125 °C Tstg -55 – 150 °C 1) VESD according to IEC61000-4-2 2) IPP according to IEC61000-4-5. PPK is calculated by IPP x VCL. 3) Please refer to AN210[1]. PPK is calculated by ITLP x VCL. Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. FinalData Sheet 5 Revision 2.4, 2013-02-06 TVS3V3L4U Electrical Characteristics 2.2 DC Characteristics ! "# ! # "# Figure 2-1 Definitions of electrical characteristics Table 2-2 DC Characteristics at TA = 25 °C, unless otherwise specified Parameter Symbol Values Unit Min. Typ. Max. Note / Test Condition Reverse working voltage VRWM – – 3.3 V Reverse current IR – – 50 nA VR = 3.3 V Unit Note / Test Condition pF VR = 0 V, f = 1 MHz 2.3 RF Characteristics Table 2-3 RF Characteristics at TA = 25 °C, unless otherwise specified Parameter Line capacitance I/O to GND I/O to I/O FinalData Sheet Symbo l Min. Values Typ. Max. 2 1 3 – CL – – 6 Revision 2.4, 2013-02-06 TVS3V3L4U Electrical Characteristics 2.4 ESD Characteristics Table 2-4 ESD Characteristics at TA = 25 °C, unless otherwise specified Parameter Symbo l Min. 1) Reverse clamping voltage I/O to GND I/O to GND I/O to GND I/O to GND I/O to GND Dynamic resistance1) I/O to GND Note / Test Condition V Max. – – – – – 4.2 4.9 5.8 6.7 7.7 – – – – – tp = 8/20 μs IPP = 1 A IPP = 5 A IPP = 10 A IPP = 15 A IPP = 20 A – 5.8 – tp = 100 ns IPP = 16 APP – – 1.1 4 – – tp = 8/20 μs IPP = 1 A IPP = 20 A – 3.1 – tp = 100 ns IPP = 16 A – 0.15 – tp = 8/20 μs – 0.09 – tp = 100 ns V VFC Forward clamping voltage2) GND to I/O Unit Typ. VCL Reverse clamping voltage2) I/O to GND Forward clamping voltage1) GND to I/O GND to I/O Values Ω RDYN 2) Dynamic restiance I/O to GND 1) IPP according to IEC61000-4-5 2) Please refer to Application Note AN210 [1]. TLP parameter: Z0 = 50 Ω , tp = 100ns, tr = 300ps, averaging window: t1 = 30 ns to t2 = 60 ns, extraction of dynamic resistance using least squares fit of TLP characteristics between IPP1 = 10 A and IPP2 = 40 A. FinalData Sheet 7 Revision 2.4, 2013-02-06 TVS3V3L4U Typical Characteristic 3 Typical Characteristic 3 CL [pF] 2.5 2 1.5 1 0 0.5 1 1.5 2 2.5 3 3.5 VR [V] Figure 3-1 Line capacitance CL = f(VR) -1 10 -2 10 -3 10 -4 IF [A] 10 -5 10 -6 10 10-7 10-8 -9 10 0.2 0.4 0.6 VF [V] 0.8 1 Figure 3-2 Forward characteristic, IF = f(VF) FinalData Sheet 8 Revision 2.4, 2013-02-06 TVS3V3L4U Typical Characteristic -7 10 -8 10 IR [A] -9 10 10 -10 10 -11 10 -12 0 0.5 1 1.5 2 VR [V] 2.5 3 3.5 100 125 Figure 3-3 Reverse current, IR = f(VR) -7 IR [A] 10 -8 10 -9 10 -75 -50 -25 0 25 TA [°C] 50 75 Figure 3-4 Reverse current IR = f(TA), VR = 3.3 V FinalData Sheet 9 Revision 2.4, 2013-02-06 TVS3V3L4U Typical Characteristic 22 20 18 IPP [A] 16 14 12 10 8 6 4 4 5 6 VCL [V] 7 8 Figure 3-5 Pulse reverse current (IEC61000-4-5) versus clamping voltage, IPP = f(VCL) 22 20 18 IPP [A] 16 14 12 10 8 6 4 1 2 3 VCL [V] 4 5 Figure 3-6 Pulse forward current (IEC61000-4-5) versus clamping voltage, IPP = f(VCL) FinalData Sheet 10 Revision 2.4, 2013-02-06 TVS3V3L4U Typical Characteristic 90 TVS3V3L4U RDYN 80 40 ITLP [A] 60 30 50 40 20 RDYN=0.085Ω 30 20 Equivalent VIEC [kV] 70 10 10 0 4 5 6 7 8 9 10 11 12 0 VTLP [V] Figure 3-7 TLP characteristics, reverse pulse 90 TVS3V3L4U RDYN 80 40 ITLP [A] 60 30 50 40 20 RDYN=0.117Ω 30 20 Equivalent VIEC [kV] 70 10 10 0 0 2 4 6 8 10 12 0 VTLP [V] Figure 3-8 TLP characteristics, forward pulse FinalData Sheet 11 Revision 2.4, 2013-02-06 TVS3V3L4U Typical Characteristic 50 VCL [V] VCL [V] 100 50 25 0 -25 -5 0 5 0 -50 0 50 100 150 tp [ns] 10 15 tp [ns] 20 200 25 30 250 Figure 3-9 Clamping voltage at +8 kV contact discharge according IEC61000-4-2 (R = 330 Ω, C = 150 pF) 50 VCL [V] VCL [V] 100 50 25 0 -25 -5 0 0 -50 0 50 100 150 tp [ns] 5 10 15 tp [ns] 200 20 25 30 250 Figure 3-10 Clamping voltage at -8 kV contact discharge according IEC61000-4-2 (R = 330 Ω, C = 150 pF) FinalData Sheet 12 Revision 2.4, 2013-02-06 TVS3V3L4U Typical Characteristic 50 VCL [V] VCL [V] 100 50 25 0 -25 -5 0 5 0 -50 0 50 100 150 tp [ns] 10 15 tp [ns] 20 200 25 30 250 Figure 3-11 Clamping voltage at +15 kV contact discharge according IEC61000-4-2 (R = 330 Ω, C = 150 pF) 50 VCL [V] VCL [V] 100 50 25 0 -25 -5 0 0 -50 0 50 100 150 tp [ns] 5 10 15 tp [ns] 200 20 25 30 250 Figure 3-12 Clamping voltage at -15 kV contact discharge according IEC61000-4-2 (R = 330 Ω, C = 150 pF) FinalData Sheet 13 Revision 2.4, 2013-02-06 TVS3V3L4U Package Information Package Information 2.9 ±0.2 (2.25) B 1.1 MAX. 0.15 +0.1 -0.06 5 4 1 2 3 0.35 +0.1 -0.05 Pin 1 marking 0.2 1.6 ±0.1 6 2.5 ±0.1 (0.35) 0.25 ±0.1 4 A B 6x M 0.1 MAX. 0.95 0.2 1.9 M A SC74-PO V04 Figure 4-1 SC74 Package outline 2.9 1.9 0.5 0.95 SC74-FPR V04 Figure 4-2 SC74 Footprint (Reflow Soldering) 2.9 1.6 1.3 MIN. 0.5 Transport direction 0.95 SC74-FPW V04 Figure 4-3 SC74 Footprint (Reflow Soldering) 0.2 2.7 8 4 Pin 1 marking 3.15 1.15 SC74-TP Figure 4-4 SC74 Packing FinalData Sheet 14 Revision 2.4, 2013-02-06 TVS3V3L4U References References [1] Infineon AG - Application Note AN210: Effective ESD Protection Design at System Level using VF-TLP Characterization Methodology [2] Infineon AG - Recommendations for PCB Assembly of Infineon TSLP and TSSLP Packages FinalData Sheet 15 Revision 2.4, 2013-02-06 w w w . i n f i n e o n . c o m Published by Infineon Technologies AG