TVS Diode Transient Voltage Suppressor Diodes ESD5V3U2U Series Uni-directional Ultra Low ESD / Transient Protection Diode ESD5V3U2U-03F ESD5V3U2U-03LRH Data Sheet Revision 1.3, 2013-08-16 Final Power Management & Multimarket Edition 2013-08-16 Published by Infineon Technologies AG 81726 Munich, Germany © 2013 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. ESD5V3U2U Series Revision History: Rev. 1.2, 2013-08-16 Page or Item Subjects (major changes since previous revision) Revision 1.3, 2013-08-16 4 + 16 All marking infos for TSLP-3-7 updated Trademarks of Infineon Technologies AG AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™, CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™, PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™. Other Trademarks Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG. FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited. Last Trademarks Update 2010-10-26 FinalData Sheet 3 Revision 1.3, 2013-08-16 ESD5V3U2U Series Uni-directional Ultra Low ESD / Transient Protection Diode 1 Uni-directional Ultra Low ESD / Transient Protection Diode 1.1 Features • • • • • ESD / Transient protection of High-Speed data lines exceeding – IEC61000-4-2 (ESD): ± 20 kV (air / contact) – IEC61000-4-4 (EFT): ±50 A (5/50 ns) – IEC61000-4-5 (surge): ±3 A (8/20 μs) Maximum working voltage: VRWM 5.3 V Extremely low capacitance: down to 0.4 pF Very low reverse current: IR < 1 nA typical Pb-free package (RoHS compliant) and halogen free package 1.2 • Application Examples ESD / Transient protection of High Speed Interfaces: – HDMI, USB 2.0/USB 3.0, DisplayPort, DVI – Mobile HDMI Link, MDDI, MIPI. – 10/100/1000 Ethernet, Firewire, S-ATA, etc. 1.3 Product Description Pin 1 Pin 1 Pin 2 Pin 3 Pin 2 TSLP-3 Pin 3 Pin 3 Pin 1 Pin 2 TSFP-3 a) Pin configuration b) Schematic diagram PG- TSL(F)P-3-Dual_diode_A_com_PinConf_and_SchematicDiag.vst.vsd Figure 1-1 Pin Configuration (a) and Schematic Diagram (b) Table 1-1 Ordering information Type ESD5V3U2U-03F Package PG-TSFP-3-1 ESD5V3U2U-03LRH PG-TSLP-3-7 Configuration Marking code 1) Z1 1) Z1 2 lines, uni-directional 2 lines, uni-directional 1) Or 1 line, bi-directional between pins 1 and 2, if pin 3 is not connected FinalData Sheet 4 Revision 1.3, 2013-08-16 ESD5V3U2U Series Characteristics 2 Characteristics Table 2-1 Maximum Rating at TA = 25 °C, unless otherwise specified Parameter Symbol Values Unit Min. Typ. Max. VESD -20 – 20 kV IPP -3 – 3 A Operating temperature range TOP -40 – 125 °C Storage temperage 1) VESD according to IEC61000-4-2 2) IPP according to IEC61000-4-5 Tstg -65 – 150 °C ESD (air / contact) discharge 1) Peak pulse current (tp = 8/20 μs) 2) Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. 2.1 Electrical Characteristics at TA = 25 °C, unless otherwise specified !" " !" Figure 2-1 Definitions of electrical characteristics FinalData Sheet 5 Revision 1.3, 2013-08-16 ESD5V3U2U Series Characteristics Table 2-2 DC characteristics at TA = 25 °C, unless otherwise specified Parameter Symbol Values Unit Note / Test Condition Min. Typ. Max. Reverse working voltage VRWM – – 5.3 V Breakdown voltage VBR 6 – – V IBR = 1 mA, from Pin 1/2 to Pin 3 Reverse current IR – <1 50 nA VR = 5.3 V, from Pin 1/2 to Pin 3 Table 2-3 RF characteristics at TA = 25 °C, unless otherwise specified Parameter Symbol Line capacitance1) CL Values Min. Typ. Max. – 0.4 0.6 Unit Note / Test Condition pF VR = 0 V, f = 1 MHz from pin 1/2 to pin 3 – 0.2 0.4 pF VR = 0 V, f = 1 MHz from pin 1 to 2, pin 31) not connected 1) Total capacitance line to ground Table 2-4 ESD Characteristics at TA = 25 °C, unless otherwise specified Parameter Symbo l Min. 1) Clamping voltage VCL – Values Typ. Max. 19 – Unit Note / Test Condition V ITLP = 16 A, from Pin 1/2 to Pin 3 Forward clamping voltage1) VFC – 28 – V ITLP = 30 A, from Pin 1/2 to Pin 3 – 10 – V ITLP = 16 A, from Pin 3 to Pin 1/2 – 17 – V ITLP = 30 A, from Pin 3 to Pin 1/2 Dynamic resistance 1) RDYN – 0.6 – V Pin 1/2 to Pin 3 – 0.4 – V Pin 3 to Pin 1/2 1)Please refer to Application Note AN210[1]. TLP parameter: Z0 = 50 Ω , tp = 100ns, tr = 300ps, averaging window: t1 = 30 ns to t2 = 60 ns, extraction of dynamic resistance using least squares fit of TLP charactertistics between IPP1 = 10 A and IPP2 = 40 A. FinalData Sheet 6 Revision 1.3, 2013-08-16 ESD5V3U2U Series Characteristics Table 2-5 Surge characteristics at TA = 25 °C, unless otherwise specified Parameter Clamping voltage Symbol VCL Values Min. Typ. Max. – 10 13 Unit Note / Test Condition V IPP = 1 A, tp=8/20 μs1) from Pin 1/2 to Pin 3 – 12 15 V IPP = 3A, tp =8/20 μs1) from Pin 1/2 to Pin 3 Forward clamping voltage VFC – 2 4 V IPP = 1 A, tp =8/20 μs1) from Pin 3 to Pin 1/2 – 4 6 V IPP = 3A, tp =8/20 μs1) from Pin 3to Pin 1/2 1) IPP according to IEC61000-4-5 FinalData Sheet 7 Revision 1.3, 2013-08-16 ESD5V3U2U Series Typical characteristics 3 Typical characteristics Typical characteristics at = 25 °C, unless otherwise specified 0.6 CL [pF] 0.4 0.2 0 0 1 2 3 4 5 VR [V] Figure 3-1 Line capacitance CL=f(VR), from pin 1/2 to 3, f = 1 MHz 0.6 0.5 0.4 0V CL [pF] 5.3V 0.3 0.2 0.1 0 0 500 1000 1500 2000 2500 3000 f [MHz] Figure 3-2 Line capacitance CL=f(f), from pin 1/2 to 3 FinalData Sheet 8 Revision 1.3, 2013-08-16 ESD5V3U2U Series Typical characteristics 0.7 0.6 CL [pF] 0.5 5.3V 0.4 0V 0.3 0.2 0.1 0 -50 -25 0 25 TA [°C] 50 75 100 Figure 3-3 Line capacitance CL=f(TA) -6 10 -7 10 -8 IR [A] 10 10-9 -10 10 -11 10 25 50 75 100 125 150 TA [°C] Figure 3-4 Reverse current IR=f(TA) , VR=5.3 V, from pin 1/2 to pin 3 FinalData Sheet 9 Revision 1.3, 2013-08-16 ESD5V3U2U Series Typical characteristics 90 80 Scope: 20 GS/s 70 VCL-max-peak = 82.2 [V] VCL [V] 60 50 VCL-30ns-peak = 17.3 [V] 40 30 20 10 0 -10 -100 0 100 200 300 400 500 tp [ns] 600 700 800 900 Figure 3-5 IEC61000-4-2: VCL = f(t), 8 kV positive pulse from pin 1 to pin 2 (R = 330 Ω, C = 150 pF) 10 0 -10 VCL [V] -20 VCL-max-peak = -76.1 [V] -30 -40 VCL-30ns-peak = -8.9 [V] -50 -60 -70 Scope: 20 GS/s -80 -90 -100 0 100 200 300 400 500 tp [ns] 600 700 800 900 Figure 3-6 IEC61000-4-2: VCL = f(t), 8 kV negative pulse from pin 1 to pin 2 (R = 330 Ω, C = 150 pF) FinalData Sheet 10 Revision 1.3, 2013-08-16 ESD5V3U2U Series VCL [V] Typical characteristics 110 100 90 80 70 60 50 40 30 20 10 0 -10 -100 Scope: 20 GS/s VCL-max-peak = 104.8 [V] VCL-30ns-peak = 24.1 [V] 0 100 200 300 400 500 tp [ns] 600 700 800 900 VCL [V] Figure 3-7 IEC61000-4-2: VCL = f(t), 15 kV positive pulse from pin 1 to pin 2 (R = 330 Ω, C = 150 pF) 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -100 VCL-max-peak = -105.1 [V] VCL-30ns-peak = -13.7 [V] Scope: 20 GS/s 0 100 200 300 400 500 tp [ns] 600 700 800 900 Figure 3-8 IEC61000-4-2: VCL = f(t), 15 kV negative pulse from pin 1 to pin 2 (R = 330 Ω, C = 150 pF) FinalData Sheet 11 Revision 1.3, 2013-08-16 ESD5V3U2U Series Typical characteristics 40 ESD5V3U2U-03LRH (Pin 1/2 to Pin 3) RDYN 30 15 RDYN = 0.58 Ω 25 ITLP [A] 17.5 12.5 20 10 15 7.5 10 5 5 2.5 0 0 -5 -2.5 -10 -5 -15 -7.5 -20 -10 -25 RDYN = 0.41 Ω Equivalent VIEC 61000-4-2 [kV] 35 20 -12.5 -30 -15 -35 -17.5 -40 -20 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 35 40 VTLP [V] Figure 3-9 Clamping voltage (TLP): ITLP = f(VTLP) according ANSI/ESD STM5.5.1- Electrostatic Dischange Sensitivity Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z0 = 50 Ω, tp = 100 ns, tr = 0.6 ns, ITLP and VTLP averaging window: t1 = 30 ns to t2 = 60 ns, extraction of dynamic resistance using squares fit to ELP charactersistic between ITLP1 = 10 A and ITLP2 = 30 A. Please refer to Application Note AN210 [1] FinalData Sheet 12 Revision 1.3, 2013-08-16 ESD5V3U2U Series Application Information 4 Application Information Application_ESD5V3U2U_2 lines uni-directional.vsd Figure 4-1 2 lines, uni-directional TVS protection Application_ESD5V3U2U_1 line bi-directional.vsd Figure 4-2 1 line, bi-directional TVS protection FinalData Sheet 13 Revision 1.3, 2013-08-16 ESD5V3U2U Series Ordering information scheme (examples) 5 ESD Ordering information scheme (examples) 0P1 RF - XX YY Package XX = Pin number (i.e.: 02 = 2 pins; 03 = 3 pins) YY = Package family: LS = TSSLP LRH = TSLP For Radio Frequency Applications Line Capacitance CL in pF: (i.e.: 0P1 = 0.1pF) ESD 5V3 U n U - XX YY Package or Application XX = Pin number (i.e.: 02 = 2 pins; 03 = 3 pins) YY = Package family: LS = TSSLP LRH = TSLP S = SOT363 U = SC74 XX = Application family: LC = Low Clamp HDMI Uni- / Bi-directional or Rail to Rail protection Number of protected lines (i.e.: 1 = 1 line; 4 = 4 lines) Capacitance: Standard (>10pF), Low (<10pF), Ultra-low (<1pF) Maximum working voltage VRWM in V: (i.e.: 5V3 = 5.3V) Figure 5-1 Ordering Information Scheme FinalData Sheet 14 Revision 1.3, 2013-08-16 ESD5V3U2U Series Package Information 6 Package Information 6.1 PG-TSFP-3-1 0.2 ±0.05 0.55 ±0.04 1 1.2 ±0.05 0.2 ±0.05 3 2 0.2 ±0.05 0.8 ±0.05 1.2 ±0.05 0.15 ±0.05 0.4 ±0.05 0.4 ±0.05 TSFP-3-1, -2-PO V06 Figure 6-1 PG-TSFP-3-1: Package Overview 1.05 0.45 0.4 0.4 0.4 TSFP-3-1, -2-FP V06 Figure 6-2 PG-TSFP-3-1: Footprint 4 0.2 Pin 1 1.5 8 1.2 0.3 0.7 1.35 Figure 6-3 PG-TSFP-3-1: Packing Figure 6-4 PG-TSFP-3-1: Marking (example) FinalData Sheet 15 Revision 1.3, 2013-08-16 ESD5V3U2U Series Package Information PG-TSLP-3-7 Bottom view 0.39 +0.01 -0.03 0.25 ±0.035 1) Top view 0.6 ±0.05 3 2 1 ±0.05 0.65 ±0.05 1) 1 1) 0.05 MAX. 0.5 ±0.035 0.35 ±0.05 Pin 1 marking 2 x 0.15 ±0.035 2 x 0.25 ±0.035 6.2 1) 1) Dimension applies to plated terminal TSLP-3-7-PO V02 R0.1 0.2 0.225 0.2 0.225 0.315 0.35 1 0.3 0.945 0.35 0.45 0.355 0.6 0.275 Figure 6-5 PG-TSLP-3-7: Package Overview 0.17 0.15 Copper Solder mask Stencil apertures Figure 6-6 PG-TSLP-3-7: Footprint 0.5 Pin 1 marking 8 1.16 4 0.76 TSLP-3-7-TP V03 Figure 6-7 PG-TSLP-3-7: Packing Type code Pin 1 marking Laser marking TSLP-3-7-MK V02 Figure 6-8 PG-TSLP-3-7: Marking (example) FinalData Sheet 16 Revision 1.3, 2013-08-16 ESD5V3U2U Series References References [1] Infineon Technologie AG - Application Note AN210: Effective ESD Protection Design at System Level Using VF-TLP Characterization Methodology FinalData Sheet 17 Revision 1.3, 2013-08-16 w w w . i n f i n e o n . c o m Published by Infineon Technologies AG