INTERSIL CD3086

CA3086
General Purpose NPN
Transistor Array
November 1996
Applications
Description
• Three Isolated Transistors and One Differentially
Connected Transistor Pair For Low-Power Applications
from DC to 120MHz
The CA3086 consists of five general-purpose silicon NPN
transistors on a common monolithic substrate. Two of the
transistors are internally connected to form a differentially
connected pair.
• General-Purpose Use in Signal Processing Systems
Operating in the DC to 190MHz Range
• Temperature Compensated Amplifiers
• See Application Note, AN5296 “Application of the
CA3018 Integrated-Circuit Transistor Array” for
Suggested Applications
Ordering Information
PART NUMBER
(BRAND)
TEMP.
RANGE (oC)
PACKAGE
The transistors of the CA3086 are well suited to a wide variety of applications in low-power systems at frequencies from
DC to 120MHz. They may be used as discrete transistors in
conventional circuits. However, they also provide the very
significant inherent advantages unique to integrated circuits,
such as compactness, ease of physical handling and thermal matching
PKG.
NO.
CA3086
-55 to 125
14 Ld PDIP
E14.3
CA3086M
(3086)
-55 to 125
14 Ld SOIC
M14.15
CA3086M96
(3086)
-55 to 125
14 Ld SOIC Tape
and Reel
M14.15
CA3086F
-55 to 125
14 Ld CERDIP
F14.3
Pinout
CA3086
(PDIP, CERDIP, SOIC)
TOP VIEW
1
14
Q5
2
13 SUBSTRATE
Q1
3
12
Q2
4
11
Q4
5
10
6
9
Q3
7
8
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
5-27
File Number
483.3
CA3086
Absolute Maximum Ratings
Thermal Information
The following ratings apply for each transistor in the device:
Collector-to-Emitter Voltage, VCEO . . . . . . . . . . . . . . . . . . . . . 15V
Collector-to-Base Voltage, VCBO . . . . . . . . . . . . . . . . . . . . . . 20V
Collector-to-Substrate Voltage, VCIO (Note 1) . . . . . . . . . . . . 20V
Emitter-to-Base Voltage, VEBO . . . . . . . . . . . . . . . . . . . . . . . . . 5V
Collector Current, IC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Thermal Resistance (Typical, Note 2)
θJA (oC/W) θJC (oC/W)
CERDIP Package . . . . . . . . . . . . . . . .
150
75
PDIP Package . . . . . . . . . . . . . . . . . . .
180
N/A
SOIC Package . . . . . . . . . . . . . . . . . . .
220
N/A
Maximum Power Dissipation (Any one transistor). . . . . . . . . 300mW
Maximum Junction Temperature (Hermetic Packages) . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The collector of each transistor in the CA3086 is isolated from the substrate by an integral diode. The substrate (Terminal 13) must be
connected to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor
action. To avoid undesirable coupling between transistors, the substrate (Terminal 13) should be maintained at either DC or signal (AC)
ground. A suitable bypass capacitor can be used to establish a signal ground.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
TA = 25oC, For Equipment Design
Electrical Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Collector-to-Base Breakdown Voltage
V(BR)CBO
lC = 10µA, IE = 0
20
60
-
V
Collector-to-Emitter Breakdown Voltage
V(BR)CEO
IC = 1mA, IB = 0
15
24
-
V
Collector-to-Substrate Breakdown Voltage
V(BR)ClO
IC = 10µA, ICI = 0
20
60
-
V
Emitter-to-Base Breakdown Voltage
V(BR)EBO
IE = 10µA, IC = 0
5
7
-
V
Collector-Cutoff Current (Figure 1)
ICBO
VCB = 10V, IE = 0,
-
0.002
100
nA
Collector-Cutoff Current (Figure 2)
ICEO
VCE = 10V, IB = 0,
-
(Figure 2)
5
µA
DC Forward-Current Transfer Ratio (Figure 3)
hFE
VCE = 3V, IC = 1mA
40
100
-
Electrical Specifications
TA = 25oC, Typical Values Intended Only for Design Guidance
PARAMETER
DC Forward-Current Transfer Ratio
(Figure 3)
Base-to-Emitter Voltage (Figure 4)
SYMBOL
hFE
VBE
TEST CONDITIONS
VCE = 3V
VCE = 3V
TYPICAL
VALUES
UNITS
IC = 10mA
100
IC = 10µA
54
IE = 1 mA
0.715
V
IE = 10mA
0.800
V
VBE Temperature Coefficient (Figure 5)
∆VBE/∆T
VCE = 3V, lC = 1 mA
-1.9
mV/oC
Collector-to-Emitter
Saturation Voltage
VCE SAT
IB = 1mA, IC = 10mA
0.23
V
f = 1kHz, VCE = 3V, IC = 100µA,
RS = 1kΩ
3.25
dB
Noise Figure (Low Frequency)
NF
5-28
CA3086
Electrical Specifications
TA = 25oC, Typical Values Intended Only for Design Guidance (Continued)
PARAMETER
SYMBOL
Low-Frequency, Small-Signal EquivalentCircuit Characteristics:
TEST CONDITIONS
TYPICAL
VALUES
UNITS
f = 1kHz,VCE = 3V, IC = 1mA
Forward Current-Transfer Ratio
(Figure 6)
hFE
100
-
Short-Circuit Input Impedance
(Figure 6)
hIE
3.5
kΩ
Open-Circuit Output Impedance
(Figure 6)
hOE
15.6
µS
Open-Circuit Reverse-Voltage
Transfer Ratio (Figure 6)
hRE
1.8 X 10-4
-
Admittance Characteristics:
f = 1MHz,VCE = 3V, lC = 1mA
Forward Transfer Admittance
(Figure 7)
yFE
31 - j1.5
mS
Input Admittance (Figure 8)
yIE
0.3 + j0.04
mS
Output Admittance (Figure 9)
yOE
0.001 + j0.03
mS
Reverse Transfer Admittance
(Figure 10)
yRE
See Figure 10
-
Gain-Bandwidth Product (Figure 11)
fT
VCE = 3V, IC = 3mA
550
MHz
Emitter-to-Base Capacitance
CEBO
VEB = 3V, IE = 0
0.6
pF
Collector-to-Base Capacitance
CCBO
VCB = 3V, IC = 0
0.58
pF
Collector-to-Substrate Capacitance
CClO
VC l = 3V, IC = 0
2.8
pF
Typical Performance Curves
103
IE = 0
COLLECTOR CUTOFF CURRENT (nA)
COLLECTOR CUTOFF CURRENT (nA)
102
10
VCB = 15V
VCB = 10V
VCB = 5V
1
10-1
10-2
10-3
10-4
IB = 0
102
VCE = 10V
10
VCE = 5V
1
10-1
10-2
10-3
0
25
50
75
100
0
125
TEMPERATURE (oC)
FIGURE 1. ICBO vs TEMPERATURE
25
50
75
TEMPERATURE (oC)
100
FIGURE 2. ICEO vs TEMPERATURE
5-29
125
CA3086
Typical Performance Curves
(Continued)
0.8
VCE = 3V
TA = 25oC
110
hFE
BASE-TO-EMITTER VOLTAGE (V)
STATIC FORWARD CURRENT
TRANSFER RATIO (hFE)
120
100
90
80
70
60
0.1
1
0.7
VBE
0.6
0.5
0.4
0.01
50
0.01
VCE = 3V
TA = 25oC
10
0.1
1.0
EMITTER CURRENT (mA)
EMITTER CURRENT (mA)
FIGURE 3. hFE vs IE
FIGURE 4. VBE vs IE
100
NORMALIZED h PARAMETERS
BASE-TO-EMITTER VOLTAGE (V)
VCB = 3V
0.9
0.8
0.7
IE = 3mA
0.6
IE = 1mA
IE = 0.5mA
0.5
VCE = 3V
f = 1kHz
TA = 25oC
hFE = 100
hIE = 3.5kΩ
hRE = 1.88 x 10-4
hOE = 15.6µS
hIE
10
hOE
AT
1mA
hRE
hFE
1.0
hRE
hIE
0.4
-75
-50
-25
0
25
50
75
100
0.1
0.01
125
0.1
1.0
COLLECTOR CURRENT (mA)
TEMPERATURE (oC)
FIGURE 5. VBE vs TEMPERATURE
40
6
COMMON EMITTER CIRCUIT, BASE INPUT
TA = 25oC, VCE = 3V, IC = 1mA
30
gFE
20
10
0
bFE
-10
10
FIGURE 6. NORMALIZED hFE, hIE, hRE, hOE vs IC
INPUT CONDUCTANCE (gIE)
AND SUSCEPTANCE (bIE) (mS)
FORWARD TRANSFER CONDUCTANCE (gFE)
AND SUSCEPTANCE (bFE) (mS)
10
5
COMMON EMITTER CIRCUIT, BASE INPUT
TA = 25oC, VCE = 3V, IC = 1mA
4
3
bIE
2
gIE
1
0
-20
0.1
1
10
FREQUENCY (MHz)
100
0.1
FIGURE 7. yFE vs FREQUENCY
1
10
FREQUENCY (MHz)
FIGURE 8. yIE vs FREQUENCY
5-30
100
CA3086
Typical Performance Curves
REVERSE TRANSFER CONDUCTANCE (gRE)
AND SUSCEPTANCE (bRE) (mS)
OUTPUT CONDUCTANCE (gOE)
AND SUSCEPTANCE (bOE) (mS)
6
(Continued)
COMMON EMITTER CIRCUIT, BASE INPUT
TA = 25oC, VCE = 3V, IC = 1mA
5
4
bOE
3
2
1
gOE
0
0.1
1
10
FREQUENCY (MHz)
COMMON EMITTER CIRCUIT, BASE INPUT
TA = 25oC, VCE = 3V, IC = 1mA
gRE IS SMALL AT FREQUENCIES
LESS THAN 500MHz
0
bRE
-0.5
-1.0
-1.5
-2.0
100
1
FIGURE 9. yOE vs FREQUENCY
10
FREQUENCY (MHz)
100
FIGURE 10. yRE vs FREQUENCY
GAIN BANDWIDTH PRODUCT (MHz)
VCE = 3V
TA = 25oC
1000
900
800
700
600
500
400
300
200
100
0
0
1
2
3
4
5
6
7
8
9
10
COLLECTOR CURRENT (mA)
FIGURE 11. fT vs IC
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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