TSM680P06_F15.pdf

TSM680P06
Taiwan Semiconductor
P-Channel Power MOSFET
-60V, -18A, 68mΩ
FEATURES
KEY PERFORMANCE PARAMETERS
●
Improved dV/dt capability
●
Fast switching
●
100% Eas Guaranteed
●
Pb-free plating
●
RoHS compliant
●
Halogen-free mold compound
PARAMETER
VALUE
UNIT
VDS
-60
V
RDS(on) (max)
VGS = -10V
68
VGS = -4.5V
110
mΩ
Qg
16.4
nC
APPLICATION
●
Motor Drive
●
Power Tools
●
LED Lighting
TO-220
ITO-220
TO-251S (IPAK SL)
TO-252 (DPAK)
Notes: Moisture sensitivity level: level 3. Per J-STD-020
ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
PARAMETER
SYMBOL IPAK/DPAK ITO-220 TO-220 UNIT
Drain-Source Voltage
VDS
-60
V
Gate-Source Voltage
VGS
±20
V
Continuous Drain Current
Pulsed Drain Current
-18
TC = 25°C
(Note 1)
ID
TC = 100°C
(Note 2)
IDM
Total Power Dissipation @ TC = 25°C
PDTOT
A
-11
-72
20
A
17
42
W
Single Pulsed Avalanche Energy
(Note 3)
EAS
12.8
mJ
Single Pulsed Avalanche Current
(Note 3)
IAS
-16
A
TJ, TSTG
- 55 to +150
°C
Operating Junction and Storage Temperature Range
THERMAL PERFORMANCE
PARAMETER
SYMBOL IPAK/DPAK ITO-220 TO-220 UNIT
Junction to Case Thermal Resistance
RӨJC
Junction to Ambient Thermal Resistance
RӨJA
6.1
7.5
62
3
°C/W
°C/W
Notes: RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined
at the solder mounting surface of the drain pins. RӨJA is guaranteed by design while RӨCA is determined by the user’s board
design. RӨJA shown below for single device operation on FR-4 PCB in still air.
Document Number: DS_P0000127
1
Version: F15
TSM680P06
Taiwan Semiconductor
ELECTRICAL SPECIFICATIONS (TC = 25°C unless otherwise noted)
PARAMETER
Static
CONDITIONS
SYMBOL
MIN
TYP
MAX
UNIT
(Note 4)
Drain-Source Breakdown Voltage
VGS = 0V, ID = -250µA
BVDSS
-60
--
--
V
Gate Threshold Voltage
VDS = VGS, ID = -250µA
VGS(TH)
-1.2
-1.6
-2.2
V
Gate Body Leakage
VGS = ±20V, VDS = 0V
IGSS
--
--
±100
nA
--
--
-1
--
--
-10
--
54
68
--
72
110
gfs
--
8.5
--
Qg
--
16.4
--
Qgs
--
2.8
--
Qgd
--
3.6
--
Ciss
--
870
--
Coss
--
70
--
Crss
--
42
--
Rg
--
16
--
td(on)
--
8.3
--
tr
--
29.6
--
td(off)
--
51.7
--
tf
--
15.6
--
VSD
--
--
-1
V
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
VDS = -60V, VGS = 0V
VDS = -48V, TC = 125°C
VGS = -10V, ID = -6A
VGS = -4.5V, ID = -3A
VDS = -10V, ID = -6A
IDSS
RDS(on)
µA
mΩ
S
(Note 5)
Total Gate Charge
VDS = -30V, ID = -6A,
Gate-Source Charge
VGS = -10V
Gate-Drain Charge
Input Capacitance
VDS = -30V, VGS = 0V,
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Switching
f = 1.0MHz
F = 1MHz, open drain
nC
pF
Ω
(Note 6)
Turn-On Delay Time
VDD = -30V,
Turn-On Rise Time
RGEN = 6Ω,
Turn-Off Delay Time
ID = -1A
Turn-Off Fall Time
Source-Drain Diode
ns
(Note 3)
Forward On Voltage
IS = -1A, VGS = 0V
Reverse Recovery Time
IS =1A
trr
--
20
--
ns
Reverse Recovery Charge
dIF/dt = 100A/µs
Qrr
--
10
--
nC
Integral reverse diode
IS
--
--
-13
A
ISM
--
--
-52
A
Maximum Continuous Forward
Current
Maximum Pulse Forward Current
in the MOSFET
Notes:
1.
Current limited by package
2.
Pulse width limited by the maximum junction temperature
3.
L = 0.1mH, IAS = -16A, VDD = -25V, RG = 25Ω, Starting TJ = 25 C
4.
Pulse test: PW ≤ 300µs, duty cycle ≤ 2%
5.
For DESIGN AID ONLY, not subject to production testing.
6.
Switching time is essentially independent of operating temperature.
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Document Number: DS_P0000127
2
Version: F15
TSM680P06
Taiwan Semiconductor
ORDERING INFORMATION
PART NO.
PACKAGE
PACKING
TSM680P06CZ C0G
TO-220
50pcs / Tube
TSM680P06CI C0G
ITO-220
50pcs / Tube
TSM680P06CH C5G
TSM680P06CP ROG
TO-251S (IPAK SL)
75pcs / Tube
TO-252 (DPAK)
2,500pcs / 13” Reel
Note:
1. Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC
2. Halogen-free according to IEC 61249-2-21 definition
Document Number: DS_P0000127
3
Version: F15
TSM680P06
Taiwan Semiconductor
CHARACTERISTICS CURVES
(TC = 25°C unless otherwise noted)
Normalized Rds(on) vs. Tj
Normalized On Resistance (mΩ)
-ID, Continuous Drain Current (A)
Continuous Drain Current vs. Tc
TC, Case Temperature (°C)
TJ, Junction Temperature (°C)
Gate Charge Waveform
-VGS, Gate to Source Voltage (V)
Normalized Gate Threshold Voltage (V)
Normalized Vth vs. Tj
Qg, Gate Charge (nC)
TJ, Junction Temperature (°C)
Maximum Safe Operation Area (TO-251S)
-ID, Continuous Drain Current (A)
Normalized Thermal Response
Normalized Transient Impedance (TO-251S)
Square Wave Pulse Duration (s)
Document Number: DS_P0000127
4
-VDS, Drain to Source Voltage (V)
Version: F15
TSM680P06
Taiwan Semiconductor
CHARACTERISTICS CURVES
(TC = 25°C unless otherwise noted)
Maximum Safe Operation Area (TO-252)
-ID, Continuous Drain Current (A)
Normalized Thermal Response
Normalized Transient Impedance (TO-252)
Square Wave Pulse Duration (s)
-VDS, Drain to Source Voltage (V)
Maximum Safe Operation Area (TO-220)
-ID, Continuous Drain Current (A)
Normalized Thermal Response (RθJC)
Normalized Transient Impedance (TO-220)
Square Wave Pulse Duration (s)
-VDS, Drain to Source Voltage (V)
Maximum Safe Operation Area (ITO-220)
-ID, Continuous Drain Current (A)
Normalized Thermal Response (RθJC)
Normalized Transient Impedance (ITO-220)
Square Wave Pulse Duration (s)
Document Number: DS_P0000127
-VDS, Drain to Source Voltage (V)
5
Version: F15
TSM680P06
Taiwan Semiconductor
PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters)
TO-220
MARKING DIAGRAM
G
Y
WW
F
= Halogen Free
= Year Code
= Week Code (01~52)
= Factory Code
Document Number: DS_P0000127
6
Version: F15
TSM680P06
Taiwan Semiconductor
PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters)
ITO-220
MARKING DIAGRAM
G
Y
WW
F
= Halogen Free
= Year Code
= Week Code (01~52)
= Factory Code
Document Number: DS_P0000127
7
Version: F15
TSM680P06
Taiwan Semiconductor
PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters)
TO-251S
MARKING DIAGRAM
Y = Year Code
M = Month Code for Halogen Free Product
O =Jan P =Feb Q =Mar R =Apr
S =May T =Jun U =Jul
V =Aug
W =Sep X =Oct
Y =Nov Z =Dec
L = Lot Code (1~9, A~Z)
Document Number: DS_P0000127
8
Version: F15
TSM680P06
Taiwan Semiconductor
PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters)
TO-252
SUGGESTED PAD LAYOUT
MARKING DIAGRAM
Y = Year Code
M = Month Code for Halogen Free Product
O =Jan P =Feb Q =Mar R =Apr
S =May T =Jun U =Jul
V =Aug
W =Sep X =Oct
Y =Nov Z =Dec
L = Lot Code (1~9, A~Z)
Document Number: DS_P0000127
9
Version: F15
TSM680P06
Taiwan Semiconductor
Notice
Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf,
assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, to
any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of
sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty,
relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose,
merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify TSC for any damages resulting from such improper use or sale.
Document Number: DS_P0000127
10
Version: F15