TSM4NB60 Taiwan Semiconductor N-Channel Power MOSFET 600V, 4.0A, 2.5Ω FEATURES KEY PERFORMANCE PARAMETERS ● 100% Avalanche Tested ● Pb-free plating ● Compliant to RoHS Directive 2011/65/EU and in PARAMETER VALUE UNIT VDS 600 V RDS(on) (max) 2.5 Ω Qg 14.5 nC accordance to WEE 2002/96/EC ● Halogen-free according to IEC 61249-2-21 definition APPLICATION ● Power Supply ● Lighting TO-220 ITO-220 TO-251 (IPAK) TO-251S (IPAK SL) TO-252 (DPAK) Notes: Moisture sensitivity level: level 3. Per J-STD-020 ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted) PARAMETER SYMBOL IPAK/DPAK ITO-220 TO-220 UNIT Drain-Source Voltage VDS 600 V Gate-Source Voltage VGS ±30 V Continuous Drain Current Pulsed Drain Current TC = 25°C (Note 1) 4.0 ID TC = 100°C (Note 2) IDM Total Power Dissipation @ TC = 25°C PDTOT A 2.4 16 50 A 25 70 W Single Pulsed Avalanche Energy (Note 3) EAS 70 mJ Single Pulsed Avalanche Current (Note 3) IAS 4 A EAR 5 mJ dV/dt 4.5 V/ns TJ, TSTG - 55 to +150 °C Repetitive Avalanche Energy Peak Diode Recovery (Note 2) (Note 4) Operating Junction and Storage Temperature Range THERMAL PERFORMANCE PARAMETER SYMBOL IPAK/DPAK ITO-220 TO-220 UNIT Junction to Case Thermal Resistance RӨJC 2.5 5 1.78 °C/W Junction to Ambient Thermal Resistance RӨJA 83 62.5 62.5 °C/W Notes: RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined at the solder mounting surface of the drain pins. R ӨJA is guaranteed by design while RӨCA is determined by the user’s board design. RӨJA shown below for single device operation on FR-4 PCB in still air. Document Number: DS_P0000111 1 Version: I15 TSM4NB60 Taiwan Semiconductor ELECTRICAL SPECIFICATIONS (TA = 25°C unless otherwise noted) PARAMETER Static CONDITIONS SYMBOL MIN TYP MAX UNIT (Note 5) Drain-Source Breakdown Voltage VGS = 0V, ID = 250µA BVDSS 600 -- -- V Gate Threshold Voltage VDS = VGS, ID = 250µA VGS(TH) 2.5 3.5 4.5 V Gate Body Leakage VGS = ±30V, VDS = 0V IGSS -- -- ±100 nA Zero Gate Voltage Drain Current VDS = 600V, VGS = 0V IDSS -- -- 1 µA Drain-Source On-State Resistance VGS = 10V, ID = 2.0A RDS(on) -- 2.2 2.5 Ω Forward Transfer Conductance VDS = 40V, ID = 2A gfs -- 2.6 -- S Qg -- 14.5 -- Qgs -- 3.4 -- Qgd -- 7 -- Ciss -- 500 -- Coss -- 53.2 -- Crss -- 7 -- td(on) -- 11 -- tr -- 20 -- td(off) -- 30 -- tf -- 19 -- VSD -- -- 1.13 V Dynamic (Note 6) Total Gate Charge VDS = 480V, ID = 4.0A, Gate-Source Charge VGS = 10V Gate-Drain Charge Input Capacitance VDS = 25V, VGS = 0V, Output Capacitance Reverse Transfer Capacitance Switching f = 1.0MHz nC pF (Note 7) Turn-On Delay Time VDD = 300V, Turn-On Rise Time RGEN = 25Ω, Turn-Off Delay Time ID = 4.0A, VGS = 10V, Turn-Off Fall Time Source-Drain Diode ns (Note 5) Forward On Voltage IS = 4.0A, VGS = 0V Reverse Recovery Time VGS=0V, IS = 2A trr -- 522 -- ns Reverse Recovery Charge dIF/dt = 100A/μs Qrr -- 1.6 -- μC Source Current Integral reverse diode IS -- -- 4 A Source Current (Pulse) in the MOSFET ISM -- -- 16 A Notes: 1. Current limited by package. 2. Pulse width limited by the maximum junction temperature. 3. L = 8mH, IAS = 4.0A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C. 100% Eas Test Condition: L = 8mH, IAS = 2A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C 4. ISD ≤ 4A, dI/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C. 5. Pulse test: PW ≤ 300µs, duty cycle ≤ 2%. 6. For DESIGN AID ONLY, not subject to production testing. 7. Switching time is essentially independent of operating temperature. Document Number: DS_P0000111 2 Version: I15 TSM4NB60 Taiwan Semiconductor ORDERING INFORMATION PART NO. PACKAGE PACKING TSM4NB60CZ C0G TO-220 50pcs / Tube TSM4NB60CI C0G TSM4NB60CH C5G ITO-220 50pcs / Tube TO-251 (IPAK) 75pcs / Tube TSM4NB60CH X0G TO-251S (IPAK SL) 75pcs / Tube TSM4NB60CP ROG TO-252 (DPAK) 2,500pcs / 13” Reel Document Number: DS_P0000111 3 Version: I15 TSM4NB60 Taiwan Semiconductor CHARACTERISTICS CURVES (TC = 25°C unless otherwise noted) Output Characteristics Transfer Characteristics On-Resistance vs. Drain Current Gate Charge On-Resistance vs. Junction Temperature Source-Drain Diode Forward Voltage Document Number: DS_P0000111 4 Version: I15 TSM4NB60 Taiwan Semiconductor CHARACTERISTICS CURVES (TC = 25°C unless otherwise noted) Breakdown Voltage vs. Temperature Threshold Voltage vs. Temperature Maximum Safe Operating Area Document Number: DS_P0000111 5 Version: I15 TSM4NB60 Taiwan Semiconductor ELECTRICAL CHARACTERISTICS CURVES (TC = 25°C unless otherwise noted) Normalized Effective Transient Thermal Impedance Normalized Thermal Transient Impedance, Junction-to-Case (TO-220) 101 100 10-1 Duty=0.5 Duty=0.2 Duty=0.1 Duty=0.05 Duty=0.02 Duty=0.01 Single pulse 10-2 10-3 10-4 10-6 10-5 10-4 10-3 10-2 10-1 100 Square Wave Pulse Duration (s) Normalized Effective Transient Thermal Impedance Normalized Thermal Transient Impedance, Junction-to-Case (ITO-220) 10 1 100 10-1 Duty=0.5 Duty=0.2 Duty=0.1 Duty=0.05 Duty=0.02 Duty=0.01 Single pulse 10-2 10-3 10-4 10-6 10-5 10-4 10-3 10-2 10-1 100 Square Wave Pulse Duration (s) Normalized Effective Transient Thermal Impedance Normalized Thermal Transient Impedance, Junction-to-Case (DPAK/IPAK) 10 1 100 10-1 Duty=0.5 Duty=0.2 Duty=0.1 Duty=0.05 Duty=0.02 Duty=0.01 Single pulse 10-2 10-3 10-4 10-6 10-5 10-4 10-3 10-2 10-1 100 Square Wave Pulse Duration (s) Document Number: DS_P0000111 6 Version: I15 TSM4NB60 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) TO-220 MARKING DIAGRAM Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr S =May T =Jun U =Jul V =Aug W =Sep X =Oct Y =Nov Z =Dec L = Lot Code (1~9, A~Z) Document Number: DS_P0000111 7 Version: I15 TSM4NB60 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) ITO-220 MARKING DIAGRAM G Y WW F = Halogen Free = Year Code = Week Code (01~52) = Factory Code Document Number: DS_P0000111 8 Version: I15 TSM4NB60 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) TO-251 MARKING DIAGRAM Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr S =May T =Jun U =Jul V =Aug W =Sep X =Oct Y =Nov Z =Dec L = Lot Code (1~9, A~Z) Document Number: DS_P0000111 9 Version: I15 TSM4NB60 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) TO-251S MARKING DIAGRAM Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr S =May T =Jun U =Jul V =Aug W =Sep X =Oct Y =Nov Z =Dec L = Lot Code (1~9, A~Z) Document Number: DS_P0000111 10 Version: I15 TSM4NB60 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) TO-252 SUGGESTED PAD LAYOUT (Unit: Millimeters) MARKING DIAGRAM Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr S =May T =Jun U =Jul V =Aug W =Sep X =Oct Y =Nov Z =Dec L = Lot Code (1~9, A~Z) Document Number: DS_P0000111 11 Version: I15 TSM4NB60 Taiwan Semiconductor Notice Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, to any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify TSC for any damages resulting from such improper use or sale. Document Number: DS_P0000111 12 Version: I15