Si5411EDU www.vishay.com Vishay Siliconix P-Channel 12 V (D-S) MOSFET FEATURES PRODUCT SUMMARY VDS (V) - 12 RDS(on) () (Max.) ID (A) 0.0082 at VGS = - 4.5 V - 25a 0.0094 at VGS = - 3.7 V - 25a 0.0117 at VGS = - 2.5 V - 25a 0.0206 at VGS = - 1.8 V - 15 Qg (Typ.) 43 nC PowerPAK ChipFET Single APPLICATIONS 1 2 D 4 D D 8 G D 7 S 6 S 5 1.9 S • Portable Devices such as Smart Phones, Tablet PCs and Mobile Computing - Battery Switch - Load Switch - Power Management 3 D D • TrenchFET® Power MOSFET • Thermally Enhanced PowerPAK® ChipFET Package - Small Footprint Area - Low On-Resistance • 100 % Rg and UIS Tested • Typical ESD Protection: 5000 V (HBM) • Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 mm G Marking Code LB Bottom View Ordering Information: Si5411EDU-T1-GE3 (Lead (Pb)-free and Halogen-free) XXX Lot Traceability and Date Code D P-Channel MOSFET Part # Code ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) Parameter Symbol Limit Drain-Source Voltage VDS - 12 Gate-Source Voltage VGS ±8 Continuous Drain Current (TJ = 150 °C) TA = 25 °C - 25a ID - 16.5b, c - 13b, c TA = 70 °C Pulsed Drain Current (t = 100 μs) Continuous Source-Drain Diode Current Single Avalanche Current Single Avalanche Energy IDM TC = 25 °C TA = 25 °C L = 0.1 mH TC = 70 °C TA = 25 °C - 25a IS - 2.6b, c IAS - 15 EAS 11 mJ 31 20 PD W 3.1b, c 2b, c TA = 70 °C Operating Junction and Storage Temperature Range A - 140 TC = 25 °C Maximum Power Dissipation V - 25a TC = 25 °C TC = 70 °C Unit TJ, Tstg - 50 to 150 Soldering Recommendations (Peak Temperature)d, e °C 260 THERMAL RESISTANCE RATINGS Parameter Maximum Junction-to-Ambientb, f Maximum Junction-to-Case (Drain) Symbol Typical Maximum t5s RthJA 34 40 Steady State RthJC 3 4 Unit °C/W Notes a. Package limited. b. Surface mounted on 1" x 1" FR4 board. c. t = 5 s. d. See solder profile (www.vishay.com/doc?73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 90 °C/W. S13-1662-Rev. A, 29-Jul-13 Document Number: 62879 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si5411EDU www.vishay.com Vishay Siliconix SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) Parameter Symbol Test Conditions Min. VDS VGS = 0 V, ID = - 250 μA - 12 Typ. Max. Unit Static Drain-Source Breakdown Voltage VDS/TJ VDS Temperature Coefficient VGS(th) Temperature Coefficient VGS(th)/TJ ID = - 250 μA Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = - 250 μA Gate-Source Leakage IGSS Zero Gate Voltage Drain Current IDSS On-State Drain Currenta ID(on) Drain-Source On-State Resistancea Forward Transconductancea V -5 - 0.4 - 0.9 VDS = 0 V, VGS = ± 8 V ±2 VDS = 0 V, VGS = ± 4.5 V ± 0.2 VDS = - 12 V, VGS = 0 V -1 VDS = - 12 V, VGS = 0 V, TJ = 55 °C VDS - 5 V, VGS = - 4.5 V RDS(on) gfs mV/°C 1.8 V μA - 10 - 10 A VGS = - 4.5 V, ID = - 6 A 0.0066 0.0082 VGS = - 3.7 V, ID = - 5 A 0.0073 0.0094 VGS = - 2.5 V, ID = - 5 A 0.0095 0.0117 VGS = - 1.8 V, ID = - 2 A 0.0155 0.0206 VGS = - 6 V, ID = - 6 A 45 S Dynamicb Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Gate Resistance Rg Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time 4100 VDS = - 6 V, VGS = 0 V, f = 1 MHz tr pF 870 VDS = - 6 V, VGS = - 8 V, ID = - 15 A VDS = - 6 V, VGS = - 4.5 V, ID = - 15 A 70 105 43 65 5.5 nC 10.5 f = 1 MHz td(on) td(off) 860 VDD = - 6 V, RL = 0.6 ID - 10 A, VGEN = - 4.5 V, Rg = 1 0.7 3.6 7.2 30 60 30 60 70 140 tf 35 70 td(on) 12 25 5 10 80 160 25 50 VDD = - 6 V, RL = 0.6 ID - 10 A, VGEN = - 8 V, Rg = 1 tr td(off) tf ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulse Diode Forward Current (100 μs) ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Reverse Recovery Fall Time ta Reverse Recovery Rise Time tb TC = 25 °C - 25 - 140 IS = - 10 A, VGS = 0 V IF = - 10 A, dI/dt = 100 A/μs, TJ = 25 °C A - 0.8 - 1.2 V 45 90 ns 35 70 nC 17 28 ns Notes a. Pulse test; pulse width 300 μs, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S13-1662-Rev. A, 29-Jul-13 Document Number: 62879 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si5411EDU www.vishay.com Vishay Siliconix 20.00 20 16.00 16 12.00 ID - Drain Current (A) IGSS - Gate Current (mA) TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) TJ = 25 °C 8.00 12 8 TC = 25 °C 4.00 4 0.00 0 TC = 125 °C TC = - 55 °C 0 4 8 12 16 0.0 0.3 0.6 0.9 1.2 1.5 VGS - Gate-to-Source Voltage (V) VGS - Gate-Source Voltage (V) Gate Current vs. Gate-Source Voltage Transfer Characteristics 10-2 0.050 VGS = 1.8 V 10-3 RDS(on) - On-Resistance (Ω) IGSS - Gate Current (A) 0.040 10-4 TJ = 150 °C 10-5 10-6 TJ = 25 °C -7 10 0.030 0.020 VGS = 2.5 V 0.010 VGS = 3.7 V -8 10 VGS = 4.5 V 10-9 0.000 0 4 8 12 0 16 40 60 80 100 VGS - Gate-to-Source Voltage (V) ID - Drain Current (A) Gate Current vs. Gate-Source Voltage On-Resistance vs. Drain Current and Gate Voltage 100 6000 VGS = 2.5 V VGS = 5 V thru 3 V 5000 80 Ciss C - Capacitance (pF) ID - Drain Current (A) 20 60 VGS = 2 V 40 20 4000 3000 Coss 2000 Crss 1000 VGS = 1.5 V 0 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 2 4 6 8 VDS - Drain-to-Source Voltage (V) VDS - Drain-to-Source Voltage (V) Output Characteristics Capacitance S13-1662-Rev. A, 29-Jul-13 10 12 Document Number: 62879 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si5411EDU www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 0.050 ID = 15 A ID = 6 A 0.040 VDS = 6 V 6 RDS(on) - On-Resistance (Ω) VGS - Gate-to-Source Voltage (V) 8 VDS = 3 V 4 VDS = 9.6 V 2 0.030 0.020 TJ = 125 °C 0.010 TJ = 25 °C 0.000 0 0 20 40 60 0 80 1 Qg - Total Gate Charge (nC) 4 5 On-Resistance vs. Gate-to-Source Voltage 1.5 0.60 1.4 0.55 VGS = 4.5 V; ID = 6A VGS = 3.7 V; ID = 5A 1.3 0.50 VGS = 2.5 V; ID = 5A 1.2 0.45 1.1 VGS = 1.8 V; ID = 2 A 1.0 VGS(th) (V) RDS(on) - On-Resistance (Normalized) 3 VGS - Gate-to-Source Voltage (V) Gate Charge 0.40 ID = 250 μA 0.35 0.9 0.30 0.8 0.25 0.20 0.7 - 50 - 25 0 25 50 75 100 125 - 50 150 - 25 TJ - Junction Temperature (°C) 0 25 50 75 100 125 150 TJ - Temperature (°C) On-Resistance vs. Junction Temperature Threshold Voltage 50 100 TJ = 150 °C 40 10 Power (W) IS - Source Current (A) 2 TJ = 25 °C 30 20 1 10 0.1 0.0 0.2 0.4 0.6 0.8 1.0 VSD - Source-to-Drain Voltage (V) Soure-Drain Diode Forward Voltage S13-1662-Rev. A, 29-Jul-13 1.2 0 0.001 0.01 0.1 1 10 100 1000 Time (s) Single Pulse Power, Junction-to-Ambient Document Number: 62879 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si5411EDU www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 1000 Limited by RDS(on)* 100 ID - Drain Current (A) 100 µs 10 1 ms 10 ms 1 100 ms 10 s 1s DC TA = 25 °C 0.1 BVDSS Limited 0.01 0.1 1 10 100 VDS - Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Safe Operating Area, Junction-to-Ambient 35 60 30 Power Dissipation (W) ID - Drain Current (A) 50 40 30 Package Limited 20 10 25 20 15 10 5 0 0 0 25 50 75 100 TC - Case Temperature (°C) Current Derating* 125 150 25 50 75 100 125 150 TC - Case Temperature (°C) Power Derating * The power dissipation PD is based on TJ(max.) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. S13-1662-Rev. A, 29-Jul-13 Document Number: 62879 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si5411EDU www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 Notes: 0.1 0.1 PDM 0.05 t1 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = RthJA = 90 °C/W 0.02 3. TJM - TA = PDMZthJA(t) Single Pulse 4. Surface Mounted 0.01 10-4 10-3 10-2 10-1 1 Square Wave Pulse Duration (s) 10 100 1000 Normalized Thermal Transient Impedance, Junction-to-Ambient 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.05 0.02 0.1 10-4 Single Pulse 10-3 10-2 Square Wave Pulse Duration (s) 10-1 1 Normalized Thermal Transient Impedance, Junction-to-Case Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?62879. S13-1662-Rev. A, 29-Jul-13 Document Number: 62879 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix PowerPAK® ChipFET® Case Outline D (7) (6) (5) (1) (2) (3) (4) E (8) Pin #1 indicator Side view of single e b H D1 D(2) D2 K D(3) L G(4) K1 D2 SI(1) GI(2) S2(3) D1(8) D1(7) D2(6) Detail Z G2(4) K2 L D(1) A1 C A Z Side view of dual E1 E2 E3 H D3 D(8) D(7) D(6) S(5) K3 Backside view of dual pad Backside view of single pad DIM. D2(5) MILLIMETERS INCHES MIN. NOM. MAX. MIN. NOM. MAX. A 0.70 0.75 0.85 0.028 0.030 0.033 A1 0 - 0.05 0 - 0.002 b 0.25 0.30 0.35 0.010 0.012 0.014 C 0.15 0.20 0.25 0.006 0.008 0.010 D 2.92 3.00 3.08 0.115 0.118 0.121 D1 1.75 1.87 2.00 0.069 0.074 0.079 D2 1.07 1.20 1.32 0.042 0.047 0.052 D3 0.20 0.25 0.30 0.008 0.010 0.012 E 1.82 1.90 1.98 0.072 0.075 0.078 E1 1.38 1.50 1.63 0.054 0.059 0.064 E2 0.92 1.05 1.17 0.036 0.041 0.046 E3 0.45 0.50 0.55 0.018 0.020 0.022 e 0.65 BSC 0.026 BSC H 0.15 0.20 0.25 0.006 0.008 0.010 K 0.25 - - 0.010 - - K1 0.30 - - 0.012 - - K2 0.20 - - 0.008 - - K3 0.20 - - 0.008 - - L 0.30 0.35 0.40 0.012 0.014 0.016 C14-0630-Rev. E, 21-Jul-14 DWG: 5940 Note • Millimeters will govern Document Number: 73203 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Revision: 21-Jul-14 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR PowerPAK® ChipFET® Single 0.225 (0.009) 0.350 (0.014) 0.650 (0.026) 0.200 (0.008) 0.300 (0.012) 0.300 (0.012) 0.100 (0.004) 1.500 (0.059) 1.900 (0.075) 0.250 (0.010) 0.500 (0.020) 0.350 (0.014) 0.350 (0.014) 1.870 (0.074) 0.305 (0.012) 2.575 (0.101) Recommended Minimum Pads Dimensions in mm/(Inches) Return to Index APPLICATION NOTE Document Number: 69948 Revision: 21-Jan-08 www.vishay.com 9 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000