New Product Si5936DU Vishay Siliconix Dual N-Channel 30-V (D-S) MOSFET FEATURES PRODUCT SUMMARY VDS (V) 30 RDS(on) () Max. ID (A)a 0.030 at VGS = 10 V 6 0.040 at VGS = 4.5 V 6 PowerPAK ChipFET Dual • TrenchFET® Power MOSFET • Thermally Enhanced PowerPAK® ChipFET® Package - Small Footprint Area - Low On-Resistance - Thin 0.8 mm Profile • 100 % Rg Tested • Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 Qg (Typ.) 3.5 nC Marking Code CF XXX Lot Traceability and Date Code APPLICATIONS • Network • System Power DC/DC Part # Code D1 3. 0 D2 m m 1.8 mm G1 G2 Bottom View S1 Ordering Information: Si5936DU-T1-GE3 (Lead (Pb)-free and Halogen-free) S2 N-Channel MOSFET N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Symbol VDS VGS Continuous Drain Current (TJ = 150 °C) TC = 25 °C TC = 70 °C TA = 25 °C TA = 70 °C Limit 30 ± 20 6a 6a 6a, b, c 5.3b, c 25 6a 1.9b, c 10.4 6.7 ID IDM Pulsed Drain Current (t = 300 µs) TC = 25 °C TA = 25 °C TC = 25 °C TC = 70 °C Maximum Power Dissipation TA = 25 °C TA = 70 °C Operating Junction and Storage Temperature Range Continuous Source-Drain Diode Current IS PD Unit V A 2.3b, c 1.5b, c - 55 to 150 260 TJ, Tstg Soldering Recommendations (Peak Temperature)d, e W °C THERMAL RESISTANCE RATINGS Parameter b, f Maximum Junction-to-Ambient Maximum Junction-to-Case (Drain) t5s Steady State Symbol RthJA RthJC Typical 43 9.5 Maximum 55 12 Unit °C/W Notes: a. Package limited b. Surface mounted on 1" x 1" FR4 board. c. t = 5 s. d. See solder profile (www.vishay.com/doc?73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 105 °C/W. Document Number: 62804 S12-2729-Rev. A, 12-Nov-12 For technical questions, contact: [email protected] www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 New Product Si5936DU Vishay Siliconix SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) Parameter Symbol Test Conditions Min. VDS VGS = 0 V, ID = 250 µA 30 Typ. Max. Unit Static Drain-Source Breakdown Voltage VDS/TJ VDS Temperature Coefficient VGS(th) Temperature Coefficient VGS(th)/TJ Gate-Source Threshold Voltage ID = 250 µA VGS(th) VDS = VGS , ID = 250 µA Gate-Source Leakage IGSS VDS = 0 V, VGS = ± 20 V Zero Gate Voltage Drain Current IDSS On-State Drain Currenta ID(on) Drain-Source On-State Resistancea Forward Transconductancea RDS(on) gfs V 34 mV/°C - 4.4 1.2 2.2 V ± 100 nA VDS = 30 V, VGS = 0 V 1 VDS = 30 V, VGS = 0 V, TJ = 55 °C 10 VDS 5 V, VGS = 10 V 20 µA A VGS 10 V, ID = 5 A 0.025 0.030 VGS 4.5 V, ID = 4 A 0.032 0.040 VDS = 15 V, ID = 5 A 11 S b Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Gate Resistance Rg 320 VDS = 15 V, VGS = 0 V, f = 1 MHz tr Rise Time td(off) Turn-Off Delay Time Fall Time Turn-On Delay Time 1 VDS = 15 V, VGS = 4.5 V, ID = 7 A nC 1.3 f = 1 MHz VDD = 15 V, RL = 2.8 ID 5.3 A, VGEN = 4.5 V, Rg = 1 0.8 4 8 15 30 65 130 30 10 20 td(on) 5 10 12 25 VDD = 15 V, RL = 2.8 ID 5.3 A, VGEN = 10 V, Rg = 1 tf Fall Time 11 5.3 tf td(off) Turn-Off Delay Time 7 3.5 15 tr Rise Time pF 38 VDS = 15 V, VGS = 10 V, ID = 7 A td(on) Turn-On Delay Time 70 12 25 6 15 ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulse Diode Forward Current ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Reverse Recovery Fall Time ta Reverse Recovery Rise Time tb TC = 25 °C 6 25 IS = 5.3 A, VGS 0 V IF = 5.3 A, dI/dt = 100 A/µs, TJ = 25 °C A 0.8 1.2 V 11 20 ns 5 10 nC 6 5 ns Notes: a. Pulse test; pulse width 300 µs, duty cycle 2 % b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Document Number: 62804 S12-2729-Rev. A, 12-Nov-12 For technical questions, contact: [email protected] www.vishay.com 2 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 New Product Si5936DU Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 25 10 VGS = 10 V thru 5 V VGS = 4 V 8 ID - Drain Current (A) ID - Drain Current (A) 20 15 10 VGS = 3 V 5 6 4 TC = 25 °C 2 TC = 125 °C TC = - 55 °C 0 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.0 1.0 0.100 500 0.080 400 0.060 VGS = 4.5 V 0.020 3.0 4.0 Transfer Characteristics C - Capacitance (pF) RDS(on) - On-Resistance (Ω) Output Characteristics 0.040 2.0 VGS - Gate-to-Source Voltage (V) VDS - Drain-to-Source Voltage (V) Ciss 300 200 Coss 100 VGS = 10 V Crss 0.000 0 0 10 20 30 40 0 6 12 18 24 30 VDS - Drain-to-Source Voltage (V) ID - Drain Current (A) On-Resistance vs. Drain Current and Gate Voltage Capacitance 1.8 10 RDS(on) - On-Resistance (Normalized) VGS - Gate-to-Source Voltage (V) VGS = 10V ID = 7 A 8 VDS = 15 V 6 VDS = 7.5 V VDS = 24 V 4 2 ID = 5 A 1.6 1.4 VGS = 4.5 V 1.2 1.0 0.8 0.6 0 0 2 4 6 8 - 50 - 25 0 25 50 75 100 125 150 Qg - Total Gate Charge (nC) TJ - Junction Temperature (°C) Gate Charge On-Resistance vs. Junction Temperature Document Number: 62804 S12-2729-Rev. A, 12-Nov-12 For technical questions, contact: [email protected] www.vishay.com 3 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 New Product Si5936DU Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 0.100 100 ID = 5 A 10 RDS(on) - On-Resistance (Ω) IS - Source Current (A) 0.080 TJ = 150 °C TJ = 25 °C 1 TJ = 125 °C 0.040 TJ = 25 °C 0.020 0.000 0.1 0.0 0.2 0.4 0.6 0.8 1.0 0.0 1.2 4.0 6.0 8.0 10.0 VGS - Gate-to-Source Voltage (V) Source-Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage 2.0 30 1.8 25 1.6 20 1.4 ID = 250 μA 15 1.2 10 1.0 5 0 0.001 0.8 - 50 2.0 VSD - Source-to-Drain Voltage (V) Power (W) VGS(th) (V) 0.060 - 25 0 25 50 75 100 125 150 0.01 0.1 1 10 100 1000 Time (s) TJ - Temperature (°C) Threshold Voltage Single Pulse Power (Junction-to-Ambient) 100 Limited by RDS(on)* ID - Drain Current (A) 10 100 μs 1 1 ms 10 ms TA = 25 °C 0.1 BVDSS Limited 100 ms 1s 10 s DC 0.01 0.1 1 10 100 VDS - Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Safe Operating Area, Junction-to-Ambient Document Number: 62804 S12-2729-Rev. A, 12-Nov-12 For technical questions, contact: [email protected] www.vishay.com 4 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 New Product Si5936DU Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 12 16 10 Power Dissipation (W) ID - Drain Current (A) 12 8 Package Limited 8 6 4 4 2 0 0 0 25 50 75 100 TC - Case Temperature (°C) 125 150 25 50 75 100 125 150 TC - Case Temperature (°C) Current Derating* Power Derating * The power dissipation PD is based on TJ(max.) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. Document Number: 62804 S12-2729-Rev. A, 12-Nov-12 For technical questions, contact: [email protected] www.vishay.com 5 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 New Product Si5936DU Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 Notes: 0.1 PDM t1 0.05 t2 t 1. Duty Cycle, D = t1 2 2. Per Unit Base = R thJA = 105 °C/W 0.02 3. TJM - TA = PDM Z thJA(t) 4. Surface Mounted Single Pulse 0.01 10-4 10-3 10-2 10-1 1 10 100 1000 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.05 Single Pulse 0.01 10-4 0.02 10-3 10-2 Square Wave Pulse Duration (s) 10-1 1 Normalized Thermal Transient Impedance, Junction-to-Case Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?62804. Document Number: 62804 S12-2729-Rev. A, 12-Nov-12 For technical questions, contact: [email protected] www.vishay.com 6 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix PowerPAK® ChipFET® Case Outline D (7) (6) (5) (1) (2) (3) (4) E (8) Pin #1 indicator Side view of single e b H D1 D(2) D2 K D(3) L G(4) K1 D2 SI(1) GI(2) S2(3) D1(8) D1(7) D2(6) Detail Z G2(4) K2 L D(1) A1 C A Z Side view of dual E1 E2 E3 H D3 D(8) D(7) D(6) S(5) K3 Backside view of dual pad Backside view of single pad DIM. D2(5) MILLIMETERS INCHES MIN. NOM. MAX. MIN. NOM. MAX. A 0.70 0.75 0.85 0.028 0.030 0.033 A1 0 - 0.05 0 - 0.002 b 0.25 0.30 0.35 0.010 0.012 0.014 C 0.15 0.20 0.25 0.006 0.008 0.010 D 2.92 3.00 3.08 0.115 0.118 0.121 D1 1.75 1.87 2.00 0.069 0.074 0.079 D2 1.07 1.20 1.32 0.042 0.047 0.052 D3 0.20 0.25 0.30 0.008 0.010 0.012 E 1.82 1.90 1.98 0.072 0.075 0.078 E1 1.38 1.50 1.63 0.054 0.059 0.064 E2 0.92 1.05 1.17 0.036 0.041 0.046 E3 0.45 0.50 0.55 0.018 0.020 0.022 e 0.65 BSC 0.026 BSC H 0.15 0.20 0.25 0.006 0.008 0.010 K 0.25 - - 0.010 - - K1 0.30 - - 0.012 - - K2 0.20 - - 0.008 - - K3 0.20 - - 0.008 - - L 0.30 0.35 0.40 0.012 0.014 0.016 C14-0630-Rev. E, 21-Jul-14 DWG: 5940 Note • Millimeters will govern Document Number: 73203 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Revision: 21-Jul-14 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR PowerPAK® ChipFET® Dual 2.700 (0.106) 0.300 (0.012) 0.350 (0.014) 0.650 (0.026) 1.900 (0.075) 0.300 (0.012) 1.050 (0.041) 0.350 (0.014) 0.200 (0.008) 0.300 (0.012) 0.225 (0.009) 0.650 (0.026) 1.175 (0.046) 1.525 (0.060) Recommended Minimum Pads Dimensions in mm/(Inches) APPLICATION NOTE Note: This is Flipped Mirror Image Pin #1 Location is Top Left Corner Return to Index www.vishay.com 10 Document Number: 69949 Revision: 21-Jan-08 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000