SiHP14N50D www.vishay.com Vishay Siliconix D Series Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) at TJ max. • Optimal Design - Low Area specific On-Resistance - Low Input Capacitance (Ciss) - Reduced Capacitive Switching Losses - High Body Diode Ruggedness - Avalanche Energy Rated (UIS) • Optimal Efficiency and Operation - Low Cost - Simple Gate Drive Circuitry - Low Figure-Of-Merit (FOM): Ron x Qg - Fast Switching • Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 550 RDS(on) max. at 25 °C () VGS = 10 V Qg max. (nC) 0.4 58 Qgs (nC) 8 Qgd (nC) 14 Configuration Single TO-220AB D G D S Note * Lead (Pb)-containing terminations are not RoHS-compliant. Exemptions may apply. G APPLICATIONS S • Consumer Electronics - Displays (LCD or Plasma TV • Server and Telecom Power Supplies - SMPS • Industrial - Welding, Induction Heating, Motor Drives • Battery Chargers N-Channel MOSFET ORDERING INFORMATION Package TO-220AB Lead (Pb)-free SiHP14N50D-E3 Lead (Pb)-free and Halogen-free SiHP14N50D-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL Drain-Source Voltage VDS Gate-Source Voltage VGS Gate-Source Voltage AC (f > 1 Hz) Continuous Drain Current (TJ = 150 °C) Pulsed Drain VGS at 10 V TC = 25 °C TC = 100 °C Currenta ID IDM Linear Derating Factor LIMIT UNIT 500 ± 30 V 30 14 9 A 38 1.6 W/°C mJ Single Pulse Avalanche Energyb EAS 56 Maximum Power Dissipation PD 208 W TJ, Tstg - 55 to + 150 °C Operating Junction and Storage Temperature Range Drain-Source Voltage Slope TJ = 125 °C Reverse Diode dV/dtd Soldering Recommendations (Peak Temperature) for 10 s Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. VDD = 50 V, starting TJ = 25 °C, L = 2.3 mH, Rg = 25 , IAS = 7 A. c. 1.6 mm from case. d. ISD ID, starting TJ = 25 °C. S12-1229-Rev. A, 21-May-12 dV/dt 24 0.4 300c V/ns °C Document Number: 91512 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP14N50D www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Maximum Junction-to-Case (Drain) RthJC - 0.6 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate Threshold Voltage (N) Gate-Source Leakage Zero Gate Voltage Drain Current VDS VGS = 0 V, ID = 250 μA 500 - - V VDS/TJ Reference to 25 °C, ID = 250 μA - 0.58 - V/°C VGS(th) VDS = VGS, ID = 250 μA 3.0 - 5.0 V nA VGS = ± 30 V - - ± 100 VDS = 500 V, VGS = 0 V - - 1 VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 10 IGSS IDSS μA - 0.320 0.40 gfs VDS = 50 V, ID = 7 A - 5.2 - S Input Capacitance Ciss 1144 - Coss - 100 - Reverse Transfer Capacitance Crss VGS = 0 V, VDS = 100 V, f = 1 MHz - Output Capacitance - 12 - Effective Output Capacitance, Energy Relateda Co(er) - 87 - Effective Output Capacitance, Time Relatedb Co(tr) - 125 - Qg - 29 58 Drain-Source On-State Resistance Forward Transconductancea RDS(on) VGS = 10 V ID = 7 A Dynamic Total Gate Charge pF VGS = 0 V, VDS = 0 V to 480 V VGS = 10 V Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) - 16 32 tr VDD = 400 V, ID = 7 A, VGS = 10 V, Rg = 9.1 - 27 54 - 29 58 - 26 52 f = 1 MHz, open drain - 1.7 - - - 14 - - 56 - - 1.2 - 319 - ns - 3.0 - μC - 18 - A Rise Time Turn-Off Delay Time td(off) Fall Time tf Gate Input Resistance Rg ID = 7 A, VDS = 400 V - 8 - - 14 - nC ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Current ISM Diode Forward Voltage VSD Reverse Recovery Time trr Reverse Recovery Charge Qrr Reverse Recovery Current IRRM MOSFET symbol showing the integral reverse p - n junction diode D A G TJ = 25 °C, IS = 7 A, VGS = 0 V TJ = 25 °C, IF = IS = 7 A, dI/dt = 100 A/μs, VR = 20 V S V Notes a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS. b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS. S12-1229-Rev. A, 21-May-12 Document Number: 91512 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP14N50D www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 3 TOP 15 V 14 V 13 V 12 V 11 V 10 V 9.0 V 8.0 V 7.0 V 6.0 V 30 TJ = 25 °C 20 10 2.5 2 1.5 0 5 10 15 20 25 0.5 TJ, Junction Temperature (°C) Fig. 1 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature 10 000 15 V 14 V 13 V 12 V 11 V 10 V 9.0 V 8.0 V 7.0 V 6.0 V BOTYTOM 5.0 V TJ = 150 °C Capacitance (pF) C iss 12 1000 VGS = 0 V, f = 1 MHz C iss = C gs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd 100 Coss 10 6 Crss 5.0 V 1 0 0 5 10 15 20 25 30 0 VDS, Drain-to-Source Voltage (V) 100 200 24 VGS, Gate-to-Source Voltage (V) 30 20 TJ = 150 °C 400 500 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 40 10 300 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics ID, Drain-to-Source Current (A) 20 40 60 80 100 120 140 160 VDS, Drain-to-Source Voltage (V) TOP 18 0 - 60 - 40 - 20 0 30 30 24 VGS = 10 V 1 5.0 V 0 ID, Drain-to-Source Current (A) ID = 7 A RDS(on), Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) 40 TJ = 25 °C 0 VDS = 400 V VDS = 250 V VDS = 100 V 20 16 12 8 4 0 0 5 10 15 20 25 0 10 20 30 40 50 VGS, Gate-to-Source Voltage (V) Qg, Total Gate Charge (nC) Fig. 3 - Typical Transfer Characteristics Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage S12-1229-Rev. A, 21-May-12 Document Number: 91512 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP14N50D www.vishay.com Vishay Siliconix 16 10 ġ ID, Drain Current (A) ISD, Reverse Drain Current (A) 100 ġ TJ = 150 °C ġ TJ = 25 °Cġ 1ġ 12 8 4 VGS = 0 Vġ 0 0.1 ġ 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 25 VSD, Source-Drain Voltage (V) 75 100 125 150 TJ, Case Temperature (°C) Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 9 - Maximum Drain Current vs. Case Temperature 625 1000 VDS, Drain-to-Source Brakdown Voltage (V) 600 Operation in this Area Limited by RDS(on) 100 ID, Drain Current (A) 50 IDM = Limited 10 100 μs Limited by RDS(on)* 1 ms 1 TC = 25 °C TJ = 150 °C Single Pulse 0.1 1 550 525 500 10 ms BVDSS Limited 10 100 VDS, Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is s 475 - 60 - 40 - 20 0 1000 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 8 - Maximum Safe Operating Area Normalized Effective Transient Thermal Impedance 575 Fig. 10 - Temperature vs. Drain-to-Source Voltage 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 0.0001 0.001 0.01 0.1 1 Pulse Time (s) Fig. 11 - Normalized Thermal Transient Impedance, Junction-to-Case S12-1229-Rev. A, 21-May-12 Document Number: 91512 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP14N50D www.vishay.com Vishay Siliconix RD V DS QG 10 V V GS D.U.T. RG QGS + - V DD QGD VG 10 V Pulse width ≤ 1 μs Duty factor ≤ 0.1 % Charge Fig. 16 - Basic Gate Charge Waveform Fig. 12 - Switching Time Test Circuit Current regulator Same type as D.U.T. V DS 90 % 50 kΩ 12 V 0.2 μF 0.3 μF + 10 % V GS D.U.T. td(on) td(off) tr tf - VDS VGS 3 mA Fig. 13 - Switching Time Waveforms IG ID Current sampling resistors Fig. 17 - Gate Charge Test Circuit L Vary t p to obtain required IAS VDS D.U.T. RG + - I AS V DD 10 V 0.01 Ω tp Fig. 14 - Unclamped Inductive Test Circuit V DS tp V DD V DS IAS Fig. 15 - Unclamped Inductive Waveforms S12-1229-Rev. A, 21-May-12 Document Number: 91512 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP14N50D www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 18 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91512. S12-1229-Rev. A, 21-May-12 Document Number: 91512 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-220-1 A E DIM. Q H(1) D 3 2 L(1) 1 M* L b(1) INCHES MIN. MAX. MIN. MAX. A 4.24 4.65 0.167 0.183 b 0.69 1.02 0.027 0.040 b(1) 1.14 1.78 0.045 0.070 F ØP MILLIMETERS c 0.36 0.61 0.014 0.024 D 14.33 15.85 0.564 0.624 E 9.96 10.52 0.392 0.414 e 2.41 2.67 0.095 0.105 e(1) 4.88 5.28 0.192 0.208 F 1.14 1.40 0.045 0.055 H(1) 6.10 6.71 0.240 0.264 0.115 J(1) 2.41 2.92 0.095 L 13.36 14.40 0.526 0.567 L(1) 3.33 4.04 0.131 0.159 ØP 3.53 3.94 0.139 0.155 Q 2.54 3.00 0.100 0.118 ECN: X15-0364-Rev. C, 14-Dec-15 DWG: 6031 Note • M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM C b e J(1) e(1) Package Picture ASE Revison: 14-Dec-15 Xi’an Document Number: 66542 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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