Si5458DU Datasheet

New Product
Si5458DU
Vishay Siliconix
N-Channel 30-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
RDS(on) (Ω)
ID (A)d, e
0.041 at VGS = 10 V
6
0.051 at VGS = 4.5 V
6
VDS (V)
30
• Halogen-free According to IEC 61249-2-21
Definition
• TrenchFET® Power MOSFET
• 100 % Rg Tested
• Compliant to RoHS Directive 2002/95/EC
Qg (Typ.)
2.8 nC
APPLICATIONS
PowerPAK® ChipFET Single
• Load Switch
• HDD DC/DC
1
2
D
G
D
7
(1, 2, 3, 6, 7, 8)
4
D
D
8
D
3
D
D
Marking Code
AP
S
6
XXX
Lot Traceability
and Date Code
S
5
G
(4)
Part # Code
(5)
Bottom View
S
Ordering Information: Si5458DU-T1-GE3 (Lead (Pb)-free and Halogen-free)
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (TJ = 150 °C)
Symbol
VDS
VGS
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
Pulsed Drain Current
TC = 25 °C
TA = 25 °C
TC = 25 °C
TC = 70 °C
Maximum Power Dissipation
TA = 25 °C
TA = 70 °C
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)f, g
Continuous Source-Drain Diode Current
ID
IDM
IS
PD
TJ, Tstg
Limit
30
± 20
6e
6e
a, b, e
6
6a, b, e
20
6
2.9a, b
10.4
6.7
3.5a, b
2.2a, b
- 55 to 150
260
Unit
V
A
W
°C
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Unit
t≤5s
RthJA
30
36
Maximum Junction-to-Ambienta, c
°C/W
10
12
Maximum Junction-to-Case (Drain)
Steady State
RthJC
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. t = 5 s.
c. Maximum under steady state conditions is 72 °C/W.
d. Based on TC = 25 °C.
e. Package limited.
f. See Solder Profile (www.vishay.com/ppg?73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and
is not required to ensure adequate bottom side solder interconnection.
g. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
Document Number: 65019
S09-1392-Rev. A, 20-Jul-09
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1
New Product
Si5458DU
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
VDS
VGS = 0 V, ID = 250 µA
30
Typ.
Max.
Unit
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
ΔVDS/TJ
V
32
ID = 250 µA
mV/°C
VGS(th) Temperature Coefficient
ΔVGS(th)/TJ
Gate-Source Threshold Voltage
VGS(th)
VDS = VGS , ID = 250 µA
3
V
IGSS
VDS = 0 V, VGS = ± 20 V
± 100
nA
VDS = 30 V, VGS = 0 V
1
VDS = 30 V, VGS = 0 V, TJ = 70 °C
10
Gate-Source Leakage
Zero Gate Voltage Drain Current
IDSS
On-State Drain Currenta
ID(on)
Drain-Source On-State Resistancea
Forward Transconductancea
RDS(on)
gfs
VDS ≥ 5 V, VGS = 10 V
-5
1.2
15
µA
A
VGS = 10 V, ID = 7.1 A
0.034
0.041
VGS = 4.5 V, ID = 6.3 A
0.042
0.051
VDS = 15 V, ID = 7.1 A
15
Ω
S
Dynamicb
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Rg
325
VDS = 15 V, VGS = 0 V, f = 1 MHz
VDS = 15 V, VGS = 10 V, ID = 7.1 A
td(off)
pF
6
9
2.8
4.2
1.1
VDS = 15 V, VGS = 4.5 V, ID = 7.1 A
f = 1 MHz
VDD = 15 V, RL = 2.7 Ω
ID ≅ 5.6 A, VGEN = 4.5 V, Rg = 1 Ω
0.6
2.8
5.6
12
18
13
20
16
25
tf
11
17
td(on)
4
8
tr
td(off)
nC
0.8
td(on)
tr
60
30
VDD = 15 V, RL = 2.7 Ω
ID ≅ 5.6 A, VGEN = 10 V, Rg = 1 Ω
tf
9
18
11
20
8
15
Ω
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulse Diode Forward Current
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Reverse Recovery Fall Time
ta
Reverse Recovery Rise Time
tb
TC = 25 °C
1.2
20
IS = 5.6 A, VGS = 0 V
IF = 5.6 A, dI/dt = 100 A/µs, TJ = 25 °C
A
0.8
1.2
V
11
20
ns
4
8
nC
6
5
ns
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Document Number: 65019
S09-1392-Rev. A, 20-Jul-09
New Product
Si5458DU
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
20
5
VGS = 10 V thru 4 V
4
I D - Drain Current (A)
I D - Drain Current (A)
15
10
VGS = 3 V
5
3
2
TC = 25 °C
1
TC = 125 °C
TC = - 55 °C
0
0.0
0
0.5
1.0
1.5
2.0
2.5
0
1
2
3
4
VDS - Drain-to-Source Voltage (V)
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
400
0.06
300
0.05
C - Capacitance (pF)
R DS(on) - On-Resistance (Ω)
Ciss
VGS = 4.5 V
0.04
VGS = 10 V
200
0.03
100
0.02
0
0
5
10
15
Coss
Crss
0
20
5
ID - Drain Current (A)
10
15
25
30
VDS - Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current
Capacitance
1.7
10
ID = 7.1 A
VGS = 10 V; ID = 7.1 A
1.5
6
VDS = 15 V
VDS = 24 V
4
(Normalized)
8
R DS(on) - On-Resistance
VGS - Gate-to-Source Voltage (V)
20
1.3
1.1
VGS = 4.5 V; ID = 6.3 A
0.9
2
0
0
1
2
3
4
Qg - Total Gate Charge (nC)
Gate Charge
Document Number: 65019
S09-1392-Rev. A, 20-Jul-09
5
6
0.7
- 50
- 25
0
25
50
75
100
125
150
TJ - Junction Temperature (°C)
On-Resistance vs. Junction Temperature
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New Product
Si5458DU
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
0.10
10
TJ = 150 °C
TJ = 25 °C
1
0.1
0.0
0.08
R DS(on) - On-Resistance (Ω)
I S - Source Current (A)
100
0.06
TJ = 125 °C
0.04
TJ = 25 °C
0.02
0.00
0.3
0.6
0.9
1.2
0
1.5
2
VSD - Source-to-Drain Voltage (V)
8
10
VGS - Gate-to-Source Voltage (V)
2.3
30
2.1
25
1.9
20
Power (W)
VGS(th) (V)
6
On-Resistance vs. Gate-to-Source Voltage
Source-Drain Diode Forward Voltage
ID = 250 µA
1.7
15
1.5
10
1.3
5
1.1
- 50
4
- 25
0
25
50
75
100
125
0
0.001
150
0.01
0.01
1
TJ - Temperature (°C)
Time (s)
Threshold Voltage
Single Pulse Power
10
100
100
I D - Drain Current (A)
Limited by RDS(on)*
10
100 µs
1
1 ms
10 ms
100 ms
1 s, 10 s
0.1
DC
BVDSS Limited
TA = 25 °C
Single Pulse
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Ambient
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Document Number: 65019
S09-1392-Rev. A, 20-Jul-09
New Product
Si5458DU
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
15
I D - Drain Current (A)
12
9
Package Limited
6
3
0
0
25
50
75
100
125
150
TC - Case Temperature (°C)
Current Derating*
2.4
15
12
9
Power (W)
Power (W)
1.8
6
1.2
0.6
3
0.0
0
0
25
50
75
100
125
150
0
25
50
75
100
125
TC - Case Temperature (°C)
TA - Ambient Temperature (°C)
Power, Junction-to-Case
Power, Junction-to-Ambient
150
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Document Number: 65019
S09-1392-Rev. A, 20-Jul-09
www.vishay.com
5
New Product
Si5458DU
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
Notes:
0.1
0.1
PDM
0.05
t1
0.02
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = RthJA = 72 °C/W
Single Pulse
3. TJM - TA = PDMZthJA(t)
4. Surface Mounted
0.01
10 -4
10 -3
10 -2
10 -1
1
10
100
1000
10 000
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.05
0.1
10 -4
0.02
Single Pulse
10 -3
10 -2
10 -1
1
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Case
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?65019.
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Document Number: 65019
S09-1392-Rev. A, 20-Jul-09
Package Information
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Vishay Siliconix
PowerPAK® ChipFET® Case Outline
D
(7)
(6)
(5)
(1)
(2)
(3)
(4)
E
(8)
Pin #1
indicator
Side view of single
e
b
H
D1
D(2)
D2
K
D(3)
L
G(4)
K1
D2
SI(1)
GI(2)
S2(3)
D1(8)
D1(7)
D2(6)
Detail Z
G2(4)
K2
L
D(1)
A1
C
A
Z
Side view of dual
E1
E2
E3
H
D3
D(8)
D(7)
D(6)
S(5)
K3
Backside view of dual pad
Backside view of single pad
DIM.
D2(5)
MILLIMETERS
INCHES
MIN.
NOM.
MAX.
MIN.
NOM.
MAX.
A
0.70
0.75
0.85
0.028
0.030
0.033
A1
0
-
0.05
0
-
0.002
b
0.25
0.30
0.35
0.010
0.012
0.014
C
0.15
0.20
0.25
0.006
0.008
0.010
D
2.92
3.00
3.08
0.115
0.118
0.121
D1
1.75
1.87
2.00
0.069
0.074
0.079
D2
1.07
1.20
1.32
0.042
0.047
0.052
D3
0.20
0.25
0.30
0.008
0.010
0.012
E
1.82
1.90
1.98
0.072
0.075
0.078
E1
1.38
1.50
1.63
0.054
0.059
0.064
E2
0.92
1.05
1.17
0.036
0.041
0.046
E3
0.45
0.50
0.55
0.018
0.020
0.022
e
0.65 BSC
0.026 BSC
H
0.15
0.20
0.25
0.006
0.008
0.010
K
0.25
-
-
0.010
-
-
K1
0.30
-
-
0.012
-
-
K2
0.20
-
-
0.008
-
-
K3
0.20
-
-
0.008
-
-
L
0.30
0.35
0.40
0.012
0.014
0.016
C14-0630-Rev. E, 21-Jul-14
DWG: 5940
Note
• Millimeters will govern
Document Number: 73203
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Revision: 21-Jul-14
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR PowerPAK® ChipFET® Single
0.225
(0.009)
0.350
(0.014)
0.650
(0.026)
0.200
(0.008)
0.300
(0.012)
0.300
(0.012)
0.100
(0.004)
1.500
(0.059)
1.900
(0.075)
0.250
(0.010)
0.500
(0.020)
0.350
(0.014)
0.350
(0.014)
1.870
(0.074)
0.305
(0.012)
2.575
(0.101)
Recommended Minimum Pads
Dimensions in mm/(Inches)
Return to Index
APPLICATION NOTE
Document Number: 69948
Revision: 21-Jan-08
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requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
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Revision: 02-Oct-12
1
Document Number: 91000