Si5517DU Datasheet

Si5517DU
Vishay Siliconix
N- and P-Channel 20-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
VDS
N-Channel
RDS(on) (Ω)
0.039 at VGS = 4.5 V
0.045 at VGS = 2.5 V
0.055 at VGS = 1.8 V
0.072 at VGS = - 4.5 V
0.100 at VGS = - 2.5 V
0.131 at VGS = - 18 V
20
P-Channel
- 20
ID (A)a
6
6
6
-6
-6
-6
Qg
6 nc
5.5 nc
COMPLIANT
• Complementary MOSFET for Portable Devices
- Ideal for Buck-Boost Circuits
1
Marking Code
2
S1
G1
EA
3
D1
4
S2
D1
D1
XXX
S2
Lot Traceability
and Date Code
Part # Code
7
G2
G2
D2
6
RoHS
APPLICATIONS
PowerPAK ChipFET Dual
8
• Halogen-free
• TrenchFET® Power MOSFETs
• New Thermally Enhanced PowerPAK®
ChipFET® Package
- Small Footprint Area
- Low On-Resistance
- Thin 0.8 mm Profile
G1
D2
5
Bottom View
Ordering Information: Si5517DU-T1-GE3 (Lead (Pb)-free and Halogen-free)
S1
D2
N-Channel MOSFET
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Drain-Source Voltage
Gate-Source Voltage
Symbol
VDS
VGS
Continuous Drain Current (TJ = 150 °C)
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
IDM
Pulsed Drain Current
Source-Drain Current Diode Current
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak
ID
TC = 25 °C
TA = 25 °C
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
IS
PD
TJ, Tstg
Temperature)d, e
N-Channel
20
P-Channel
- 20
±8
6a
6a
7.2b, c
5.8b, c
20
6.9
- 6a
- 6a
- 4.6b, c
- 3.7b, c
- 15
- 6.9
1.9b, c
8.3
5.3
- 1.9b, c
8.3
5.3
2.3b, c
1.5b, c
2.3b, c
1.5b, c
- 55 to 150
260
Unit
V
A
W
°C
THERMAL RESISTANCE RATINGS
Parameter
N-Channel
Typ.
Max.
45
55
12
15
P-Channel
Typ.
Max.
45
55
12
15
Unit
t≤5s
Maximum Junction-to-Ambientb, f
°C/W
Maximum Junction-to-Case (Drain)
Steady State
Notes:
a. Based on TC = 25 °C.
b. Surface Mounted on 1" x 1" FR4 board.
c. t = 5 s.
d. See Solder Profile (http://www.vishay.com/ppg?73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is
exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be
guaranteed and is not required to ensure adequate bottom side solder interconnection.
e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under Steady State conditions is 105 °C/W for both channels.
Document Number: 73529
S-81449-Rev. B, 23-Jun-08
Symbol
RthJA
RthJC
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1
Si5517DU
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
Typ.a
Max.
Unit
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
VGS(th) Temperature Coefficient
Gate Threshold Voltage
Gate-Body Leakage
VDS
ΔVDS/TJ
ΔVGS(th)/TJ
VGS(th)
IGSS
VGS = 0 V, ID = 1 mA
N-Ch
20
VGS = 0 V, ID = - 1 mA
P-Ch
- 20
ID = 250 µA
N-Ch
On-State Drain Currentb
Drain-Source On-State Resistanceb
Forward Transconductanceb
IDSS
ID(on)
RDS(on)
gfs
17
ID = - 250 µA
P-Ch
- 20
ID = 250 µA
N-Ch
- 2.6
2.4
mV/°C
ID = - 250 µA
P-Ch
VDS = VGS, ID = 250 µA
N-Ch
0.4
1
VDS = VGS, ID = - 250 µA
P-Ch
- 0.4
-1
VDS = 0 V, VGS = ± 8 V
VDS = 20 V, VGS = 0 V
Zero Gate Voltage Drain Current
V
N-Ch
100
P-Ch
- 100
N-Ch
1
VDS = - 20 V, VGS = 0 V
P-Ch
-1
VDS = 20 V, VGS = 0 V, TJ = 55 °C
N-Ch
10
VDS = - 20 V, VGS = 0 V, TJ = 55 °C
P-Ch
- 10
VDS ≤ 5 V, VGS = 4.5 V
N-Ch
20
VDS ≤ - 5 V, VGS = - 4.5 V
P-Ch
- 15
VGS = 4.5 V, ID = 4.4 A
N-Ch
0.032
VGS = - 4.5 V, ID = - 3.3 A
P-Ch
0.060
0.072
VGS = 2.5 V, ID = 4.1 A
N-Ch
0.037
0.045
VGS = - 2.5 V, ID = - 2.8 A
P-Ch
0.083
0.100
V
nA
µA
A
0.039
VGS = 1.8 V, ID = 1.8 A
N-Ch
0.0455
0.055
VGS = - 1.8 V, ID = - 0.76 A
P-Ch
0.108
0.131
VDS = 10 V, ID = 4.4 A
N-Ch
22
VDS = - 10 V, ID = - 3.3 A
P-Ch
9
N-Ch
520
Ω
S
Dynamica
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Ciss
N-Channel
VDS = 10 V, VGS = 0 V, f = 1 MHz
Coss
Crss
Qg
P-Channel
VDS = - 10 V, VGS = 0 V, f = 1 MHz
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
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2
Rg
455
N-Ch
100
P-Ch
105
N-Ch
60
pF
P-Ch
65
VDS = 10 V, VGS = 8 V, ID = 4.4 A
N-Ch
10.5
16
VDS = - 10 V, VGS = - 8 V, ID = - 4.6 A
P-Ch
9.1
14
N-Ch
6
9
P-Ch
5.5
8.5
N-Ch
0.91
P-Ch
P-Channel
VDS = - 10 V, VGS = - 4.5 V, ID = - 1.8 A N-Ch
P-Ch
0.75
N-Ch
1.9
P-Ch
8
N-Channel
VDS = 10 V, VGS = 4.5 V, ID = 4.4 A
Gate-Source Charge
P-Ch
f = 1 MHz
nC
0.7
1.5
Ω
Document Number: 73529
S-81449-Rev. B, 23-Jun-08
Si5517DU
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
Typ.a
Max.
Unit
Dynamica
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
td(on)
Turn-On Delay Time
tr
Rise Time
Fall Time
N-Ch
20
30
P-Ch
8
15
N-Ch
65
100
P-Ch
35
55
N-Ch
40
60
40
60
P-Channel
P-Ch
VDD = - 10 V, RL = 2.7 Ω
ID ≅ - 3.7 A, VGEN = - 4.5 V, Rg = 1 Ω N-Ch
P-Ch
10
15
55
85
N-Ch
5
10
10
N-Channel
VDD = 10 V, RL = 2.8 Ω
ID ≅ 3.6 A, VGEN = 8 V, Rg = 1 Ω
tf
P-Channel
VDD = - 10 V, RL = 2.7 Ω
ID ≅ - 3.7 A, VGEN = - 8 V, Rg = 1 Ω
IS
TC = 25 °C
td(off)
Turn-Off Delay Time
N-Channel
VDD = 10 V, RL = 2.8 Ω
ID ≅ 3.6 A, VGEN = 4.5 V, Rg = 1 Ω
P-Ch
5
N-Ch
12
20
P-Ch
15
25
N-Ch
26
40
P-Ch
30
45
N-Ch
8
15
P-Ch
45
70
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode
Current
Pulse Diode Forward Current
a
Body Diode Voltage
ISM
N-Ch
6.9
P-Ch
- 6.9
N-Ch
20
P-Ch
VSD
- 15
IS = 1.2 A, VGS = 0 V
N-Ch
0.8
1.2
IS = - 1.0 A, VGS = 0 V
P-Ch
- 0.8
- 1.2
N-Ch
45
70
P-Ch
30
60
Qrr
N-Channel
N-Ch
IF = 1.2 A, dI/dt = 100 A/µs, TJ = 25 °C
P-Ch
21
32
15
30
Reverse Recovery Fall Time
ta
P-Channel
IF = - 1 A, dI/dt = 100 A/µs, TJ = 25 °C
Reverse Recovery Rise Time
tb
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
A
N-Ch
29
P-Ch
11
N-Ch
16
P-Ch
19
V
ns
nC
ns
Notes:
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Document Number: 73529
S-81449-Rev. B, 23-Jun-08
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Si5517DU
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
20
10
VGS = 2.5 V thru 5 V
8
VGS = 2.5 V
ID - Drain Current (A)
I D - Drain Current (A)
16
VGS = 2 V
12
VGS = 1.5 V
8
4
6
4
TC = 125 °C
2
25 °C
VGS = 1 V
0
0.0
0.5
1.0
1.5
2.0
2.5
- 55 °C
0
0.0
3.0
0.6
0.9
1.2
VDS - Drain-to-Source Voltage (V)
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
1.5
800
0.08
VGS = 4.5 V
0.07
600
0.06
C - Capacitance (pF)
R DS(on) - On-Resistance (mΩ)
0.3
0.05
VGS = 2.5 V
0.04
0.03
VGS = 1.8 V
Ciss
400
200
0.02
Coss
0.01
Crss
0
0.00
0
4
8
12
16
0
20
4
8
16
20
VDS - Drain-to-Source Voltage (V)
I D - Drain Current (A)
On-Resistance vs. Drain Current and Gate Voltage
Capacitance
8
1.6
ID = 4.4 A
1.4
6
R DS(on) - On-Resistance
(Normalized)
VGS - Gate-to-Source Voltage (V)
12
VDS = 10 V
4
VDS = 16 V
2
VGS = 4.5 V
ID = 4.4 A
1.2
1.0
0.8
0
0
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4
3
6
9
12
0.6
- 50
- 25
0
25
50
75
100
125
Qg - Total Gate Charge (nC)
TJ - Junction Temperature (°C)
Gate Charge
On-Resistance vs. Junction Temperature
150
Document Number: 73529
S-81449-Rev. B, 23-Jun-08
Si5517DU
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
TJ = 150 °C
I S - Source Current (A)
10
TJ = 25 °C
1
0.0
0.08
RDS(on) - Drain-to-Source On-Resistance (mΩ)
20
ID = 4.4 A
0.07
0.06
125 °C
0.05
25 °C
0.04
0.03
0.2
0.4
0.6
0.8
1.0
1.2
0
1
2
3
4
5
VSD - Source-to-Drain Voltage (V)
VGS - Gate-to-Source Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
0.9
40
0.8
Power (W)
VGS(th) (V)
30
ID = 250 µA
0.7
0.6
0.5
20
0.4
10
0.3
0.2
- 50
- 25
0
25
50
75
100
125
0
0.001
150
0.01
0.1
TJ - Temperature (°C)
1
10
100
600
Time (s)
Threshold Voltage
Single Pulse Power, Junction-to-Ambient
100
I D - Drain Current (A)
Limited by RDS(on)*
10
IDM limited
ID(on) limited
100 µs
1 ms
1
10 ms
100 ms
1s
0.1
TA = 25 °C
Single Pulse
10 s
DC
BVDSS limited
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum V GS at which R DS(on) is specified
Safe Operating Area, Junction-to-Ambient
Document Number: 73529
S-81449-Rev. B, 23-Jun-08
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Si5517DU
Vishay Siliconix
15
10
12
8
Power Dissipation (W)
I D - Drain Current (A)
N-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
9
Package Limited
6
6
4
3
2
0
0
0
25
50
75
100
125
150
25
50
75
100
TC - Case Temperature (°C)
TC - Case Temperature (°C)
Current Derating*
Power Derating
125
150
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
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Document Number: 73529
S-81449-Rev. B, 23-Jun-08
Si5517DU
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Normalized Effective Transient
Thermal Impedance
2
1
Duty Cycle = 0.5
0.2
Notes:
0.1
PDM
0.1
0.05
t1
t2
1. Duty Cycle, D =
0.02
t1
t2
2. Per Unit Base = R thJA = 87 °C/W
3. T JM - TA = PDMZthJA(t)
Single Pulse
4. Surface Mounted
0.01
10-4
10-3
10-2
10-1
1
Square Wave Pulse Duration (s)
10
100
600
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10-4
10-3
10-2
Square Wave Pulse Duration (s)
10-1
1
Normalized Thermal Transient Impedance, Junction-to-Case
Document Number: 73529
S-81449-Rev. B, 23-Jun-08
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Si5517DU
Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
15
3V
4.5 V
4
4V
3.5 V
I D - Drain Current (A)
I D - Drain Current (A)
12
5
2.5 V
VGS = 5 V
2V
9
6
1.5 V
3
3
2
TC = 125 °C
TC = 25 °C
1
1V
0
0.0
0.5
1.0
1.5
2.0
2.5
TC = - 55 °C
0
0.0
3.0
0.5
1.0
1.5
2.0
VDS - Drain-to-Source Voltage (V)
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
0.30
800
600
C - Capacitance (pF)
R DS(on) - On-Resistance (Ω)
VGS = 1.8 V
0.25
0.20
VGS = 2.5 V
0.15
Ciss
400
200
0.10
Coss
VGS = 4.5 V
Crss
0.05
0
0
3
6
9
12
15
0
8
12
16
I D - Drain Current (A)
VDS - Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current and Gate Voltage
Capacitance
20
1.5
8
1.4
ID = 4.6 A
6
R DS(on) - On-Resistance
(Normalized)
VGS - Gate-to-Source Voltage (V)
4
VDS = 10 V
4
VDS = 16 V
2
VGS = 4.5 V
I D = 3.3 A
1.3
1.2
1.1
1.0
0.9
0.8
0
0
3
6
9
Qg - Total Gate Charge (nC)
Gate Charge
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8
12
0.7
- 50
- 25
0
25
50
75
100
125
150
TJ - Junction Temperature ( °C)
On-Resistance vs. Junction Temperature
Document Number: 73529
S-81449-Rev. B, 23-Jun-08
Si5517DU
Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
0.20
R DS(on) - Drain-to-Source On-Resistance (Ω)
I S - Source Current (A)
10
TJ = 150 °C
TJ = 25 °C
I D = 4.6 A
0.16
0.12
TA = 125 °C
0.08
TA = 25 °C
0.04
1
0.0
0.2
0.4
0.6
1.0
0.8
1.2
0
1.4
1
VSD - Source-to-Drain Voltage (V)
3
4
5
VGS - Gate-to-Source Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
0.8
40
I D = 250 µA
30
Power (W)
0.7
VGS(th) (V)
2
0.6
0.5
20
10
0.4
0.3
- 50
- 25
0
25
50
75
100
125
0
0.001
150
0.01
0.1
TJ - Temperature (°C)
1
10
100
600
Time (s)
Threshold Voltage
Single Pulse Power, Junction-to-Ambient
100
IDM limited
Limited by R DS(on)*
I D - Drain Current (A)
10
ID(on) limited
1 ms
1
10 ms
100 ms
1s
10 s
DC
0.1
TA = 25 °C
Single Pulse
BVDSS limited
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which R DS(on) is specified
Safe Operating Area, Junction-to-Case
Document Number: 73529
S-81449-Rev. B, 23-Jun-08
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Si5517DU
Vishay Siliconix
10
10
8
8
Power Dissipation (W)
ID - Drain Current (A)
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Package Limited
6
4
6
4
2
2
0
0
0
25
50
75
100
TC - Case Temperature (°C)
Current Derating*
125
150
25
50
75
100
125
150
TC - Case Temperature (°C)
Power Derating
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
www.vishay.com
10
Document Number: 73529
S-81449-Rev. B, 23-Jun-08
Si5517DU
Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
Notes:
0.1
PDM
0.1
0.05
t1
t2
1. Duty Cycle, D =
0.02
t1
t2
2. Per Unit Base = R thJA = 87 °C/W
3. T JM - TA = PDMZthJA(t)
Single Pulse
4. Surface Mounted
0.01
10-4
10-3
10-2
10-1
1
Square Wave Pulse Duration (s)
10
100
600
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10-4
10-3
10-2
Square Wave Pulse Duration (s)
10-1
1
Normalized Thermal Transient Impedance, Junction-to-Case
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?73529.
Document Number: 73529
S-81449-Rev. B, 23-Jun-08
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11
Package Information
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Vishay Siliconix
PowerPAK® ChipFET® Case Outline
D
(7)
(6)
(5)
(1)
(2)
(3)
(4)
E
(8)
Pin #1
indicator
Side view of single
e
b
H
D1
D(2)
D2
K
D(3)
L
G(4)
K1
D2
SI(1)
GI(2)
S2(3)
D1(8)
D1(7)
D2(6)
Detail Z
G2(4)
K2
L
D(1)
A1
C
A
Z
Side view of dual
E1
E2
E3
H
D3
D(8)
D(7)
D(6)
S(5)
K3
Backside view of dual pad
Backside view of single pad
DIM.
D2(5)
MILLIMETERS
INCHES
MIN.
NOM.
MAX.
MIN.
NOM.
MAX.
A
0.70
0.75
0.85
0.028
0.030
0.033
A1
0
-
0.05
0
-
0.002
b
0.25
0.30
0.35
0.010
0.012
0.014
C
0.15
0.20
0.25
0.006
0.008
0.010
D
2.92
3.00
3.08
0.115
0.118
0.121
D1
1.75
1.87
2.00
0.069
0.074
0.079
D2
1.07
1.20
1.32
0.042
0.047
0.052
D3
0.20
0.25
0.30
0.008
0.010
0.012
E
1.82
1.90
1.98
0.072
0.075
0.078
E1
1.38
1.50
1.63
0.054
0.059
0.064
E2
0.92
1.05
1.17
0.036
0.041
0.046
E3
0.45
0.50
0.55
0.018
0.020
0.022
e
0.65 BSC
0.026 BSC
H
0.15
0.20
0.25
0.006
0.008
0.010
K
0.25
-
-
0.010
-
-
K1
0.30
-
-
0.012
-
-
K2
0.20
-
-
0.008
-
-
K3
0.20
-
-
0.008
-
-
L
0.30
0.35
0.40
0.012
0.014
0.016
C14-0630-Rev. E, 21-Jul-14
DWG: 5940
Note
• Millimeters will govern
Document Number: 73203
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Revision: 21-Jul-14
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR PowerPAK® ChipFET® Dual
2.700
(0.106)
0.300
(0.012)
0.350
(0.014)
0.650
(0.026)
1.900
(0.075)
0.300
(0.012)
1.050
(0.041)
0.350
(0.014)
0.200
(0.008)
0.300
(0.012)
0.225
(0.009)
0.650
(0.026)
1.175
(0.046)
1.525
(0.060)
Recommended Minimum Pads
Dimensions in mm/(Inches)
APPLICATION NOTE
Note: This is Flipped Mirror Image
Pin #1 Location is Top Left Corner
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10
Document Number: 69949
Revision: 21-Jan-08
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Revision: 02-Oct-12
1
Document Number: 91000