V is h ay I ntertec h nolog y, I nc . MOSFETs - Thermally and Electrically Optimized Power Stage I INNOVAT AND TEC O L OGY SiZF904DT N HN Power MOSFETs O 19 62-2012 Optimized PowerPAIR® Layout Further Increases Performance While Reducing Solution Size Key Benefits • Re-engineered PowerPAIR® pin configuration with optimized thermal path through large power ground terminal. –– Minimized package resistance and inductance with innovative bond wireless interconnects –– Optional Kelvin Source return for high side MOSFET • Balanced combination of Gen IV TrenchFET® and Gen IV SkyFET® –– –– –– –– RDS(on) down to 1mΩ typ Low Qsw Qgd / Qgs ratio <0.5 Low Qrr and Vf • Improved efficiency over PowerPAK SO-8 solution using half the PCB area APPLICATIONS • System power, POL, low-current DC/DC and synchronous buck in notebooks • VRMs • Power modules • • • • • Graphic cards Servers Gaming consoles Notebook PCs Telecom equipment Resources • For technical questions contact: [email protected] • More featured products: http://www.vishay.com/ref/featuredmosfets One of the World’s Largest Manufacturers of Discrete Semiconductors and Passive Components PRODUCT SHEET 1/2 VMN-PT0353-xxxx This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 V is h ay I ntertec h nolog y, I nc . MOSFETs - Thermally and Electrically Optimized Power Stage AND TEC I INNOVAT O L OGY SiZF904DT N HN Power MOSFETs O 19 62-2012 Half the PCB Area Optimized PCB Layout Part Number SiZF904DT PRODUCT SHEET VDS (V) 30 VGS (V) 20/-16 QG 4.5 V (nC) RDS(ON) 4.5 VGS Max (mΩ) Samples HS LS HS LS 5 12 10 54 2/2 Jan 2013 VMN-PT0353-xxxx This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000