IRFP17N50L, SiHFP17N50L Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • SuperFast Body Diode Eliminates the Need For External Diodes in ZVS Applications 500 RDS(on) (Ω) VGS = 10 V 0.28 Qg (Max.) (nC) 130 Qgs (nC) 33 Qgd (nC) 59 Configuration • Low Gate Charge Results in Simple Drive Requirement Available RoHS* COMPLIANT • Enhanced dV/dt Capabilities Offer Improved Ruggedness Single • Higher Gate Voltage Threshold Offers Improved Noise Immunity D • Compliant to RoHS Directive 2002/95/EC TO-247AC APPLICATIONS • Zero Voltage Switching SMPS G • Telecom and Server Power Supplies • Uninterruptible Power Supply S D • Motor Control applications S G N-Channel MOSFET ORDERING INFORMATION Package TO-247AC IRFP17N50LPbF SiHFP17N50L-E3 IRFP17N50L SiHFP17N50L Lead (Pb)-free SnPb ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 500 Gate-Source Voltage VGS ± 30 Continuous Drain Current VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Currenta ID UNIT V 16 11 A IDM 64 1.8 W/°C EAS 390 mJ Currenta IAR 16 A Repetitive Avalanche Energya EAR 22 mJ PD 220 W dV/dt 13 V/ns TJ, Tstg - 55 to + 150 Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Maximum Power Dissipation Peak Diode Recovery TC = 25 °C dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque for 10 s 6-32 or M3 screw 300d °C 10 lbf · in 1.1 N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 °C, L = 3.0 mH, Rg = 25 Ω, IAS = 16 A (see fig. 12). c. ISD ≤ 16 A, dI/dt ≤ 347 A/μs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91205 S11-0446-Rev. B, 14-Mar-11 www.vishay.com 1 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP17N50L, SiHFP17N50L Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient Case-to-Sink, Flat, Greased Surface Maximum Junction-to-Case (Drain) SYMBOL TYP. MAX. UNIT RthJA RthCS RthJC 0.50 - 62 0.56 °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient VDS VGS = 0 V, ID = 250 μA 500 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mAd - 0.60 - V/°C VGS(th) VDS = VGS, ID = 250 μA 3.0 - 5.0 V Gate-Source Leakage IGSS VGS = ± 30 V - - ± 100 nA Zero Gate Voltage Drain Current IDSS Gate-Source Threshold Voltage Drain-Source On-State Resistance Forward Transconductance VDS = 500 V, VGS = 0 V - - 50 μA VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 2.0 mA - 0.28 0.32 Ω gfs VDS = 50 V, ID = 9.9 Ab 11 - - S VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 - 2760 - - 325 - - 37 - VDS = 1.0 V , f = 1.0 MHz - 3690 - VDS = 400 V , f = 1.0 MHz - 84 - - 159 - - 120 - - 1.4 - - - 130 RDS(on) ID = 9.9 Ab VGS = 10 V Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Output Capacitance Coss Effective Output Capacitance Effective Output Capacitance (Energy Related) Coss eff. Rg Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) Turn-Off Delay Time Fall Time VDS = 0 V to 400 V Coss eff. (ER) Internal Gate Resistance Rise Time VGS = 0 V tr td(off) tf f = 1 MHz, open drain VGS = 10 V ID = 16 A, VDS = 400 V see fig. 7 and 15b VDD = 250 V, ID = 16 A RG = 7.5 Ω, VGS = 10 V see fig. 14a and 14bb - - 33 - - 59 - 21 - - 51 - - 50 - - 28 - - - 16 - - 64 pF Ω nC ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Reverse Recovery Current IS ISM VSD trr Qrr IRRM MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 16 A, VGS = 0 Vb TJ = 25 °C TJ = 125 °C TJ = 25 °C IF = 16 A, dI/dt = 100 A/μsb TJ = 125 °C TJ = 25 °C - - 1.5 - 170 250 - 220 330 - 470 710 - 810 1210 - 7.3 11 V ns μC Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Forward Turn-On Time ton Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %. c. COSS eff. is a fixed capacitance that gives the same charging time as COSS while VDS is rising fom 0 % to 80 % VDS. COSS eff. (ER) is a fixed capacitance that stores the same energy as COSS while VDS is rising fom 0 % to 80 % VDS. www.vishay.com 2 Document Number: 91205 S11-0446-Rev. B, 14-Mar-11 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP17N50L, SiHFP17N50L Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 100 10 VGS TOP 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V I D , Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 100 1 5.0V 0.1 TJ = 150 ° C 10 TJ = 25 ° C 1 20µs PULSE WIDTH Tj = 25°C 0.01 0.1 1 10 0.1 4.0 100 Fig. 1 - Typical Output Characteristics RDS(on) , Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) VGS TOP 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 5.0V 1 20µs PULSE WIDTH Tj = 150°C 0.1 1 10 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics Document Number: 91205 S11-0446-Rev. B, 14-Mar-11 6.0 7.0 8.0 9.0 10.0 Fig. 3 - Typical Transfer Characteristics 100 0.1 5.0 VGS , Gate-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) 10 V DS = 50V 20µs PULSE WIDTH 100 3.0 ID = 16A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( ° C) Fig. 4 - Normalized On-Resistance vs. Temperature www.vishay.com 3 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP17N50L, SiHFP17N50L Vishay Siliconix 20 100000 Coss = Cds + Cgd 10000 C, Capacitance(pF) VGS , Gate-to-Source Voltage (V) VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Ciss 1000 Coss 100 ID = 16A V DS= 400V V DS= 250V V DS= 100V 16 12 8 4 Crss 10 0 1 10 100 1000 0 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 30 60 90 120 150 QG , Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage 20 ISD , Reverse Drain Current (A) 100 Energy (µJ) 15 10 5 TJ = 150 ° C 10 TJ = 25 ° C 1 0 0 100 200 300 400 500 600 VDS, Drain-to-Source Voltage (V) Fig. 6 - Typ. Output Capacitance Stored Energy vs. VDS www.vishay.com 4 0.1 0.2 V GS = 0 V 0.6 0.9 1.3 1.6 VSD ,Source-to-Drain Voltage (V) Fig. 8 - Typical Source-Drain Diode Forward Voltage Document Number: 91205 S11-0446-Rev. B, 14-Mar-11 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP17N50L, SiHFP17N50L Vishay Siliconix RD VDS VGS 20 D.U.T. RG + - VDD ID , Drain Current (A) 16 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 12 Fig. 10a - Switching Time Test Circuit 8 VDS 4 90 % 0 25 50 75 100 125 150 TC , Case Temperature ( °C) 10 % VGS td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response(Z thJC ) 1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM 0.01 0.001 0.00001 t1 t2 Notes: 1. Duty factor D =t 1 / t 2 2. Peak TJ = P DM x ZthJC + TC 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 91205 S11-0446-Rev. B, 14-Mar-11 www.vishay.com 5 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP17N50L, SiHFP17N50L Vishay Siliconix EAS , Single Pulse Avalanche Energy (mJ) 1000 OPERATION IN THIS AREA LIMITED BY RDS(on) ID , Drain Current (A) 100 10us 10 100us 1ms 1 0.1 10ms TC = 25 °C TJ = 150 °C Single Pulse 10 100 1000 10000 800 ID 7A 10A BOTTOM 16A TOP 640 480 320 160 0 25 50 Fig. 12 - Maximum Safe Operating Area 75 100 125 150 Starting T J , Junction Temperature ( ° C) VDS , Drain-to-Source Voltage (V) Fig. 13 - Maximum Avalanche Energy vs. Drain Current VDS tp 15 V Driver L VDS D.U.T RG IAS 20 V tp + - VDD A 0.01Ω Fig. 14a - Unclamped Inductive Test Circuit IAS Fig. 14b - Unclamped Inductive Waveforms Current regulator Same type as D.U.T. 50 kΩ QG 10 V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 15a - Basic Gate Charge Waveform www.vishay.com 6 Fig. 15b - Gate Charge Test Circuit Document Number: 91205 S11-0446-Rev. B, 14-Mar-11 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP17N50L, SiHFP17N50L Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 16. For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91205. Document Number: 91205 S11-0446-Rev. B, 14-Mar-11 www.vishay.com 7 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-247AC (High Voltage) A A 4 E B 3 R/2 E/2 7 ØP Ø k M DBM A2 S (Datum B) ØP1 A D2 Q 4 4 2xR (2) D1 D 1 2 4 D 3 Thermal pad 5 L1 C L A See view B 2 x b2 3xb 0.10 M C A M 4 E1 0.01 M D B M View A - A C 2x e A1 b4 Planting Lead Assignments 1. Gate 2. Drain 3. Source 4. Drain D DE (b1, b3, b5) Base metal E C (c) C c1 (b, b2, b4) (4) Section C - C, D - D, E - E View B MILLIMETERS DIM. MIN. MAX. A 4.58 5.31 A1 2.21 2.59 A2 1.17 2.49 b 0.99 1.40 b1 0.99 1.35 b2 1.53 2.39 b3 1.65 2.37 b4 2.42 3.43 b5 2.59 3.38 c 0.38 0.86 c1 0.38 0.76 D 19.71 20.82 D1 13.08 ECN: X13-0103-Rev. D, 01-Jul-13 DWG: 5971 INCHES MIN. MAX. 0.180 0.209 0.087 0.102 0.046 0.098 0.039 0.055 0.039 0.053 0.060 0.094 0.065 0.093 0.095 0.135 0.102 0.133 0.015 0.034 0.015 0.030 0.776 0.820 0.515 - DIM. D2 E E1 e Øk L L1 N ØP Ø P1 Q R S MILLIMETERS MIN. MAX. 0.51 1.30 15.29 15.87 13.72 5.46 BSC 0.254 14.20 16.25 3.71 4.29 7.62 BSC 3.51 3.66 7.39 5.31 5.69 4.52 5.49 5.51 BSC INCHES MIN. MAX. 0.020 0.051 0.602 0.625 0.540 0.215 BSC 0.010 0.559 0.640 0.146 0.169 0.300 BSC 0.138 0.144 0.291 0.209 0.224 0.178 0.216 0.217 BSC Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Contour of slot optional. 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body. 4. Thermal pad contour optional with dimensions D1 and E1. 5. Lead finish uncontrolled in L1. 6. Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154"). 7. Outline conforms to JEDEC outline TO-247 with exception of dimension c. 8. Xian and Mingxin actually photo. Revision: 01-Jul-13 Document Number: 91360 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000