Cypress Roadmap: Flash Memory Q2 2016 001-97268 Rev *D Owner: WIOB BUM: RHOE Flash Memory Roadmap CYPRESS CONFIDENTIAL 1 NOR Flash Memory Family Decoder S 29 G L 128 S 001-97268 Rev *D Owner: WIOB BUM: RHOE Technology: J = 110 nm Floating Gate K = 90 nm Floating Gate L = 65 nm Floating Gate N = 110 nm MirrorBit P = 90 nm MirrorBit R, S = 65 nm MirrorBit T = 45 nm MirrorBit Density: 001 = 1Mb 002 = 2Mb 004 = 4Mb 008 = 8Mb 016 = 16Mb 032 = 32Mb 064 = 64Mb 128 = 128Mb 256 = 256Mb 512 = 512Mb 01G = 1Gb 02G = 2Gb Voltage: D = 2.5V L = 3.0V S = 1.8V Family: A = Standard ADP (Address-Data Parallel) C = Burst Mode ADP (Address-Data Parallel) F = Serial G = Page Mode J = Simultaneous Read/Write ADP (Address-Data Parallel) K = HyperBus N = Burst Mode Simultaneous Read/Write ADM (Address-Data Multiplexed) P = Page Mode Simultaneous Read/Write ADP (Address-Data Parallel) V = Burst Mode Simultaneous Read/Write ADM (Address-Data Multiplexed) W = Burst Mode Simultaneous Read/Write ADP (Address-Data Parallel) X = Burst Mode Simultaneous Read/Write AADM (Address-Address-Data Multiplexed) Series: 25 = SPI 29 = NOR Prefix: S 26 = HyperFlash 70 = Stacked Die Flash Memory Roadmap CYPRESS CONFIDENTIAL 1 = 63 nm DRAM 04G = 4Gb 0CG = 64Gb 08G = 8Gb 0AG = 16Gb 0BG = 32Gb 27 = HyperRAM 79 = Dual Quad SPI Product Selector Guide 2 Parallel NOR Flash Memory Portfolio S29AS-J 110 nm, 1.8 V S29AL-J 110 nm, 3.0 V S29JL-J1 110 nm, 3.0 V S29PL-J1, 2 110 nm, 3.0 V S29GL-N2 110 nm, 3.0 V All parts supported by Longevity Program unless noted 128Mb 60 ns / 20 ns * I, A ≤32Mb 64-128Mb ≥256Mb Density Initial / Page Access * Temp Range 16Mb 70 ns / -* I, A 16Mb 55 ns / -* I, A, N, M 8Mb 70 ns / -* I, A 8Mb 55 ns / -* I, A, N, M * I = Industrial: -40ºC to +85ºC A = Industrial, AEC-Q100: -40ºC to +85ºC V = Industrial-plus: -40ºC to +105ºC B = Industrial-plus, AEC-Q100: -40ºC to +105ºC 001-97268 Rev *D Owner: WIOB BUM: RHOE 64Mb 55 ns / -* I, A 64Mb 55 ns / 20 ns * I, A 64Mb 90 ns / 25 ns * I, A 32Mb 60 ns / -* I, A 32Mb 55 ns / 20 ns * I, A 32Mb 90 ns / 25 ns * I, A N = Extended: -40ºC to +125ºC M = Extended, AEC-Q100: -40ºC to +125ºC 1 Supports Simultaneous Read/Write Operation 2 Supports Page Mode 3 S70 series (stacked die) Flash Memory Roadmap CYPRESS CONFIDENTIAL S29GL-P2 90 nm, 3.0 V S29GL-S2 65 nm, 3.0 V S29GL-T2 45 nm, 3.0 V 2Gb3 110 ns / 25 ns *I 2Gb3 110 ns / 20 ns * I, A, V, B 2Gb3 110 ns / 20 ns * I, A, V, B, N, M 1Gb 110 ns / 25 ns *I 1Gb 100 ns / 15 ns * I, A, V, B 1Gb 100 ns / 15 ns * I, A, V, B, N, M 512Mb 100 ns / 25 ns *I 512Mb 100 ns / 15 ns * I, A, V, B 512Mb 100 ns / 15 ns * I, A, V, B, N, M 256Mb 90 ns / 25 ns *I 256Mb 90 ns / 15 ns * I, A, V, B 128Mb 90 ns / 25 ns *I 128Mb 90 ns / 15 ns * I, A, V, B 64Mb 70 ns / 15 ns * I, A, B, N Concept Development Sampling Status Availability EOL (Last-Time-Ship) QQYY Production QQYY QQYY 3 Burst NOR Flash Memory Portfolio S29NS-P2 90 nm, 1.8 V Density Initial Access / SDR Clock * Temp Range All parts supported by Longevity Program unless noted 512Mb 80 ns / 104 MHz *W 512Mb 80 ns / 83 MHz *W S29VS-R2 65 nm, 1.8 V S29XS-R3 65 nm, 1.8 V 256Mb 80 ns / 104 MHz *W 256Mb 80 ns / 108 MHz * W, I 256Mb 80 ns / 108 MHz * W, I 128Mb 80 ns / 104 MHz *W 128Mb 80 ns / 108 MHz * W, I 128Mb 80 ns / 108 MHz * W, I 64Mb 80 ns / 108 MHz * W, I 64Mb 80 ns / 108 MHz * W, I ≤32Mb 64-128Mb ≥256Mb S29WS-P1 90 nm, 1.8 V * W = Wireless: -25ºC to +85ºC I = Industrial: -40ºC to +85ºC A = Industrial, AEC-Q100: -40ºC to +85ºC N = Extended: -40ºC to +125ºC M = Extended, AEC-Q100: -40ºC to +125ºC 001-97268 Rev *D Owner: WIOB BUM: RHOE H = Hot: -40ºC to +145ºC T = Hot, AEC-Q100: -40ºC to +145ºC 1 ADP (Address Data Parallel) Burst 2 ADM (Address Data Multiplex) Burst 3 AADM (Address high, Address low, Data Multiplex) Burst Flash Memory Roadmap CYPRESS CONFIDENTIAL S29CD-J1 110 nm, 2.5 V S29CL-J1 110 nm, 3.0 V 32Mb 54 ns / 75 MHz * I, A, N, M, H, T 32Mb 54 ns / 75 MHz * I, A, N, M, H, T 16Mb 54 ns / 66 MHz * I, A, N, M, H, T 16Mb 54 ns / 66 MHz * I, A, N, M, H, T Concept Development Sampling Status Availability EOL (Last-Time-Ship) QQYY Production QQYY QQYY 4 SPI NOR Flash Memory Portfolio S25FL1-K 90 nm, 3.0 V 4KB2 S25FL-L 65 nm, 3.0 V 4KB2 S25FL-P 90 nm, 3.0 V >4KB2 Density SDR Clock / DDR Clock * Temp Range All parts supported by Longevity Program unless noted 64-128Mb ≥256Mb S25FL2-K1 90 nm, 3.0 V 4KB2 64Mb 108 MHz / -* I, A, V, B, N4, M4 S79FL-S3 65 nm, 3.0 V >4KB2 S25FS-S 65 nm, 1.8 V >4KB2 1Gb5 133 MHz / 80 MHz * I, A, V, B 1Gb 133 MHz / 80 MHz * I, A, V, B 1Gb5 133 MHz / 80 MHz * I, A, V, B 512Mb 133 MHz / 80 MHz * I, A, V, B 512Mb 133 MHz / 80 MHz * I, A, V, B 512Mb 133 MHz / 80 MHz * I, A, V, B 256Mb 133 MHz / 80 MHz * I, A, V, B 256Mb 133 MHz / 80 MHz * I, A, V, B 256Mb Q216 133 MHz / 66 MHz * I, A, V, B, N, M 256Mb5 104 MHz / -* I, A 256Mb 133 MHz / 80 MHz * I, A, V, B, N, M 128Mb 133 MHz / 66 MHz * I, A, V, B, N, M 128Mb6 104 MHz / -* I, A, V, B 128Mb8 133 MHz / 80 MHz * I, A, V, B, N, M 128Mb7 104 MHz / -* I, A, V, B 128Mb9 108 MHz / -* I, A, V, B 64Mb 108 MHz / -* I, A, V, B, N, M 64Mb 104 MHz / -* I, A, V, B 32Mb 108 MHz / -* I, A, V, B, N4, M4 ≤32Mb S25FL-S 65 nm, 3.0 V >4KB2 128Mb 133 MHz / 80 MHz * I, A, V, B 64Mb Q216 133 MHz / 80 MHz * I, A, V, B, N, M 32Mb 104 MHz / -* I, A, V, B 16Mb 108 MHz / -* I, A, V, B, N4, M4 Q117 8Mb 76 MHz / -*I * I = Industrial: -40ºC to +85ºC A = Industrial, AEC-Q100: -40ºC to +85ºC V = Industrial-plus: -40ºC to +105ºC B = Industrial-plus, AEC-Q100: -40ºC to +105ºC N = Extended: -40ºC to +125ºC M = Extended, AEC-Q100: -40ºC to +125ºC 001-97268 Rev *D Owner: WIOB BUM: RHOE 1 7 2 8 S25FL2-K Dual SPI Logical sector size 3 S79 series, Dual Quad SPI (stacked die) 4 Contact Sales 5 S70 series (stacked die) 6 S25FL129P Quad SPI S25FL128P Dual SPI S25FL128S 133-MHz SDR / 80-MHz DDR 9 S25FL127S 108-MHz SDR Status Availability EOL (Last-Time-Ship) Flash Memory Roadmap CYPRESS CONFIDENTIAL Concept Development Sampling QQYY Production QQYY QQYY 5 HyperFlash and HyperRAM Portfolio HyperFlash S26KS-S1 65 nm, 1.8 V HyperFlash S26KL-S1 65 nm, 3.0 V HyperRAM S27KS-12 63 nm, 1.8 V HyperRAM S27KL-12 63 nm, 3.0 V Density Initial Access / DDR Clock * Temp Range 64-128Mb ≥256Mb All parts supported by Longevity Program unless noted 1Gb3 96 ns / 166 MHz * I, A, V, B, N, M 1Gb3 96 ns / 100 MHz * I, A, V, B, N, M 512Mb 96 ns / 166 MHz * I, A, V, B, N4, M4 512Mb 96 ns / 100 MHz * I, A, V, B, N4, M4 256Mb 96 ns / 166 MHz * I, A, V, B, N4, M4 256Mb 96 ns / 100 MHz * I, A, V, B, N4, M4 256Mb3 Contact Sales 256Mb3 Contact Sales 128Mb 96 ns / 166 MHz * I, A, V, B, N4, M4 128Mb 96 ns / 100 MHz * I, A, V, B, N4, M4 128Mb3 Contact Sales 128Mb3 Contact Sales Q316 64Mb 36 ns / 166 MHz * I, A, V, B * C = Commercial: -0ºC to +70ºC I = Industrial: -40ºC to +85ºC A = Industrial, AEC-Q100: -40ºC to +85ºC V = Industrial-plus: -40ºC to +105ºC B = Industrial-plus, AEC-Q100: -40ºC to +105ºC 001-97268 Rev *D Owner: WIOB BUM: RHOE N = Extended: -40ºC to +125ºC M = Extended, AEC-Q100: -40ºC to +125ºC 1 S26 = HyperFlash 2 S27 = HyperRAM 3 S70 series (stacked die) 4 Contact sales Flash Memory Roadmap CYPRESS CONFIDENTIAL Q316 64Mb 36 ns / 100 MHz * I, A, V, B Concept Development Sampling Status Availability EOL (Last-Time-Ship) QQYY Production QQYY QQYY 6 NAND and e.MMC Family Decoder NAND S 34 M L 08G 2 Technology: 1 = 4x nm 2 = 32 nm Density: 01G = 1Gb 02G = 2Gb 04G = 4Gb 08G = 8Gb Voltage: L = 3.0V S = 1.8V Family: M = NAND (Address-Data Multiplexed) Series: 34 = NAND Prefix: S 16G = 16Gb S = SecureNAND (Address-Data Multiplexed) e.MMC S 40 41 016 1 B1 Controller: B1 = e.MMC 4.51 1 Multi-level 001-97268 Rev *D B2 = e.MMC 5.1 Revision: 1 = NAND MLC1 19 nm 2 = NAND MLC1 15 nm Density: 004 = 4GB 008 = 8GB 016 = 16GB 032 = 32GB 064 = 064GB Controller Architecture: 41 = e.MMC Series: 40 = Managed Memory Prefix: S cell Owner: WIOB BUM: RHOE Flash Memory Roadmap CYPRESS CONFIDENTIAL Product Selector Guide 7 SLC NAND Portfolio S34ML-11 4x nm, 3.0 V SLC, ONFI 1.02 S34MS-11 4x nm, 1.8 V SLC, ONFI 1.02 S34ML-23 32 nm, 3.0 V SLC, ONFI 1.02 S34MS-23 32 nm, 1.8 V SLC, ONFI 1.02 S34SL-23, 4 32 nm, 3.0 V SLC, ONFI 1.02 8Gb-16Gb Density; Bus Width Interface Bandwidth * Temp Range All parts supported by Longevity Program unless noted 1Gb-4Gb 8Gb; x8 Q217 40 MBps * I, A, V 5, B 16Gb; x8 40 MBps * I, A5, V5, B5 8Gb; x8 40 MBps * I, A, V, B 8Gb; x8 40 MBps * I, A, V, B 4Gb; x8/16 40 MBps * I, A, V , B Q217 4Gb; x8 40 MBps * I, A5, V, B Q217 4Gb; x8 40 MBps * I, A, V, B 4Gb; x8/16 40 MBps * I, A, V, B 4Gb; x8 40 MBps * I, V 2Gb; x8/16 40 MBps * I, A, V, B Q217 2Gb; x8/16 40 MBps * I, A5, V, B Q217 2Gb; x8 40 MBps * I, A5, V5, B5 2Gb; x8/16 40 MBps * I, A5, V5, B5 2Gb; x8 40 MBps * I, V5 1Gb; x8 40 MBps * I, A, V, B Q217 1Gb; x8/16 40 MBps * I, A5, V, B Q217 1Gb; x8/16 40 MBps * I, A, V, B 1Gb; x8/16 40 MBps * I, A, V, B 1Gb; x8 40 MBps * I, V * I = Industrial: -40°C to +85°C A = Industrial, AEC-Q100: -40°C to +85°C V = Industrial-plus: -40°C to +105°C B = Industrial-plus, AEC-Q100: -40°C to +105°C 001-97268 Rev *D 16Gb; x8 40 MBps * I, A5, V5, B5 Owner: WIOB BUM: RHOE 1 1-bit Error-Correcting Code (ECC) NAND Flash Interface 3 4-bit Error-Correcting Code (ECC) 4 SecureNAND™: Cypress’s SLC NAND Flash Memory with full-capacity Volatile and Nonvolatile Block Protection 5 Contact Sales 2 Open Flash Memory Roadmap CYPRESS CONFIDENTIAL Concept Development Sampling Status Availability EOL (Last-Time-Ship) QQYY Production QQYY QQYY 8 e.MMC Portfolio S4041-1B1 19 nm, 3.0-V MLC, e.MMC1 4.51 S4041-2B2 15 nm, 3.0-V MLC, e.MMC1 5.1 32GB-64GB Density; Bus Width Interface Bandwidth * Temp Range 64GB; x8 400 MBps * W, I, A 8GB-16GB 32GB; x8 400 MBps * W, I, A 16GB; x8 200 MBps * W, I Q117 16GB; x8 400 MBps * W, I, A 8GB; x8 200 MBps * W, I Q117 8GB; x8 400 MBps * W, I, A Concept Development Sampling * W = Embedded: -25ºC to +85ºC I = Industrial: -40ºC to +85ºC A = Industrial, AEC-Q100: -40ºC to +85ºC 001-97268 Rev *D Owner: WIOB BUM: RHOE 1 e.MMC = Embedded Multi Media Card Flash Memory Roadmap CYPRESS CONFIDENTIAL Status Availability EOL (Last-Time-Ship) QQYY Production QQYY QQYY 9 Flash and RAM MCP Decoder S 71 N S 512 R D RAM Density: A = 16Mb B = 32Mb C = 64Mb D = 128Mb E = 256Mb Flash Technology: N = 110 nm MirrorBit P = 90 nm MirrorBit R, S = 65 nm MirrorBit Flash Density: 032 = 32Mb 064 = 64Mb 128 = 128Mb 256 = 256Mb 512 = 512Mb 01G = 1Gb Voltage: L = 3.0V Family: G = Page Mode N = Burst Mode Simultaneous Read/Write ADM (Address-Data Multiplexed) V = Burst Mode Simultaneous Read/Write ADM (Address-Data Multiplexed) W = Burst Mode Simultaneous Read/Write ADP (Address-Data Parallel) X = Burst Mode Simultaneous Read/Write AADM (Address-Address-Data Multiplexed) Series: 71, 98 = NOR Flash + pSRAM Prefix: S Memory Type: 2 = NAND SLC, x16 NAND, x16 LPDDR1, 200 MHz DDR, 1.8 V RAM Density: 9 = 512Mb Flash Density: A = 1Gb Voltage: L = 3.0V Family: M = NAND Series: 76 = NAND Flash + DRAM Prefix: S S = 1.8V 72 = NOR Flash + DRAM S 76 M S A 9 2 001-97268 Rev *D Owner: WIOB BUM: RHOE S = 1.8V Flash Memory Roadmap CYPRESS CONFIDENTIAL Product Selector Guide 10 Flash and RAM MCP Memory Portfolio S71WS-P1 90 nm, 1.8 V S71NS-P2 90 nm, 1.8 V S71VS-R2 65 nm, 1.8 V S72VS-R3 65 nm, 1.8 V S72XS-R3 65 nm, 1.8 V S98GL-N4 110 nm, 3.0 V ≥256Mb Flash Density RAM Density * Temp Range All parts supported by Longevity Program unless noted 1Gb 512Mb *I 512Mb 128Mb *W 256Mb 256Mb6 *I 256Mb 128Mb *W 256Mb 64Mb *W 256Mb 256Mb *W 256Mb 256Mb7 * W, I Q117 256Mb 64Mb *W 64-128Mb 128Mb 64Mb *W 128Mb 32Mb *W 64Mb 32Mb *W * W = Wireless: -25ºC to +85ºC I = Industrial: -40ºC to +85ºC 1 ADP (Address Data Parallel) Burst 2 ADM (Address Data Multiplex) Burst 3 AADM Owner: WIOB BUM: RHOE 64Mb 32Mb *I (Address high, Address low, Data Multiplex) Burst Page Mode Concept Development Sampling 4 Parallel, Status Availability EOL (Last-Time-Ship) 5 NAND 6 DRAM 7 DRAM 001-97268 Rev *D S76MS5 3x nm, 1.8 V Version 2 Version 1 Flash Memory Roadmap CYPRESS CONFIDENTIAL QQYY Production QQYY QQYY 11 Parallel NOR Flash Memory Packages Family Density Device 48-ball FBGA 48-ball FBGA 56-ball BGA 64-ball BGA 64-ball Fortified BGA (0.8-mm pitch) (0.5-mm pitch) (0.8-mm pitch) (0.8-mm pitch) (1.0-mm pitch) AS-J AL-J JL-J PL-J GL-N GL-P GL-S GL-T S29AS008J 16Mb S29AS016J 8Mb S29AL008J 16Mb S29AL016J 32Mb S29JL032J 64Mb S29JL064J 32Mb S29PL032J 64Mb S29PL064J 128Mb S29PL127J 32Mb S29GL032N 64Mb S29GL064N 128Mb S29GL128P 256Mb S29GL256P 512Mb 1Gb 8Mb 56-pin TSOP KGD S29GL512P S29GL01GP 2Gb S70GL02GP 64Mb S29GL064S 128Mb S29GL128S 256Mb S29GL256S 512Mb S29GL512S 1Gb S29GL01GS 2Gb S70GL02GS 512Mb S29GL512T 1Gb S29GL01GT 2Gb 001-97268 Rev *D 48-pin TSOP S70GL02GT Owner: WIOB BUM: RHOE Flash Memory Roadmap CYPRESS CONFIDENTIAL 12 Burst NOR Flash Memory Packages Family WS-P NS-P VS-R XS-R 44-ball FBGA (0.5-mm pitch) 64-ball BGA (0.5-mm pitch) 84-ball Fortified BGA (0.8-mm pitch) 80-ball FBGA (1.0-mm pitch) 80-pin PQFP KGD S29CD016J 32Mb S29CD032J 16Mb S29CL016J 32Mb S29CL032J Density Device 128Mb S29WS128P 256Mb S29WS256P 512Mb S29WS512P 512Mb S29NS512P 64Mb S29VS064R 128Mb S29VS128R 256Mb S29VS256R 64Mb S29XS064R 128Mb S29XS128R 256Mb S29XS256R 16Mb CD-J CL-J 001-97268 Rev *D Owner: WIOB BUM: RHOE Flash Memory Roadmap CYPRESS CONFIDENTIAL 13 SPI NOR Flash Memory Packages Family Density Device FL2-K 8Mb 16Mb 32Mb 64Mb 64Mb 128Mb 256Mb 32Mb 64Mb 128Mb 128Mb 256Mb 128Mb 128Mb 256Mb 512Mb 1Gb 256Mb 512Mb 1Gb 64Mb 128Mb 256Mb 512Mb 1Gb S25FL208K S25FL116K S25FL132K S25FL164K S25FL064L S25FL128L S25FL256L S25FL032P S25FL064P S25FL128P S25FL129P S70FL256P S25FL127S S25FL128S S25FL256S S25FL512S S70FL01GS S79FL256S S79FL512S S79FL01GS S25FS064S S25FS128S S25FS256S S25FS512S S70FS01GS FL1-K FL-L FL-P FL-S FL-S Dual Quad FS-S SOIC-8 150 mil SOIC-8 208 mil UD UD UD SOIC-16 300 mil USON 4 x 3 mm WSON 4 x 4 mm WSON 6 x 5 mm CF CF UD UD UD UD WSON 8 x 6 mm VSOP8 208 mil UD LGA (CF) LGA (UD) CF CF BGA24 8 x 6 mm 5 x 5 ball BGA24 8 x 6 mm 4 x 6 ball UD UD UD UD KGD CF = Contact Factory UD = Under Development 001-97268 Rev *D Owner: WIOB BUM: RHOE Flash Memory Roadmap CYPRESS CONFIDENTIAL 14 HyperFlash and HyperRAM Packages Family KS-S KL-S KS-1 KL-1 BGA24 8 x 6 mm 5 x 5 ball KGD S26KS128S CF 256Mb S26KS256S CF 512Mb S26KS512S CF 1Gb S70KS01GS 128Mb S26KL128S CF 256Mb S26KL256S CF 512Mb S26KL512S CF 1Gb S70KL01GS 64Mb S26KS0641 128Mb S70KS1281 256Mb S70KS2561 64Mb S26KL0641 128Mb S70KL1281 256Mb S70KL2561 Density Device 128Mb CF CF CF = Contact Factory 001-97268 Rev *D Owner: WIOB BUM: RHOE Flash Memory Roadmap CYPRESS CONFIDENTIAL 15 SLC NAND and e.MMC Packages Family ML-1 ML-2 MS-1 MS-2 41-1B1 41-2B2 001-97268 Rev *D 63-ball BGA (0.8-mm pitch) 67-ball BGA (0.8-mm pitch) 153-ball FBGA (0.5-mm pitch) 100-ball LBGA (1.0-mm pitch) 48-pin TSOP Density Device 1Gb S34ML01G1 2Gb S34ML02G1 4Gb S34ML04G1 8Gb S34ML08G1 1Gb S34ML01G2 2Gb S34ML02G2 4Gb S34ML04G2 8Gb S34ML08G2 16Gb S34ML16G2 1Gb S34MS01G1 2Gb S34MS02G1 4Gb S34MS04G1 1Gb S34MS01G2 2Gb S34MS02G2 4Gb S34MS04G2 8Gb S34MS08G2 16Gb S34MS16G2 8GB S40410081B1 16GB S40410161B1 8GB S40410082B2 16GB S40410162B2 32GB S40410322B2 64GB S40410642B2 Owner: WIOB BUM: RHOE Flash Memory Roadmap CYPRESS CONFIDENTIAL 16 Flash and RAM MCP Memory Packages 56-ball Very Thin FBGA (0.5-mm pitch) 56-ball FBGA (0.8-mm pitch) 84-ball FBGA (0.8-mm pitch) 130-ball BGA (0.65-mm pitch) 133-ball FBGA (0.5-mm pitch) Family Flash Density RAM Density S71WS-P 256Mb 64Mb S71NS-P 512Mb 128Mb 256Mb 128Mb 256Mb 64Mb 128Mb 64Mb 128Mb 32Mb 64Mb 32Mb S72VS-R 256Mb 256Mb S72XS-R 256Mb 256Mb 256Mb 256Mb 64Mb 32Mb 1Gb 512Mb S71VS-R S98GL-N S76MS 001-97268 Rev *D Owner: WIOB BUM: RHOE Flash Memory Roadmap CYPRESS CONFIDENTIAL 17 APPENDIX 001-97268 Rev *D Owner: WIOB BUM: RHOE Flash Memory Roadmap CYPRESS CONFIDENTIAL 18 Cypress 3.0-V 64Mb (S25FL064L) Quad SPI NOR Flash Memory Applications Block Diagram Set-top boxes Printers White goods Smart meters Automotive instrument clusters and infotainment systems 64Mb Quad SPI NOR Flash Memory CS#8 SRAM SCK8 Features IO08 Operating voltage range: 2.7 V to 3.6 V 100,000 Program1/Sector Erase2 endurance cycles3 20-year data retention at +55°C SDR4 clock rate: 108-MHz QIO5 DDR6 clock rate: N/A Program1 time (256B): 0.70 ms (typical) Sector Erase2 time (64KB): 400 ms (typical) Industrial temp range (AEC-Q100 optional): -40°C to +85°C Industrial-plus temp range (AEC-Q100 optional): -40°C to +105°C Extended temp range (AEC-Q100 optional): -40°C to +125°C Packages: 8-SOIC 208 mil, 8-WSON7 4 mm x 4 mm or 5 mm x 6 mm, 24-ball BGA 6 mm x 8 mm I/O IO28 IO38 Array Right Control Logic RD10 Data Path RESET#9 Availability S25FL064L Cypress FL-L SPI NOR Flash Memory Sampling: Production: The operation required to change a value “1” to a value “0” in NOR Flash memory The operation required prior to a NOR Flash Memory Program, in which all the bits in a Sector are set to value “1” 3 The number of times a NOR Flash Memory Sector can be Programmed/Erased before it wears out 4 Single-data-rate: A mode of data transfer in which data is transferred once per clock cycle 5 2 6 Owner: WIOB BUM: RHOE TBD TBD Quad input/output (QIO): An interface that transfers addresses or data on four I/O’s simultaneously Double-data-rate: A mode of data transfer in which data is transferred twice per clock cycle 7 Very, Very Thin, Small-Outline, No-Lead semiconductor package 8 Signals used for standard Quad (x4) SPI interface. 9 RESET# is an optional signal available on 16-SOIC and BGA packages. 10 Read data buffer 1 001-97268 Rev *D X/Y Decoder IO18 Collateral Datasheet: App Notes: Array Left Flash Memory Roadmap CYPRESS CONFIDENTIAL Product Overview 19 Cypress 3.0-V 128Mb (S25FL128L) Quad SPI NOR Flash Memory Applications Block Diagram Video game consoles Advanced driver assistance systems (ADAS) Automotive instrument clusters and infotainment systems White goods Set-top boxes 128Mb Quad SPI NOR Flash Memory CS#8 SRAM SCK8 Features IO08 Operating voltage range: 2.7 V to 3.6 V 100,000 Program1/Sector Erase2 endurance cycles3 20-year data retention at +55°C SDR4 clock rate: 133-MHz QIO5 DDR6 clock rate: 66-MHz QIO5 Program1 time (256B): 0.30 ms (typical) Sector Erase2 time (64KB): 270 ms (typical) Industrial temp range (AEC-Q100 optional): -40°C to +85°C Industrial-plus temp range (AEC-Q100 optional): -40°C to +105°C Extended temp range (AEC-Q100 optional): -40°C to +125°C Packages: 16-SOIC 300 mil, 8-WSON7 5 mm x 6 mm, 24-ball BGA 6 mm x 8 mm I/O IO28 IO38 Array Right Control Logic RD10 Data Path RESET#9 Availability S25FL128L Cypress FL-L SPI NOR Flash Memory Sampling: Production: The operation required to change a value “1” to a value “0” in NOR Flash memory The operation required prior to a NOR Flash Memory Program, in which all the bits in a Sector are set to value “1” 3 The number of times a NOR Flash Memory Sector can be Programmed/Erased before it wears out 4 Single-data-rate: A mode of data transfer in which data is transferred once per clock cycle 5 2 6 Owner: WIOB BUM: RHOE TBD TBD Quad input/output (QIO): An interface that transfers addresses or data on four I/O’s simultaneously Double-data-rate: A mode of data transfer in which data is transferred twice per clock cycle 7 Very, Very Thin, Small-Outline, No-Lead semiconductor package 8 Signals used for standard Quad (x4) SPI interface. Refer to the S25FL128L datasheet for signal definitions in the x1 and x2 mode. 9 RESET# is an optional signal available on 16-SOIC and BGA packages. 10 Read data buffer 1 001-97268 Rev *D X/Y Decoder IO18 Collateral Datasheet: App Notes: Array Left Flash Memory Roadmap CYPRESS CONFIDENTIAL Product Overview 20 Cypress 3.0-V 256Mb (S25FL256L) Quad SPI NOR Flash Memory Applications Block Diagram Video game consoles Advanced driver assistance systems (ADAS) Automotive instrument clusters and infotainment systems Networking devices Set-top boxes 256Mb Quad SPI NOR Flash Memory CS#8 SRAM SCK8 Features IO08 Operating voltage range: 2.7 V to 3.6 V 100,000 Program1/Sector Erase2 endurance cycles3 20-year data retention at +55°C (typical) SDR4 clock rate: 133-MHz QIO5 DDR6 clock rate: 66-MHz QIO5 Program1 time (256B): 0.30 ms (typical) Sector Erase2 time (64KB): 270 ms (typical) Industrial temp range (AEC-Q100 optional): -40°C to +85°C Industrial-plus temp range (AEC-Q100 optional): -40°C to +105°C Extended temp range (AEC-Q100 optional.): -40°C to +125°C Packages: 16-SOIC 300 mil, 8-WSON7 6 mm x 8 mm, 24-ball BGA 6 mm x 8 mm I/O IO28 IO38 Array Right Control Logic RD10 Data Path RESET#9 Availability S25FL256L Cypress FL-L SPI NOR Flash Memory Sampling: Production: 1 The 5 2 The operation required to change a value “1” to a value “0” in NOR Flash memory operation required prior to a NOR Flash Memory Program, in which all the bits in a Sector are set to value “1” 3 The number of times a NOR Flash Memory Sector can be Programmed/Erased before it wears out 4 Single-data-rate: A mode of data transfer in which data is transferred once per clock cycle 6 001-97268 Rev *D X/Y Decoder IO18 Collateral Datasheet: App Notes: Array Left Owner: WIOB BUM: RHOE Now Q2 2016 Quad input/output (QIO): An interface that transfers addresses or data on four I/Os simultaneously Double-data-rate: A mode of data transfer in which data is transferred twice per clock cycle 7 Very, Very Thin, Small-Outline, No-Lead semiconductor package 8 Signals used for standard Quad (x4) SPI interface; refer to the S25FL256L datasheet for signal definitions in the x1 and x2 mode 9 RESET# is an optional signal available on 16-SOIC and BGA packages 10 Read data buffer Flash Memory Roadmap CYPRESS CONFIDENTIAL Product Overview 21 Cypress 3.0-V 1Gb (S34SL01G2) SecureNAND™ Flash Memory Applications Block Diagram 1Gb SecureNAND Flash Memory Set-top boxes Point-of-sale systems Wearables R/B#6 CE#6 WE#6 RE#6 1Gb SLC NAND Flash Memory ALE6 Features CLE6 Operating voltage range: 2.7 V to 3.6 V 100,000 Program/Block Erase endurance cycles1 (typical) 10-year data retention at +55°C (typical) Error-Correcting Code (ECC)2 requirement: 4-bit ECC3 Volatile and Nonvolatile Block Protection4 Random read5 access time: 30 µs (maximum) Program time: 700 µs (maximum) Block Erase time: 10 ms (maximum) Industrial temp range: -40°C to +85°C Package: 63-ball BGA 9 mm x 11 mm I/O0 – I/O76 8 8 WPN#8 Security Controller WP#6 VPE7 Collateral Datasheet: Availability Contact Sales 1 The Sampling: Production: number of times a Flash Memory Block can be Programmed/Erased before it wears out 2 Data encoded with extra parity bits to detect and correct bit errors 3 The maximum number of bit errors that need to be corrected per 528 bytes 4 Security features that provide protection from Program/Erase operations in which settings are reset or maintained on power loss 001-97268 Rev *D Owner: WIOB BUM: RHOE Now Now 5 Read operation that accesses data using random addressing used for the standard Open NAND Flash Interface (ONFI) 1.0 specification 7 VPE is a signal used for Volatile Block Protection 8 WPN# is an internal signal used to prevent Program/Erase operations on the SLC NAND Flash Memory 6 Signals Flash Memory Roadmap CYPRESS CONFIDENTIAL Product Overview 22 Cypress 3.0-V 2Gb (S34SL02G2) SecureNAND™ Flash Memory Applications Block Diagram 2Gb SecureNAND Flash Memory Set-top boxes Point-of-sale systems Wearables R/B#6 CE#6 WE#6 RE#6 2Gb SLC NAND Flash Memory ALE6 Features CLE6 Operating voltage range: 2.7 V to 3.6 V 100,000 Program/Block Erase endurance cycles1 (typical) 10-year data retention at +55°C (typical) Error-Correcting Code (ECC)2 requirement: 4-bit ECC3 Volatile and Nonvolatile Block Protection4 Random read5 access time: 30 µs (maximum) Program time: 700 µs (maximum) Block Erase time: 10 ms (maximum) Industrial temp range: -40°C to +85°C Package: 63-ball BGA 9 mm x 11 mm I/O0 – I/O76 8 8 WPN#8 Security Controller WP#6 VPE7 Collateral Datasheet: Availability Contact Sales 1 The Sampling: Production: number of times a Flash Memory Block can be Programmed/Erased before it wears out 2 Data encoded with extra parity bits to detect and correct bit errors 3 The maximum number of bit errors that need to be corrected per 544 bytes 4 Security features that provide protection from Program/Erase operations in which settings are reset or maintained on power loss 001-97268 Rev *D Owner: WIOB BUM: RHOE Now Now 5 Read operation that accesses data using random addressing used for the standard Open NAND Flash Interface (ONFI) 1.0 specification 7 VPE is a signal used for Volatile Block Protection 8 WPN# is an internal signal used to prevent Program/Erase operations on the SLC NAND Flash Memory 6 Signals Flash Memory Roadmap CYPRESS CONFIDENTIAL Product Overview 23 Cypress 3.0-V 4Gb (S34SL04G2) SecureNAND™ Flash Memory Applications Block Diagram 4Gb SecureNAND Flash Memory Set-top boxes Point-of-sale systems Wearables R/B#6 CE#6 WE#6 RE#6 4Gb SLC NAND Flash Memory ALE6 Features CLE6 Operating voltage range: 2.7 V to 3.6 V 100,000 Program/Block Erase endurance cycles1 (typical) 10-year data retention at +55°C (typical) Error-Correcting Code (ECC)2 requirement: 4-bit ECC3 Volatile and Nonvolatile Block Protection4 Random read5 access time: 30 µs (maximum) Program time: 700 µs (maximum) Block Erase time: 10 ms (maximum) Industrial temp range: -40°C to +85°C Package: 63-ball BGA 9 mm x 11 mm I/O0 – I/O76 8 8 WPN#8 Security Controller WP#6 VPE7 Collateral Datasheet: Availability Contact Sales 1 The Sampling: Production: number of times a Flash Memory Block can be Programmed/Erased before it wears out 2 Data encoded with extra parity bits to detect and correct bit errors 3 The maximum number of bit errors that need to be corrected per 544 bytes 4 Security features that provide protection from Program/Erase operations in which settings are reset or maintained on power loss 001-97268 Rev *D Owner: WIOB BUM: RHOE Now Now 5 Read operation that accesses data using random addressing used for the standard Open NAND Flash Interface (ONFI) 1.0 specification 7 VPE is a signal used for Volatile Block Protection 8 WPN# is an internal signal used to prevent Program/Erase operations on the SLC NAND Flash Memory 6 Signals Flash Memory Roadmap CYPRESS CONFIDENTIAL Product Overview 24 Cypress’s 32-nm 1Gb/2Gb/4Gb SLC NAND Flash Memory Block Diagram Applications Automotive instrument clusters and infotainment systems Industrial automation Networking equipment Consumer electronics 1Gb/2Gb/4Gb SLC NAND Flash Memory Embedded Voltage Control R/B#9 WP#9 Features X Decoder Array CE#9 Operating voltage range: 2.7 V to 3.6 V 100,000 P/E Endurance Cycles1 (typical) 10-year data retention at +55°C (typical) Error-Correcting Code (ECC)2: 4-bit3 ECC Open NAND Flash Interface (ONFI)4 1.0 support Random read5 access time: 256 µs (maximum) Program time: 700 µs (maximum) Block erase time: 10 ms (maximum) Industrial temperature range, AEC-Q1007: -40°C to +85°C Industrial-plus temperature range, AEC-Q1007: -40°C to +105°C Packages: 48-pin TSOP 12 mm x 20 mm, 63-ball BGA 9 mm x 11 mm, 678-ball BGA 6.5 mm x 8 mm RE#9 I/O ALE9 CLE9 I/O0-I/O79 Control Logic Page Buffer Y Decoder 8 Availability Collateral Sampling: Production: Datasheets: 1Gb: S34ML01G2, 2Gb: S34ML02G2, 4Gb: S34ML04G2 1 The number of times a Flash Memory Block can be Programmed or Erased before it wears out 2 Data encoded with extra parity bits to detect and correct bit errors 3 The maximum number of bit errors that need to be corrected per 528 bytes 4 An open interface standard that assures the compatibility and interoperability of NAND devices from different vendors 001-97268 Rev *D WE#9 Owner: WIOB BUM: RHOE Now Now 5 Read operation that accesses data using random addressing µs for all densities, 25 µs for 1Gb density 7 An Automotive Electronics Council quality standard used to verify the reliability of ICs and qualify them for automotive applications 8 67-ball BGA is available for 1Gb and 2Gb densities 9 Signals used for the standard Open NAND Flash Interface (ONFI) 1.0 specification; see datasheets S34ML01G2, S34ML02G2 or S34ML04G2 6 30 Flash Memory Roadmap CYPRESS CONFIDENTIAL Product Overview 25 Cypress’s 32-nm 8Gb/16Gb SLC NAND Flash Memory Block Diagram Applications Automotive instrument clusters and infotainment systems Industrial automation Networking equipment Consumer electronics 8/16Gb SLC NAND Flash Memory (4Gb Stacked Dice) R/B#7 4Gb SLC NAND Flash Memory Embedded Voltage Control WP#7 CE#7 Features Operating voltage range: 2.7 V to 3.6 V 100,000 P/E Endurance Cycles1 (typical) 10-year data retention at +55C (typical) Error-Correcting Code (ECC)2: 4-bit3 ECC Open NAND Flash Interface (ONFI)4 1.0 support Random read5 access time: 30 µs (maximum) Program time: 700 µs (maximum) Block erase time: 10 ms (maximum) Industrial temperature range, AEC-Q1006: -40°C to +85°C Industrial-plus temperature range, AEC-Q1006: -40°C to +105°C Packages: 48-pin TSOP 12 mm × 20 mm, 63-ball BGA 9 mm × 11 mm Array 4Gb WE#7 RE#7 I/O ALE7 Control Logic Page Buffer CLE7 Y Decoder I/O0-I/O77 8 Availability Collateral Sampling: Production: Datasheets: 8Gb: S34ML08G2, 16Gb: S34ML16G2 1 The number of times a Flash Memory Block can be Programmed or Erased before it wears out 2 Data encoded with extra parity bits to detect and correct bit errors 3 The maximum number of bit errors that need to be corrected per 544 bytes 4 An open interface standard that assures the compatibility and interoperability of NAND devices from different vendors 001-97268 Rev *D X Decoder Owner: WIOB BUM: RHOE Now Now 5 Read operation that accesses data using random addressing Automotive Electronics Council quality standard used to verify the reliability of ICs and qualify them for automotive applications 7 Signals used for the standard Open NAND Flash Interface (ONFI) 1.0 specification – see datasheets S34ML08G2 or S34ML16G2 6 An Flash Memory Roadmap CYPRESS CONFIDENTIAL Product Overview 26