DATASHEET

CD4028BMS
CMOS BCD-To-Decimal Decoder
December 1992
Features
Pinout
• High Voltage Type (20V Rating)
CD4028BMS
TOP VIEW
• BCD-to-Decimal Decoding or Binary-to-Octal Decoding
• High Decoded Output Drive Capability
4 1
16 VDD
2 2
15 3
0 3
14 1
7 4
13 B
9 5
12 C
• Standardized Symmetrical Output Characteristics
5 6
11 D
• 100% Tested For Quiescent Current at 20V
6 7
10 A
VSS 8
9 8
• “Positive Logic” Inputs and Outputs - Decoded Outputs Go High On Selection
• Medium-Speed Operation
- tPHL, tPLH = 80ns (typ) at VDD = 10V
• Maximum Input Current of 1µA at 18V Over Full
Package-Temperature Range;
- 100nA at 18V and +25oC
• Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
Functional Diagram
VDD
3-BIT
BINARY
INPUTS
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
16
0
10
A
1
2
13
BCD
INPUTS
B
3
4
12
Applications
C
5
6
11
• Code Conversion
D
7
8
• Indication-Tube Decoder
9
• Address Decoding - Memory Selection Control
3
14
2
BUFFERED
OCTAL
DECODED
OUTPUTS
(1 OF 8)
15
1
6
7
4
BUFFERED
DECIMAL
DECODED
OUTPUTS
(1 OF 10)
9
5
8
VSS
Description
CD4028BMS types are BCD-to-decimal or binary-to-octal
decoders consisting of buffering on all 4 inputs, decoding
logic gates, and 10 output buffers. A BCD code applied to
the four inputs, A to D, results in a high level at the selected
one of 10 decimal decoded outputs. Similarly, a 3-bit binary
code applied to inputs A through C is decoded in octal code
at output 0 to 7 if D = “0”. High drive capability is provided at
all outputs to enhance dc and dynamic performance in high
fan-out applications.
The CD4028BMS is supplied in these 16-lead outline packages:
Braze Seal DIP
H4S
Frit Seal DIP
H1E
Ceramic Flatpack H3X
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-788
File Number
3303
Specifications CD4028BMS
Absolute Maximum Ratings
Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
Thermal Resistance . . . . . . . . . . . . . . . .
θja
θjc
Ceramic DIP and FRIT Package . . . . . 80oC/W
20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70oC/W
20oC/W
o
Maximum Package Power Dissipation (PD) at +125 C
For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW
For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Supply Current
SYMBOL
IDD
CONDITIONS (NOTE 1)
VDD = 20V, VIN = VDD or GND
VDD = 18V, VIN = VDD or GND
Input Leakage Current
IIL
VIN = VDD or GND
VDD = 20
VDD = 18V
Input Leakage Current
IIH
VIN = VDD or GND
VDD = 20
GROUP A
SUBGROUPS
LIMITS
TEMPERATURE
MIN
+25
-
10
µA
+125oC
-
1000
µA
3
-55oC
-
10
µA
1
+25o
C
-100
-
nA
2
+125oC
-1000
-
nA
3
-55oC
-100
-
nA
1
+25oC
-
100
nA
2
+125oC
-
1000
nA
-
100
nA
-
50
mV
-
V
3
Output Voltage
VOL15
VDD = 15V, No Load
1, 2, 3
+25oC, +125oC, -55oC
Output Voltage
VOH15
VDD = 15V, No Load (Note 3)
1, 2, 3
+25oC, +125oC, -55oC 14.95
Output Current (Sink)
IOL5
VDD = 5V, VOUT = 0.4V
UNITS
1
-55oC
VDD = 18V
MAX
2
oC
1
+25oC
0.53
-
mA
Output Current (Sink)
IOL10
VDD = 10V, VOUT = 0.5V
1
+25oC
1.4
-
mA
Output Current (Sink)
IOL15
VDD = 15V, VOUT = 1.5V
1
+25oC
3.5
-
mA
1
+25oC
-
-0.53
mA
1
+25oC
-
-1.8
mA
Output Current (Source)
Output Current (Source)
IOH5A
IOH5B
VDD = 5V, VOUT = 4.6V
VDD = 5V, VOUT = 2.5V
Output Current (Source)
IOH10
VDD = 10V, VOUT = 9.5V
1
+25oC
-
-1.4
mA
Output Current (Source)
IOH15
VDD = 15V, VOUT = 13.5V
1
+25oC
-
-3.5
mA
1
+25oC
-2.8
-0.7
V
1
+25oC
0.7
2.8
V
N Threshold Voltage
P Threshold Voltage
Functional
VNTH
VPTH
F
VDD = 10V, ISS = -10µA
VSS = 0V, IDD = 10µA
VDD = 2.8V, VIN = VDD or GND
7
+25oC
VDD = 20V, VIN = VDD or GND
7
+25oC
VDD = 18V, VIN = VDD or GND
8A
+125oC
VDD = 3V, VIN = VDD or GND
8B
-55oC
VOH > VOL <
VDD/2 VDD/2
V
Input Voltage Low
(Note 2)
VIL
VDD = 5V, VOH > 4.5V, VOL < 0.5V
1, 2, 3
+25oC, +125oC, -55oC
-
1.5
V
Input Voltage High
(Note 2)
VIH
VDD = 5V, VOH > 4.5V, VOL < 0.5V
1, 2, 3
+25oC, +125oC, -55oC
3.5
-
V
Input Voltage Low
(Note 2)
VIL
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3
+25oC, +125oC, -55oC
-
4
V
Input Voltage High
(Note 2)
VIH
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3
+25oC, +125oC, -55oC
11
-
V
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs.
7-789
3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
Specifications CD4028BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Propagation Delay
Transition Time
SYMBOL
TPHL
TPLH
CONDITIONS (NOTE 1, 2)
GROUP A
SUBGROUPS TEMPERATURE
VDD = 5V, VIN = VDD or GND
9
10, 11
TTHL
TTLH
VDD = 5V, VIN = VDD or GND
9
10, 11
+25oC
+125oC,
-55oC
+25oC
+125oC,
-55oC
LIMITS
MIN
MAX
UNITS
-
350
ns
-
473
ns
-
200
ns
-
270
ns
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
IDD
CONDITIONS
NOTES
VDD = 5V, VIN = VDD or GND
VDD = 10V, VIN = VDD or GND
VDD = 15V, VIN = VDD or GND
Output Voltage
VOL
VDD = 5V, No Load
1, 2
1, 2
1, 2
1, 2
TEMPERATURE
o
o
-55 C, +25 C
MIN
MAX
UNITS
µA
-
5
+125oC
-
150
µA
-55oC, +25oC
-
10
µA
+125oC
-
300
µA
-
10
µA
+125oC
-
600
µA
+25oC, +125oC,
-
50
mV
-55oC,
+25oC
-55oC
Output Voltage
VOL
VDD = 10V, No Load
1, 2
+25oC, +125oC,
-55oC
-
50
mV
Output Voltage
VOH
VDD = 5V, No Load
1, 2
+25oC, +125oC,
-55oC
4.95
-
V
Output Voltage
VOH
VDD = 10V, No Load
1, 2
+25oC, +125oC,
-55oC
9.95
-
V
Output Current (Sink)
IOL5
VDD = 5V, VOUT = 0.4V
1, 2
+125oC
0.36
-
mA
-55oC
0.64
-
mA
Output Current (Sink)
Output Current (Sink)
Output Current (Source)
Output Current (Source)
Output Current (Source)
Output Current (Source)
Input Voltage Low
IOL10
IOL15
IOH5A
IOH5B
IOH10
IOH15
VIL
VDD = 10V, VOUT = 0.5V
1, 2
VDD = 15V, VOUT = 1.5V
1, 2
VDD = 5V, VOUT = 4.6V
1, 2
VDD = 5V, VOUT = 2.5V
1, 2
VDD = 10V, VOUT = 9.5V
1, 2
VDD =15V, VOUT = 13.5V
VDD = 10V, VOH > 9V, VOL < 1V
1, 2
1, 2
o
+125 C
0.9
-
mA
-55oC
1.6
-
mA
+125oC
2.4
-
mA
-55oC
4.2
-
mA
+125oC
-
-0.36
mA
-55oC
-
-0.64
mA
+125oC
-
-1.15
mA
-55oC
-
-2.0
mA
+125oC
-
-0.9
mA
-55oC
-
-1.6
mA
+125oC
-
-2.4
mA
-55oC
-
-4.2
mA
+25oC, +125oC,
-
3
V
7
-
V
-55oC
Input Voltage High
VIH
VDD = 10V, VOH > 9V, VOL < 1V
7-790
1, 2
+25oC, +125oC,
-55oC
Specifications CD4028BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER
SYMBOL
Propagation Delay
TPHL
TPLH
Transition Time
VDD = 10V
TTHL
TTLH
Input Capacitance
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
1, 2, 3
+25oC
-
160
ns
o
VDD = 15V
1, 2, 3
+25 C
-
120
ns
VDD = 10V
1, 2, 3
+25oC
-
100
ns
1, 2, 3
oC
-
80
ns
+25oC
-
7.5
pF
VDD = 15V
CIN
+25
1, 2
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
SYMBOL
Supply Current
IDD
CONDITIONS
VDD = 20V, VIN = VDD or GND
NOTES
TEMPERATURE
MIN
MAX
UNITS
1, 4
+25oC
-
25
µA
N Threshold Voltage
VNTH
VDD = 10V, ISS = -10µA
1, 4
+25oC
-2.8
-0.2
V
N Threshold Voltage
Delta
∆VTN
VDD = 10V, ISS = -10µA
1, 4
+25oC
-
±1
V
P Threshold Voltage
VTP
VSS = 0V, IDD = 10µA
1, 4
+25oC
0.2
2.8
V
P Threshold Voltage
Delta
∆VTP
VSS = 0V, IDD = 10µA
1, 4
+25oC
-
±1
V
1
+25oC
VOH >
VDD/2
VOL <
VDD/2
V
1, 2, 3, 4
+25oC
-
1.35 x
+25oC
Limit
ns
Functional
F
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
Propagation Delay Time
TPHL
TPLH
VDD = 5V
3. See Table 2 for +25oC limit.
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC
PARAMETER
SYMBOL
DELTA LIMIT
Supply Current - MSI-2
IDD
± 1.0µA
Output Current (Sink)
IOL5
± 20% x Pre-Test Reading
IOH5A
± 20% x Pre-Test Reading
Output Current (Source)
TABLE 6. APPLICABLE SUBGROUPS
MIL-STD-883
METHOD
GROUP A SUBGROUPS
Initial Test (Pre Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
100% 5004
1, 7, 9, Deltas
100% 5004
1, 7, 9
100% 5004
1, 7, 9, Deltas
CONFORMANCE GROUP
PDA (Note 1)
Interim Test 3 (Post Burn-In)
PDA (Note 1)
7-791
READ AND RECORD
IDD, IOL5, IOH5A
Specifications CD4028BMS
TABLE 6. APPLICABLE SUBGROUPS (Continued)
MIL-STD-883
METHOD
GROUP A SUBGROUPS
100% 5004
2, 3, 8A, 8B, 10, 11
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Subgroup B-5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample 5005
1, 7, 9
Sample 5005
1, 2, 3, 8A, 8B, 9
CONFORMANCE GROUP
Final Test
Group A
Group B
Group D
READ AND RECORD
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE GROUPS
Group E Subgroup 2
TEST
READ AND RECORD
MIL-STD-883
METHOD
PRE-IRRAD
POST-IRRAD
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
1, 9
Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
Static Burn-In 1
Note 1
1 - 7, 9, 14, 15
8, 10 - 13
16
Static Burn-In 2
Note 1
1 - 7, 9, 14, 15
8
10 - 13, 16
Dynamic BurnIn Note 1
-
8
16
1 - 7, 9, 14, 15
8
10 - 13, 16
Irradiation
Note 2
9V ± -0.5V
50kHz
25kHz
1 - 7, 9, 14, 15
10, 12, 13
11
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V
7-792
CD4028BMS
Logic Diagram
3
0
*
A
10
14 1
2
*
B
15 3
13
*
C
2
12
1
4
6
5
7
6
4
7
9
8
5
9
*
D
11
VDD
*ALL INPUTS ARE PROTECTED
BY CMOS PROTECTION
NETWORK
VSS
TABLE 1. TRUTH TABLE
D
C
B
A
0
1
2
3
4
5
6
7
8
9
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
0
0
0
0
0
0
1
1
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
1
0
0
0
0
0
1
0
0
0
0
0
1
1
0
0
0
0
0
0
0
1
0
0
0
0
1
1
1
0
0
0
0
0
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
1
0
0
0
0
0
0
0
0
0
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1 = HIGH LEVEL
0 = LOW LEVEL
7-793
CD4028BMS
AMBIENT TEMPERATURE (TA) = +25oC
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
25
20
15
10V
10
5
5V
0
5
10
AMBIENT TEMPERATURE (TA) = +25oC
15.0
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
12.5
10.0
10V
7.5
5.0
2.5
15
5V
0
5
10
15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
PROPAGATION DELAY TIME (tPHL, tPLH) (ns)
FIGURE 1. TYPICAL OUTPUT LOW (SINK) CURRENT
CAPACITANCE
FIGURE 2. MINIMUM OUTPUT LOW (SINK) CURRENT
CAPACITANCE
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-15
-10
-5
AMBIENT TEMPERATURE (TA) = +25oC
0
AMBIENT TEMPERATURE (TA) = +25oC
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
300
0
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
30
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
Typical Performance Characteristics
-5
250
-10
SUPPLY VOLTAGE (VDD) = 5V
200
-15
-10V
150
-20
10V
100
-25
-15V
50
-30
15V
0
10
20
30
40
50
60
70
80
90
100
LOAD CAPACITANCE (CL) (pF)
FIGURE 3. TYPICAL PROPAGATION DELAY TIME AS A
FUNCTION OF LOAD CAPACITANCE
0
0
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
-5
-10V
-15V
8
6
4
-10
-15
POWER DISSIPATION (PD) (µW)
AMBIENT TEMPERATURE (TA) = +25oC
105
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-15
-10
-5
FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTAGE
(VDD) = 15V
2
104
8
6
4
103
10V
2
10V
8
6
4
5V
2
102
CL = 50pF
8
6
4
CL = 15pF
2
10
1
10
102
103
104
105
INPUT FREQUENCY (fI) (kHz)
FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
FIGURE 6. TYPICAL DYNAMIC POWER DISSIPATION AS A
FUNCTION OF INPUT FREQUENCY
7-794
CD4028BMS
Typical Performance Characteristics (Continued)
TRANSITION TIME (tTHL, tTLH) (ns)
AMBIENT TEMPERATURE (TA) = +25oC
200
SUPPLY VOLTAGE (VDD) = 5V
150
100
10V
15V
50
0
0
20
40
60
80
100
LOAD CAPACITANCE (CL) (pF)
FIGURE 7. TYPICAL TRANSITION TIME AS A FUNCTION OF LOAD CAPACITANCE
INPUTS
Typical Applications
The circuit shown in Figure 8 converts any 4-bit code to a
decimal or hexadecimal code. Table 2 shows a number of
codes and the decimal or hexadecimal number in these
codes which must be applied to the input terminals of the
CD4028BMS to select a particular output. For example: in
order to get a high on output number 8 the input must be
either an 8 expressed in 4-bit Binary code, a 15 expressed in
4-Bit Gray code, or a 5 expressed in Excess-3 code.
1/6 CD4069B
A
B
C
D
CD4028BMS
0 1 2 3 4 5 6 7 8 9
A
B
C
D
CD4028BMS
0 1 2 3 4 5 6 7 8 9
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
16 OUTPUTS
FIGURE 8. CODE CONVERSION CIRCUIT
TABLE 2. CODE CONVERSION CHART
INPUT CODES
HEXADECIMAL
C
B
A
0
0
0
0
0
0
0
0
0
1
1
1
0
0
1
0
2
3
0
0
1
1
3
2
0
1
0
0
4
7
0
1
0
1
5
6
2
0
1
1
0
6
4
3
1
0
1
1
1
7
5
4
2
1
0
0
0
8
15
5
1
0
0
1
9
14
6
1
0
1
0
10
12
7
4-2-2-1
D
OUTPUT NUMBER
AIKEN
EXCESS-3
GRAY
4-BIT
GRAY
EXCESS-3
DECIMAL
4-BIT
BINARY
INPUTS
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
2
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
3
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
4
4
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
5
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
6
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
9
7-795
CD4028BMS
TABLE 2. CODE CONVERSION CHART (Continued)
INPUT CODES
HEXADECIMAL
EXCESS-3
GRAY
OUTPUT NUMBER
C
B
A
1
0
1
1
11
13
8
1
1
0
0
12
8
9
5
6
1
1
0
1
13
9
6
7
7
1
1
1
0
14
11
8
8
1
1
1
1
15
10
7
9
4-2-2-1
D
AIKEN
4-BIT
GRAY
EXCESS-3
DECIMAL
4-BIT
BINARY
INPUTS
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
5
TUBE REQUIREMENTS
9
8
7
6
5
4
3
2
1
0
D
C
BCD
INPUTS
CD4028BMS
B
A
VT
TYPE
1 OF 10
NUMERALS
BURROUGHS
VT(Vdc)
NUMERAL
mA/
B4081
170
14
B4336/
718
170
2
B4032
170
14
B4021
120
14
TRANSISTOR CHARACTERISTICS
Leakage with transistor cutoff ≤ 0.05mA
V(BR)CEO ≥ 70V
*(TRADEMARK) BURROUGHS CORP.
FIGURE 9. NEON READOUT (NIXIE TUBE*) DISPLAY APPLICATION
INPUTS
A B C
D
E F
A B C
INHIBIT
(NO SELECTION)
D
CD4028BMS
012 3456789
*
A B C
D
*
A B C
D
*
A B C
D
*
A B C
D
*
A B C
D
*
A B C
D
*
A B C
D
*
A B C
D
CD4028BMS
0123456789
CD4028BMS
0123456789
CD4028BMS
0123456789
CD4028BMS
0123456789
CD4028BMS
0123456789
CD4028BMS
0123456789
CD4028BMS
0123456789
CD4028BMS
0123456789
0 12 3456 7
8 - - - - - - 15
16 - - - - - - 23
24 - - - - - - 31
32 - - - - - - 39
40 - - - - - - 47
48 - - - - - - 55
56 - - - - - - 63
*1/6 CD4069B
64 OUTPUTS (SELECTED OUTPUT IS HIGH)
FIGURE 10. 6-BIT BINARY TO 1-OF-64 ADDRESS DECODER
7-796
CD4028BMS
Chip Dimensions and Pad Layout
Dimensions in parentheses are in millimeters
and are derived from the basic inch dimensions
as indicated. Grid graduations are in mils (10-3 inch)
METALLIZATION: Thickness: 11kÅ − 14kÅ,
PASSIVATION:
AL.
10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS:
0.0198 inches - 0.0218 inches
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
797
ASIA
Intersil (Taiwan) Ltd.
Taiwan Limited
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029