Data Sheet

IP4059CX5
Integrated USB 2.0 and USB OTG ESD protection to
IEC 61000-4-2 level 4
Rev. 1 — 15 September 2011
Product data sheet
1. Product profile
1.1 General description
The IP4059CX5 is designed to protect several I/O pins of computer interfaces, such as
Universal Serial Bus (USB) 2.0, USB On-The-Go (OTG), Ethernet, Digital Visual Interface
(DVI) etc. The IP4059CX5 incorporates ultra-low capacity diodes to provide protection to
downstream components from ElectroStatic Discharge (ESD) voltages as high as 8 kV
contact discharge according to the IEC 61000-4-2 model.
The device is fabricated using monolithic silicon technology and integrates four ultra-low
capacity ESD protection diodes in a 0.5 mm pitch Wafer-Level Chip-Scale Package
(WLCSP) measuring 0.96 mm by 1.34 mm only.
1.2 Features and benefits
 Pb-free, RoHS compliant and free of halogen and antimony (Dark Green compliant)
 4 ultra-low input capacity rail-to-rail ESD protection diodes with Cd = 3.0 pF
 Integrated ESD protection withstanding 8 kV contact discharge and 15 kV air
discharge
 WLCSP with 0.5 mm pitch
1.3 Applications
General purpose ElectroMagnetic Interference (EMI) and Radio Frequency Interference
(RFI) filtering and downstream ESD protection for USB ports inside:
 Cellular and Personal Communication System (PCS) mobile handsets
 PC peripherals and PCs
 Cordless telephones
 Wireless data and Local Area Network (LAN) systems
 Personal Digital Assistants (PDAs)
 Digital cameras
IP4059CX5
NXP Semiconductors
Integrated USB 2.0 and USB OTG ESD protection
2. Pinning information
Table 1.
Pinning
Example of pin configuration for USB 2.0; other combinations for ID, D+ and D in relation to pin A1,
pin C1 and pin C2 are possible.
Pin Symbol Description
Simplified outline
A1
D
C1
D+
B1
GND
ground
A2
VBUS
power
C2
ID
USB OTG ID pin
Graphic symbol
USB 2.0 differential pair
A2
bump A1
index area
2
1
A1
A
B1
B
C1
C2
B1
008aaa271
C
008aaa262
transparent top view,
solder balls facing down
3. Ordering information
Table 2.
Ordering information
Type number
Package
Name
IP4059CX5/LF WLCSP5
Description
Version
wafer level chip-size package; 5 bumps (2-1-2)
IP4059CX5/LF
4. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
VCC
supply voltage
VI
input voltage
VESD
electrostatic discharge voltage
Conditions
Min
Max
Unit
0
5
V
0.5 VCC + 0.5 V
contact discharge
[1]
15
+15
kV
air discharge
[1]
15
+15
kV
8
+8
kV
IEC 61000-4-2 level 4
contact discharge
air discharge
storage temperature
Tstg
Treflow(peak) peak reflow temperature
Tamb
[1]
IP4059CX5
Product data sheet
10 s maximum
ambient temperature
15
+15
kV
55
+150
C
-
260
C
40
+85
C
Device is qualified with > 200 pulses of 15 kV contact discharges each, according to the IEC 61000-4-2
model and far exceeds the specified level 4 (8 kV contact discharge).
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 September 2011
© NXP B.V. 2011. All rights reserved.
2 of 9
IP4059CX5
NXP Semiconductors
Integrated USB 2.0 and USB OTG ESD protection
5. Characteristics
Table 4.
Electrical characteristics
Tamb = 25 C; unless otherwise specified.
Symbol
Product data sheet
Conditions
[1]
Min
Typ
Max
Unit
-
3.0
4.0
pF
Cd
diode capacitance
pins A1, C1 and C2;
Vbias(DC) = 0 V;
f = 1 MHz; VA2 = 0 V
ILR
reverse leakage current
VI = 3.0 V
-
-
100
nA
VBR
breakdown voltage
Itest = 1 mA
6
-
9
V
VF
forward voltage
-
0.7
-
V
[1]
IP4059CX5
Parameter
Guaranteed by design.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 September 2011
© NXP B.V. 2011. All rights reserved.
3 of 9
IP4059CX5
NXP Semiconductors
Integrated USB 2.0 and USB OTG ESD protection
6. Package outline
WLCSP5: wafer level chip-size package; 5 bumps (2-1-2)
bump A1
index area
D
A2
E
A
A1
detail X
e
1/2 e
b
C
e1
B1
B
e2
A
2
1
X
European
projection
wlcsp5_2-1-2_r_po
Fig 1.
Table 5.
Package outline IP4059CX5/LF (WLCSP5)
Dimensions for Figure 1
Symbol
Min
Typ
Max
Unit
A
0.61
0.65
0.69
mm
A1
0.22
0.24
0.26
mm
A2
0.39
0.41
0.43
mm
b
0.27
0.32
0.37
mm
D
0.91
0.96
1.01
mm
E
1.29
1.34
1.39
mm
e
-
0.5
-
mm
e1
-
0.435
-
mm
e2
-
0.87
-
mm
IP4059CX5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 September 2011
© NXP B.V. 2011. All rights reserved.
4 of 9
IP4059CX5
NXP Semiconductors
Integrated USB 2.0 and USB OTG ESD protection
7. Design and assembly recommendations
7.1 PCB design guidelines
For optimum performance it is recommended to use a Non-Solder Mask Defined (NSMD),
also known as a copper-defined design, incorporating laser-drilled micro-vias connecting
the ground pads to a buried ground-plane layer. This results in the lowest possible ground
inductance and provides the best high frequency and ESD performance. For this case,
refer to Table 6 for the recommended PCB design parameters.
Table 6.
Recommended PCB design parameters
Parameter
Value or specification
PCB pad diameter
275 m
Micro-via diameter
100 m (0.004 inch)
Solder mask aperture diameter
375 m
Copper thickness
20 m to 40 m
Copper finish
AuNi
PCB material
FR4
7.2 PCB assembly guidelines for Pb-free soldering
Table 7.
Assembly recommendations
Parameter
Value or specification
Solder screen aperture diameter
330 m
Solder screen thickness
100 m (0.004 inch)
Solder paste: Pb-free
SnAg (3 % to 4 %) Cu (0.5 % to 0.9 %)
Solder to flux ratio
50 : 50
Solder reflow profile
see Figure 2
T
(°C)
Treflow(peak)
250
230
cooling rate
217
preheat
t1
t2
t3
t4
t (s)
t5
001aai943
The device is capable of withstanding at least three reflows with this profile.
Fig 2.
IP4059CX5
Product data sheet
Pb-free solder reflow profile
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 September 2011
© NXP B.V. 2011. All rights reserved.
5 of 9
IP4059CX5
NXP Semiconductors
Integrated USB 2.0 and USB OTG ESD protection
Table 8.
Characteristics
Symbol
Parameter
Conditions
Treflow(peak)
peak reflow temperature
t1
time 1
t2
time 2
t3
t4
Min Typ Max Unit
C
230 -
260
soak time
60
-
180
s
time during T  250 C
-
-
30
s
time 3
time during T  230 C
10
-
50
s
time 4
time during T > 217 C
30
-
150
s
t5
time 5
dT/dt
rate of change of temperature
-
-
540
s
cooling rate
-
-
6
C/s
preheat
2.5
-
4.0
C/s
8. Abbreviations
Table 9.
Abbreviations
Acronym
Description
DVI
Digital Visual Interface
EMI
ElectroMagnetic Interference
ESD
ElectroStatic Discharge
FR4
Flame Retard 4
IEC
International Electrotechnical Commission
I/O
Input/Output
LAN
Local Area Network
NSMD
Non-Solder Mask Defined
OTG
On-The-Go
PCB
Printed-Circuit Board
PCS
Personal Communication System
PDA
Personal Digital Assistant
RFI
Radio Frequency Interference
RoHS
Restriction of Hazardous Substances
USB
Universal Serial Bus
WLCSP
Wafer-Level Chip-Scale Package
9. Revision history
Table 10.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
IP4059CX5 v.1
20110915
Product data sheet
-
-
IP4059CX5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 September 2011
© NXP B.V. 2011. All rights reserved.
6 of 9
IP4059CX5
NXP Semiconductors
Integrated USB 2.0 and USB OTG ESD protection
10. Legal information
10.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
10.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
10.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
IP4059CX5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 September 2011
© NXP B.V. 2011. All rights reserved.
7 of 9
IP4059CX5
NXP Semiconductors
Integrated USB 2.0 and USB OTG ESD protection
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
10.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
11. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
IP4059CX5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 September 2011
© NXP B.V. 2011. All rights reserved.
8 of 9
IP4059CX5
NXP Semiconductors
Integrated USB 2.0 and USB OTG ESD protection
12. Contents
1
1.1
1.2
1.3
2
3
4
5
6
7
7.1
7.2
8
9
10
10.1
10.2
10.3
10.4
11
12
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . .
General description . . . . . . . . . . . . . . . . . . . . .
Features and benefits . . . . . . . . . . . . . . . . . . . .
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pinning information . . . . . . . . . . . . . . . . . . . . . .
Ordering information . . . . . . . . . . . . . . . . . . . . .
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . .
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .
Design and assembly recommendations . . . .
PCB design guidelines . . . . . . . . . . . . . . . . . . .
PCB assembly guidelines for Pb-free soldering
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . .
Revision history . . . . . . . . . . . . . . . . . . . . . . . . .
Legal information. . . . . . . . . . . . . . . . . . . . . . . .
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contact information. . . . . . . . . . . . . . . . . . . . . .
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
1
1
1
2
2
2
3
4
5
5
5
6
6
7
7
7
7
8
8
9
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 15 September 2011
Document identifier: IP4059CX5