EL5111T Features The EL5111T is a high voltage rail-to-rail input-output amplifier with low power consumption. The EL5111T is a single amplifier which exhibits beyond the rail input capability, rail-to-rail output capability, and is unity gain stable. • 60MHz (-3dB) Bandwidth The maximum operating voltage range is from 4.5V to 19V. It can be configured for single or dual supply operation, and typically consumes only 3mA. The EL5111T has an output short circuit capability of ±300mA and a continuous output current capability of ±70mA. The EL5111T features a high slew rate of 100V/μs, and fast settling time. Also, the device provides common mode input capability beyond the supply rails, rail-to-rail output capability, and a bandwidth of 60MHz (-3dB). This enables the amplifier to offer maximum dynamic range at any supply voltage. These features make the EL5111T an ideal amplifier solution for use in TFT-LCD panels as a VCOM driver or static gamma buffer, and in high speed filtering and signal conditioning applications. Other applications include battery power and portable devices, especially where low power consumption is important. The EL5111T is available in small 5 Ld TSOT package. It features a standard operational amplifier pinout. The device operates over an ambient temperature range of -40°C to +85°C. • 4.5V to 19V Maximum Supply Voltage Range • 100V/μs Slew Rate • 3mA Supply Current • ±70mA Continuous Output Current • ±300mA Output Short Circuit Current • Unity-gain Stable • Beyond the Rails Input Capability • Rail-to-rail Output Swing • Built-in Thermal Protection • -40°C to +85°C Ambient Temperature Range • Pb-Free (RoHS Compliant) Applications*(see page 13) • TFT-LCD Panels • VCOM Amplifiers • Static Gamma Buffers • Drivers for A/D Converters • Data Acquisition • Video Processing • Audio Processing • Active Filters • Test Equipment • Battery-powered Applications • Portable Equipment 10 GAIN (dB) VS = ±5V 8 AV = 1 CL = 1.5pF 6 RL || 1kΩ (PROBE) 4 1kΩ 2 0 -2 -4 560Ω -6 150Ω -8 -10 100k 1M 10M 100M FREQUENCY (Hz) FIGURE 1. TYPICAL TFT-LCD VCOM APPLICATION May 27, 2010 FN6894.0 1 FIGURE 2. FREQUENCY RESPONSE FOR VARIOUS RL CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners. EL5111T 60MHz Rail-to-Rail Input-Output Operational Amplifier EL5111T Pin Configuration EL5111T (5 LD TSOT) TOP VIEW VOUT 1 5 VS+ VS- 2 + - VIN+ 3 4 VIN- Pin Descriptions PIN NUMBER PIN NAME FUNCTION EQUIVALENT CIRCUIT 1 VOUT 2 VS- 3 VIN+ Amplifier non-inverting input (Reference “CIRCUIT 2”) 4 VIN- Amplifier inverting input (Reference “CIRCUIT 2”) 5 VS+ Positive power supply Amplifier output (Reference “CIRCUIT 1”) Negative power supply VS+ VS+ VOUT VIN VS- GND VS- CIRCUIT 1 CIRCUIT 2 Ordering Information PART NUMBER (Notes 1, 2, 3) PART MARKING PACKAGE (Pb-Free) PKG. DWG. # EL5111TIWTZ-T7 BDKA 5 Ld TSOT MDP0049 EL5111TIWTZ-T7A BDKA 5 Ld TSOT MDP0049 NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for EL5111T. For more information on MSL please see techbrief TB363. 2 FN6894.0 May 27, 2010 EL5111T Absolute Maximum Ratings Thermal Information (TA = +25°C) Supply Voltage between VS+ and VS- . . . . . . . . . . . .+19.8V Input Voltage Range (VIN+, VIN-) . . VS- - 0.5V, VS+ + 0.5V Input Differential Voltage (VIN+ - VIN-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (VS+ + 0.5V)-(VS- - 0.5V) Maximum Continuous Output Current . . . . . . . . . . .±70mA ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . 3000V Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W) 5 Ld TSOT (Notes 4, 5) 215 290 Storage Temperature . . . . . . . . . . . . . . . -65°C to +150°C Ambient Operating Temperature . . . . . . . . . -40°C to +85°C Maximum Junction Temperature . . . . . . . . . . . . . . . +150°C Power Dissipation . . . . . . . . . . . . . . . See Figures 32 and 33 Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board. See Tech Brief TB379. 5. For θJC, the “case temp” location is taken at the package top center. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER VS+ = +5V, VS- = -5V, RL = 1kΩ to 0V, TA = +25°C, Unless Otherwise Specified. DESCRIPTION CONDITIONS MIN TYP MAX UNIT VCM = 0V 5 18 mV VCM = 0V 2 INPUT CHARACTERISTICS VOS Input Offset Voltage TCVOS Average Offset Voltage Drift (Note 6) IB Input Bias Current RIN Input Impedance 1 GΩ CIN Input Capacitance 2 pF 8 -5.5 μV/°C 60 +5.5 nA CMIR Common-Mode Input Range CMRR Common-Mode Rejection Ratio For VIN from -5.5V to 5.5V 50 73 dB V AVOL Open-Loop Gain -4.5V ≤ VOUT ≤ 4.5V 62 78 dB OUTPUT CHARACTERISTICS VOL Output Swing Low IL = -5mA VOH Output Swing High IL = +5mA ISC Short-Circuit Current VCM = 0V, Source: VOUTx short to VS-, Sink: VOUT short to VS+ IOUT Output Current 4.85 -4.93 -4.85 V 4.93 V ±300 mA ±70 mA POWER SUPPLY PERFORMANCE (VS+) - (VS-) Supply Voltage Range 4.5 IS Supply Current VCM = 0V, No load PSRR Power Supply Rejection Ratio Supply is moved from ±2.25V to ±9.5V 3.1 60 19 V 4 mA 75 dB 100 V/μs DYNAMIC PERFORMANCE SR Slew Rate (Note 7) -4.0V ≤ VOUT ≤ 4.0V, 20% to 80% tS Settling to +0.1% (Note 8) AV = +1, VOUTx= 2V step, RL = 1kΩ || 1kΩ (probe), CL = 1.5pF 85 ns BW -3dB Bandwidth RL = 1kΩ, CL = 1.5pF 60 MHz GBWP Gain-Bandwidth Product AV = -10, RF = 1kΩ, RG = 100Ω RL = 1kΩ || 1kΩ (probe), CL = 1.5pF 32 MHz PM Phase Margin AV = -10, RF = 1kΩ, RG = 100Ω RL = 1kΩ || 1kΩ (probe), CL = 1.5pF 50 ° 3 FN6894.0 May 27, 2010 EL5111T Electrical Specifications PARAMETER VS+ = +5V, VS- = 0V, RL = 1kΩ to 2.5V, TA = +25°C, Unless Otherwise Specified. DESCRIPTION CONDITION MIN TYP MAX UNIT INPUT CHARACTERISTICS VOS Input Offset Voltage VCM = 2.5V 5 18 TCVOS Average Offset Voltage Drift (Note 6) IB Input Bias Current RIN Input Impedance 1 GΩ CIN Input Capacitance 2 pF CMIR Common-Mode Input Range CMRR Common-Mode Rejection Ratio For VIN from -0.5V to 5.5V 45 68 dB AVOL Open-Loop Gain 0.5V ≤ VOUT ≤ 4.5V 62 82 dB 7 VCM = 2.5V mV μV/°C 2 60 -0.5 +5.5 nA V OUTPUT CHARACTERISTICS VOL Output Swing Low IL = -4.2mA 60 VOH Output Swing High IL = +4.2mA ISC Short-circuit Current VCM = 2.5V, Source: VOUT short to VS-, Sink: VOUT short to VS+ IOUT Output Current 4.85 150 mV 4.94 V ±110 mA ±70 mA POWER SUPPLY PERFORMANCE (VS+) - (VS-) Supply Voltage Range 4.5 IS Supply Current VCM = 2.5V, No load PSRR Power Supply Rejection Ratio Supply is moved from 4.5V to 19V 3.3 60 19 V 4 mA 75 dB DYNAMIC PERFORMANCE SR Slew Rate (Note 7) 1V ≤ VOUT ≤ 4V, 20% to 80% 75 V/μs tS Settling to +0.1% (Note 8) AV = +1, VOUT = 2V step, RL = 1kΩ || 1kΩ (probe), CL = 1.5pF 90 ns BW -3dB Bandwidth RL = 1kΩ, CL = 1.5pF 60 MHz GBWP Gain-Bandwidth Product AV = -10, RF = 1kΩ, RG = 100Ω RL = 1kΩ || 1kΩ (probe), CL = 1.5pF 32 MHz PM Phase Margin AV = -10, RF = 1kΩ, RG = 100Ω RL = 1kΩ || 1kΩ (probe), CL = 1.5pF 50 ° Electrical Specifications PARAMETER VS+ = +18V, VS- = 0V, RL = 1kΩ to 9V, TA = +25°C, Unless Otherwise Specified. DESCRIPTION CONDITION MIN TYP MAX UNIT 5 18 mV INPUT CHARACTERISTICS VOS Input Offset Voltage TCVOS Average Offset Voltage Drift (Note 6) IB Input Bias Current RIN Input Impedance 1 GΩ CIN Input Capacitance 2 pF CMIR Common-Mode Input Range CMRR Common-Mode Rejection Ratio For VIN from -0.5V to 18.5V 53 75 dB AVOL Open-Loop Gain 0.5V ≤ VOUT ≤ 17.5V 62 95 dB 4 VCM = 9V 9 VCM = 9V 2 -0.5 μV/°C 60 +18.5 nA V FN6894.0 May 27, 2010 EL5111T Electrical Specifications PARAMETER VS+ = +18V, VS- = 0V, RL = 1kΩ to 9V, TA = +25°C, Unless Otherwise Specified. (Continued) DESCRIPTION CONDITION MIN TYP MAX UNIT 90 150 mV OUTPUT CHARACTERISTICS VOL Output Swing Low IL = -6mA VOH Output Swing High IL = +6mA ISC Short-circuit Current VCM = 9V, Source: VOUT short to VS-, Sink: VOUT short to VS+ IOUT Output Current 17.85 17.91 V ±300 mA ±70 mA POWER SUPPLY PERFORMANCE (VS+) - (VS-) Supply Voltage Range 4.5 IS Supply Current VCM = 9V, No load PSRR Power Supply Rejection Ratio Supply is moved from 4.5V to 19V 3.4 60 19 V 4 mA 75 dB DYNAMIC PERFORMANCE SR Slew Rate (Note 7) 1V ≤ VOUTx ≤ 17V, 20% to 80% 100 V/μs tS Settling to +0.1% (Note 8) AV = +1, VOUT = 2V step, RL = 1kΩ || 1kΩ (probe), CL = 1.5pF 100 ns BW -3dB Bandwidth RL = 1kΩ, CL = 1.5pF 60 MHz GBWP Gain-Bandwidth Product AV = -10, RF = 1kΩ, RG = 100Ω RL = 1kΩ || 1kΩ (probe), CL = 1.5pF 32 MHz PM Phase Margin AV = -10, RF = 1kΩ, RG = 100Ω RL = 1kΩ || 1kΩ (probe), CL = 1.5pF 50 ° NOTES: 6. Measured over -40°C to +85°C ambient operating temperature range. See the typical TCVOS production distribution shown in the “Typical Performance Curves” on page 6. 7. Typical slew rate is an average of the slew rates measured on the rising (20% to 80%) and the falling (80% to 20%) edges of the output signal. 8. Settling time measured as the time from when the output level crosses the final value on rising/falling edge to when the output level settles within a ±0.1% error band. The range of the error band is determined by: Final Value(V)±[Full Scale(V)*0.1%]. 5 FN6894.0 May 27, 2010 EL5111T Typical Performance Curves VS = ±5V 1000 T = +25°C A 900 TYPICAL PRODUCTION DISTRIBUTION 800 700 600 500 400 300 200 18 14 TYPICAL PRODUCTION DISTRIBUTION 12 10 8 6 4 2 100 0 -15 VS = ±5V -40°C to +85°C 16 NUMBER OF DEVICES NUMBER OF DEVICES 1100 -12 -9 -6 -3 0 3 6 9 0 12 2 6 INPUT OFFSET VOLTAGE (mV) FIGURE 3. INPUT OFFSET VOLTAGE DISTRIBUTION INPUT BIAS CURRENT (nA) 0 -5 0 50 100 TEMPERATURE (°C) 22 26 30 34 VS = ±5V 4 2 0 -2 -4 -6 -50 150 -4.91 4.95 VS = ±5V IOUT = +5mA 4.93 4.91 0 50 100 TEMPERATURE (°C) 150 FIGURE 7. OUTPUT HIGH VOLTAGE vs TEMPERATURE 6 0 50 100 TEMPERATURE (°C) 150 FIGURE 6. INPUT BIAS CURRENT vs TEMPERATURE OUTPUT LOW VOLTAGE (V) INPUT OFFSET VOLTAGE (mV) 5 FIGURE 5. INPUT OFFSET VOLTAGE vs TEMPERATURE OUTPUT HIGH VOLTAGE (V) 18 6 VS = ±5V 4.89 -50 14 FIGURE 4. INPUT OFFSET VOLTAGE DRIFT (TSOT) 10 -10 -50 10 INPUT OFFSET VOLTAGE DRIFT (|μV|°C) -4.92 VS = ±5V IOUT = -5mA -4.93 -4.94 -4.95 -4.96 -50 0 50 100 TEMPERATURE (°C) 150 FIGURE 8. OUTPUT LOW VOLTAGE vs TEMPERATURE FN6894.0 May 27, 2010 EL5111T Typical Performance Curves (Continued) 100 SLEW RATE (V/μs) 90 OPEN LOOP GAIN (dB) 120 VS = ±5V RL = 1kΩ 80 70 60 VS = ±5V RL = 1kΩ 110 100 90 50 40 -50 0 50 100 TEMPERATURE (°C) 80 -50 150 FIGURE 9. OPEN-LOOP GAIN vs TEMPERATURE SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 3.10 3.05 3.00 3.95 0 50 100 TEMPERATURE (°C) TA = +25°C NO LOAD INPUT AT GND 4.0 3.5 3.0 2.5 2.0 2.5 150 3.5 4.5 5.5 6.5 7.5 8.5 9.5 SUPPLY VOLTAGE (±V) FIGURE 11. SUPPLY CURRENT PER AMPLIFIER vs TEMPERATURE FIGURE 12. SUPPLY CURRENT PER AMPLIFIER vs SUPPLY VOLTAGE 140 140 120 OPEN LOOP GAIN (dB) SLEW RATE (V/μs) 150 4.5 VS = ±5V NO LOAD 3.15 INPUT AT GND 100 80 TA = +25°C AV = 1 RL = 1kΩ CL = 8pF 60 40 50 100 TEMPERATURE (°C) FIGURE 10. SLEW RATE vs TEMPERATURE 3.20 3.90 -50 0 2 4 6 8 SUPPLY VOLTAGE (±V) FIGURE 13. SLEW RATE vs SUPPLY VOLTAGE 7 10 TA = +25°C RL = 1kΩ 120 100 80 60 40 2 4 6 8 10 SUPPLY VOLTAGE (±V) FIGURE 14. OPEN LOOP GAIN vs SUPPLY VOLTAGE FN6894.0 May 27, 2010 EL5111T Typical Performance Curves (Continued) 100 100 200 200 60 120 PHASE 40 80 20 VS = ±5V RF = 5kΩ, RG = 100Ω RL = 1kΩ CL = 8pF 0 -20 10 100 1k 10k 40 0 100k 1M 10M -40 100M 80 60 120 GAIN 40 80 20 -20 10 100 1k 10k 0 100k 1M 10M -40 100M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 15. OPEN LOOP GAIN AND PHASE FIGURE 16. OPEN LOOP GAIN AND PHASE 20 VS = ±5V 8 AV = 1 CL = 1.5pF 6 RL || 1kΩ (PROBE) 4 15 GAIN (dB) 1kΩ 2 0 -2 560Ω -6 -8 1M 0 -5 VS = ±5V AV = 1 RL = 1kΩ -15 10M -20 100k 100M 1M 10M FREQUENCY (Hz) 100 VS = ±5V RF = 2kΩ RL = 50Ω SOURCE = 0dBm 10 1 0.1 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FIGURE 19. CLOSED LOOP OUTPUT IMPEDANCE 8 100M FIGURE 18. FREQUENCY RESPONSE FOR VARIOUS CL MAXIMUM OUTPUT SWING (VP-P) FIGURE 17. FREQUENCY RESPONSE FOR VARIOUS RL 47pF 10pF FREQUENCY (Hz) 1000 100pF 5 -10 150Ω -10 100k 1000pF 10 -4 OUTPUT IMPEDANCE (Ω) 40 VS = ±5V RF = 1kΩ, RG = 100Ω RL = 1kΩ || 1kΩ (PROBE) CL = 1.5pF 0 10 GAIN (dB) 160 PHASE (°) 160 GAIN PHASE (°) OPEN LOOP GAIN (dB) 80 OPEN LOOP GAIN (dB) PHASE 12 10 8 6 4 2 VS = ±5V AV = 1 RL = 1kΩ DISTORTION <1% 0 10k 100k 1M 10M 100M FREQUENCY (Hz) FIGURE 20. MAXIMUM OUTPUT SWING vs FREQUENCY FN6894.0 May 27, 2010 EL5111T Typical Performance Curves (Continued) -30 0 -10 2nd HD -20 -50 -60 CMRR (dB) DISTORTION (dBc) -40 3rd HD -70 VS = ±5V AV = 2 RL = 1kΩ fIN = 1MHz -80 -90 0 2 4 6 8 VS = ±5V TA = +25°C VINx = -10dBm -30 -40 -50 -60 -70 -80 -90 1k 10 10k OUTPUT VOLTAGE (VOP-P) FIGURE 21. HARMONIC DISTORTION vs VOP-P VOLTAGE NOISE (nV/√Hz) PSRR(dB) -20 -30 -40 -50 PSRR+ -70 TA = +25°C 100 10 PSRR10k 100k 1M 10M 1 100 100M FREQUENCY (Hz) 10k 100k 1M 10M 100M FIGURE 24. INPUT VOLTAGE NOISE SPECTRAL DENSITY 5 VS = ±5V TA = +25°C AV = 1 RL = 1kΩ VINx = ±50mV STEP SIZE (V) OVERSHOOT (%) 80 1k FREQUENCY (Hz) FIGURE 23. PSRR 100 100M 1000 VS = ±5V -10 TA = +25°C -80 1k 10M FIGURE 22. CMRR 0 -60 100k 1M FREQUENCY (Hz) 60 40 20 VS = ±5V 4 TA = +25°C AV = 1 3 R = 1kΩ || 1kΩ (PROBE) L 2 CL =1.5pF 1 0 -1 -2 -3 -4 0 10 100 LOAD CAPACITANCE (pF) FIGURE 25. SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE 9 1k -5 70 80 90 SETTLING TIME (ns) FIGURE 26. STEP SIZE vs SETTLING TIME FN6894.0 May 27, 2010 EL5111T 1V/DIV 50mV/DIV Typical Performance Curves (Continued) 6V STEP VS = ±5V TA = +25°C AV = 1 RL= 1kΩ || 1kΩ (PROBE) CL = 1.5pF 100mV STEP 50ns/DIV VS = ±5V TA = +25°C AV = 1 RL= 1kΩ|| 1kΩ (PROBE) CL = 1.5pF 50ns/DIV FIGURE 27. LARGE SIGNAL TRANSIENT RESPONSE FIGURE 28. SMALL SIGNAL TRANSIENT RESPONSE FIGURE 29. BASIC TEST CIRCUIT 10 FN6894.0 May 27, 2010 EL5111T Operating Voltage, Input and Output Capability The EL5111T can operate on a single supply or dual supply configuration. The EL5111T operating voltage ranges from a minimum of 4.5V to a maximum of 19V. This range allows for a standard 5V (or ±2.5V) supply voltage to dip to -10%, or a standard 18V (or ±9V) to rise by +5.5% without affecting performance or reliability. The input common-mode voltage range of the EL5111T extends 500mV beyond the supply rails. Also, the EL5111T is immune to phase reversal. However, if the common mode input voltage exceeds the supply voltage by more than 0.5V, electrostatic protection diodes in the input stage of the device begin to conduct. Even though phase reversal will not occur, to maintain optimal reliability it is suggested to avoid input overvoltage conditions. Figure 30 shows the input voltage driven 500mV beyond the supply rails and the device output swinging between the supply rails. The EL5111T output typically swings to within 50mV of positive and negative supply rails with load currents of ±5mA. Decreasing load currents will extend the output voltage range even closer to the supply rails. Figure 31 shows the input and output waveforms for the device in a unity-gain configuration. Operation is from ±5V supply with a 1kΩ load connected to GND. The input is a 10VP-P sinusoid and the output voltage is approximately 9.9VP-P. Refer to the “Electrical Specifications” Table beginning on page 3 for specific device parameters. Parameter variations with operating voltage, loading and/or temperature are shown in the “Typical Performance Curves” on page 6. 11 OUTPUT INPUT 10μs/DIV FIGURE 30. OPERATION WITH BEYOND-THE-RAILS INPUT VS = ±5V, TA = +25°C, AV = 1, VINx = 10VP-P, RL = 1kΩ to GND INPUT The EL5111T features a high slew rate of 100V/μs, and fast settling time. Also, the device provides common mode input capability beyond the supply rails, rail-to-rail output capability, and a bandwidth of 60MHz (-3dB). This enables the amplifier to offer maximum dynamic range at any supply voltage. OUTPUT The EL5111T is a high voltage rail-to-rail input-output amplifier with low power consumption. The EL5111T is a single amplifier which exhibits beyond the rail input capability, rail-to-rail output capability, and is unity gain stable. VS = ±2.5V, TA = +25°C, AV = 1, VINx = 6VP-P, RL = 1kΩ to GND 1V/DIV Product Description 5V/DIV Applications Information 10μs/DIV FIGURE 31. OPERATION WITH RAIL-TO-RAIL INPUT AND OUTPUT Output Current The EL5111T is capable of output short circuit currents of 300mA (source and sink), and the device has built-in protection circuitry which limits the output current to ±300mA (typical). To maintain maximum reliability, the continuous output current should never exceed ±70mA. This ±70mA limit is determined by the characteristics of the internal metal interconnects. Also, see “Power Dissipation” on page 12 for detailed information on ensuring proper device operation and reliability for temperature and load conditions. Thermal Shutdown The EL5111T has a built-in thermal protection which ensures safe operation and prevents internal damage to the device due to overheating. When the die temperature reaches +165°C (typical) the device automatically shuts OFF the output by putting it in a high impedance state. When the die cools by +15°C (typical) the device automatically turns ON the output by putting it in a low impedance (normal) operating state. FN6894.0 May 27, 2010 EL5111T Driving Capacitive Loads • VOUT = Output voltage As load capacitance increases, the -3dB bandwidth will decrease and peaking can occur. Depending on the application, it may be necessary to reduce peaking and to improve device stability. To improve device stability a snubber circuit or a series resistor may be added to the output of the EL5111T. • ILOAD = Load current Another method to reduce peaking is to add a series output resistor (typically between 1Ω to 10Ω). Depending on the capacitive loading, a small value resistor may be the most appropriate choice to minimize any reduction in gain. Power Dissipation With the high-output drive capability of the EL5111T amplifier, it is possible to exceed the +150°C absolute maximum junction temperature under certain load current conditions. It is important to calculate the maximum power dissipation of the EL5111T in the application. Proper load conditions will ensure that the EL5111T junction temperature stays within a safe operating region. JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 0.6 POWER DISSIPATION (W) A snubber is a shunt load consisting of a resistor in series with a capacitor. An optimized snubber can improve the phase margin and the stability of the EL5111T. The advantage of a snubber circuit is that it does not draw any DC load current or reduce the gain. Device overheating can be avoided by calculating the minimum resistive load condition, RLOAD, resulting in the highest power dissipation. To find RLOAD set the two PDMAX equations equal to each other and solve for VOUT/ILOAD. Reference the package power dissipation curves, Figures 32 and 33, for further information. 0.5 417mW 0.4 TSOT5 θJA = +300°C/W 0.3 0.2 0.1 0.0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (°C) FIGURE 32. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE The maximum power dissipation allowed in a package is determined according to Equation 1: T JMAX – T AMAX P DMAX = -------------------------------------------θ JA JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY (4-LAYER) TEST BOARD - EXPOSED DIEPAD SOLDERED TO PCB PER JESD51-5 (EQ. 1) 0.8 • TJMAX = Maximum junction temperature • TAMAX = Maximum ambient temperature • ΘJA = Thermal resistance of the package • PDMAX = Maximum power dissipation allowed The total power dissipation produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power dissipation in the IC due to the load, or: P DMAX = V S × I SMAX + ( V S + – V OUT ) × I LOAD (EQ. 2) when sourcing, and: P DMAX = V S × I SMAX + ( V OUT – V S - ) × I LOAD (EQ. 3) POWER DISSIPATION (W) where: 581mW 0.6 TSOT5 θJA = +215°C/W 0.4 0.2 0.0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (°C) FIGURE 33. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE when sinking, where: • VS = Total supply voltage (VS+ - VS-) • VS+ = Positive supply voltage • VS- = Negative supply voltage • ISMAX = Maximum supply current (ISMAX = EL5111T quiescent current) 12 FN6894.0 May 27, 2010 EL5111T Power Supply Bypassing and Printed Circuit Board Layout The EL5111T can provide gain at high frequency, so good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended, trace lengths should be as short as possible and the power supply pins must be well bypassed to reduce any risk of oscillation. For normal single supply operation (the VS- pin is connected to ground) a 4.7μF capacitor should be placed from VS+ to ground, then a parallel 0.1μF capacitor should be connected as close to the amplifier as possible. One 4.7μF capacitor may be used for multiple devices. For dual supply operation the same capacitor combination should be placed at each supply pin to ground. Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE REVISION 5/27/10 FN6894.0 CHANGE Initial Release. Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. *For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: EL5111T To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff FITs are available from our website at http://rel.intersil.com/reports/search.php 13 FN6894.0 May 27, 2010 EL5111T TSOT Package Family MDP0049 e1 D TSOT PACKAGE FAMILY A MILLIMETERS 6 N SYMBOL 4 E1 2 E 3 0.15 C D 2X 1 5 2 (N/2) 0.25 C 2X N/2 TIPS e ddd M B C A-B D b NX 0.15 C A-B 1 3 D 2X C A2 SEATING PLANE A1 0.10 C NX (L1) H A GAUGE PLANE c L TSOT5 TSOT6 TSOT8 TOLERANCE A 1.00 1.00 1.00 Max A1 0.05 0.05 0.05 ±0.05 A2 0.87 0.87 0.87 ±0.03 b 0.38 0.38 0.29 ±0.07 c 0.127 0.127 0.127 +0.07/-0.007 D 2.90 2.90 2.90 Basic E 2.80 2.80 2.80 Basic E1 1.60 1.60 1.60 Basic e 0.95 0.95 0.65 Basic e1 1.90 1.90 1.95 Basic L 0.40 0.40 0.40 ±0.10 L1 0.60 0.60 0.60 Reference ddd 0.20 0.20 0.13 - N 5 6 8 Reference Rev. B 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included. 2. Plastic interlead protrusions of 0.15mm maximum per side are not included. 3. This dimension is measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Index area - Pin #1 I.D. will be located within the indicated zone (TSOT6 AND TSOT8 only). 6. TSOT5 version has no center lead (shown as a dashed line). 0.25 4° ±4° For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 14 FN6894.0 May 27, 2010