EL5128 ® Data Sheet November 22, 2002 Dual VCOM Amplifier & Gamma Reference Buffer The EL5128 integrates two VCOM ® amplifiers with a single gamma reference buffer. Operating on supplies ranging from 5V to 15V, while consuming only 2.0mA, the EL5128 has a bandwidth of 12MHz (-3dB) and provides common mode input ability beyond the supply rails, as well as rail-to-rail output capability. This enables this amplifier to offer maximum dynamic range at any supply voltage. The EL5128 also features fast slewing and settling times, as well as a high output drive capability of 30mA (sink and source). Features • Dual VCOM amplifier • Single gamma reference buffer • 12MHz -3dB bandwidth • Supply voltage = 4.5V to 16.5V • Low supply current = 2.0mA • High slew rate = 10V/µs • Unity-gain stable • Beyond the rails input capability • Rail-to-rail output swing The EL5128 is targeted at TFT-LCD applications, including notebook panels, monitors, and LCD-TVs. It is available in the 10-pin MSOP package and is specified for operation over the -40°C to +85°C temperature range. • Ultra-small package Pinout • Notebook displays EL5128IY (10-PIN MSOP) TOP VIEW VOUTA 1 VINA- 2 + + VINA+ 3 - Applications • TFT-LCD drive circuits • LCD desktop monitors • LCD-TVs 10 VOUTB - FN7000 9 VINB- Ordering Information PART NUMBER PACKAGE TAPE & REEL OUTLINE # EL5128IY 10-Pin MSOP - MDP0043 EL5128IY-T7 10-Pin MSOP 7” MDP0043 EL5128IY-T13 10-Pin MSOP 13” MDP0043 8 VINB+ VS+ 4 7 VS- VINC 5 6 VOUTC 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-ELANTEC or 408-945-1323 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Elantec is a registered trademark of Elantec Semiconductor, Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved EL5128 Absolute Maximum Ratings Thermal Information Supply Voltage between VS+ and VS- . . . . . . . . . . . . . . . . . . . .+18V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . VS- - 0.5V, VS + 0.5V Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . 30mA ESD Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . .+125oC Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . -65oC to +150oC Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Operating Conditions Operating Temperature . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications VS+ = +5V, VS- = -5V, RL = 10kΩ and CL = 10pF to 0V, TA = 25°C unless otherwise specified. PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT 12 mV Input Characteristics VOS Input Offset Voltage VCM = 0V 2 TCVOS Average Offset Voltage Drift a 5 IB Input Bias Current VCM = 0V 2 RIN Input Impedance CIN Input Capacitance CMIR Common-Mode Input Range (VCOM amps) CMRR Common-Mode Rejection Ratio (VCOM amps) for VIN from -5.5V to +5.5V 50 70 dB AVOL Open-Loop Gain -4.5V ≤ VOUT ≤ +4.5V (VCOM amps) 75 95 dB AV Voltage Gain -4.5V ≤ VOUT ≤ +4.5V µV/°C 50 nA 1 GΩ 1.35 pF -5.5 +5.5 0.995 V 1.005 V/V -4.85 V Output Characteristics VOL Output Swing Low IL = -5mA VOH Output Swing High IL = 5mA ISC IOUT -4.92 4.85 4.92 V Short Circuit Current ±120 mA Output Current ±30 mA 80 dB Power Supply Performance PSRR Power Supply Rejection Ratio VS is moved from ±2.25V to ±7.75V 60 IS Supply Current (Per Amplifier) No load 660 1000 µA Dynamic Performance SR Slew Rateb -4.0V ≤ VOUT ≤ +4.0V, 20% to 80% 10 V/µs tS Settling to +0.1% (AV = +1) (AV = +1), VO = 2V step 500 ns BW -3dB Bandwidth RL = 10kΩ, CL = 10pF 12 MHz GBWP Gain-Bandwidth Product RL = 10kΩ, CL = 10pF (VCOM amps) 8 MHz PM Phase Margin RL = 10kΩ, CL = 10pF (VCOM amps) 50 ° CS Channel Separation f = 5MHz 75 dB a.Measured over operating temperature range b.Slew rate is measured on rising and falling edges 2 EL5128 Electrical Specifications VS+ = 5V, VS-= 0V, RL = 10kΩ and CL = 10pF to 2.5V, TA = 25°C unless otherwise specified. PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT 10 mV Input Characteristics VOS Input Offset Voltage VCM = 2.5V 2 TCVOS Average Offset Voltage Drift a 5 IB Input Bias Current VCM = 2.5V 2 RIN Input Impedance CIN Input Capacitance CMIR Common-Mode Input Range CMRR Common-Mode Rejection Ratio for VIN from -0.5V to +5.5V 45 66 dB AVOL Open-Loop Gain 0.5V ≤ VOUT ≤+ 4.5V 75 95 dB AV Voltage Gain 0.5V ≤ VOUT ≤+ 4.5V 0.995 µV/°C 50 nA 1 GΩ 1.35 pF -0.5 +5.5 V 1.005 V/V 150 mV Output Characteristics VOL Output Swing Low IL = -5mA VOH Output Swing High IL = +5mA ISC IOUT 80 4.85 4.92 V Short Circuit Current ±120 mA Output Current ±30 mA 80 dB Power Supply Performance PSRR Power Supply Rejection Ratio VS is moved from 4.5V to 15.5V 60 IS Supply Current (Per Amplifier) No load 660 1000 µA Dynamic Performance SR Slew Rateb 1V ≤ VOUT ≤ 4V, 20% to 80% 10 V/µs tS Settling to +0.1% (AV = +1) (AV = +1), VO = 2V step 500 ns BW -3dB Bandwidth RL = 10kΩ, CL = 10pF 12 MHz GBWP Gain-Bandwidth Product RL = 10 kΩ, CL = 10pF 8 MHz PM Phase Margin RL = 10 kΩ, CL = 10 pF 50 ° CS Channel Separation f = 5MHz 75 dB a.Measured over operating temperature range b.Slew rate is measured on rising and falling edges 3 EL5128 Electrical Specifications VS+ = 15V, VS- = 0V, RL = 10kΩ and CL = 10pF to 7.5V, TA = 25°C unless otherwise specified. PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT 14 mV Input Characteristics VOS Input Offset Voltage VCM = 7.5V 2 TCVOS Average Offset Voltage Drift a 5 IB Input Bias Current VCM = 7.5V 2 RIN Input Impedance CIN Input Capacitance CMIR Common-Mode Input Range CMRR Common-Mode Rejection Ratio for VIN from -0.5V to +15.5V 53 72 dB AVOL Open-Loop Gain 0.5V ≤ VOUT ≤ 14.5V 75 95 dB AV Voltage Gain 0.5V ≤ VOUT ≤ 14.5V 0.995 µV/°C 50 nA 1 GΩ 1.35 pF -0.5 +15.5 V 1.005 V/V 150 mV Output Characteristics VOL Output Swing Low IL = -5mA VOH Output Swing High IL = +5mA ISC IOUT 80 14.85 14.92 V Short Circuit Current ±120 mA Output Current ±30 mA 80 dB Power Supply Performance PSRR Power Supply Rejection Ratio VS is moved from 4.5V to 15.5V 60 IS Supply Current (Per Amplifier) No load 660 1000 µA Dynamic Performance SR Slew Rateb 1V ≤ VOUT ≤ 14V, 20% to 80% 10 V/µs tS Settling to +0.1% (AV = +1) (AV = +1), VO = 2V step 500 ns BW -3dB Bandwidth RL = 10kΩ, CL = 10pF 12 MHz GBWP Gain-Bandwidth Product RL = 10kΩ, CL = 10pF 8 MHz PM Phase Margin RL = 10kΩ, CL = 10 pF 50 ° CS Channel Separation f = 5MHz 75 dB a.Measured over operating temperature range b.Slew rate is measured on rising and falling edges 4 EL5128 Typical Performance Curves Input Offset Voltage Distribution Input Offset Voltage Drift 70 1800 Typical Production Distribution VS=±5V TA=25°C 1600 Quantity (Amplifiers) Quantity (Amplifiers) 1400 1200 1000 800 600 Typical Production Distribution VS=±5V 60 50 40 30 20 400 10 200 0 21 19 17 15 13 9 11 7 5 3 1 12 8 10 6 4 2 -0 -2 -4 -6 -8 -10 -12 0 Input Offset Voltage Drift, TCVOS (µV/°C) Input Offset Voltage (mV) Input Offset Voltage vs Temperature Input Bias Current vs Temperature 10 2.0 VS=±5V Input Bias Current (nA) Input Offset Voltage (mV) VS=±5V 5 0 -5 0.0 -2.0 -50 0 50 100 150 -50 0 Temperature (°C) 100 150 Output Low Voltage vs Temperature Output High Voltage vs Temperature -4.91 4.97 -4.92 VS=±5V IOUT=5mA 4.96 Output Low Voltage (V) Output High Voltage (V) 50 Temperature (°C) 4.95 4.94 VS=±5V IOUT=-5mA -4.93 -4.94 -4.95 -4.96 -4.97 4.93 -50 0 50 100 -50 150 0 Open-Loop Gain vs Temperature 100 150 Slew Rate vs Temperature 10.40 100 VS=±5V VS=±5V RL=10kΩ Slew Rate (V/µS) Open-Loop Gain (dB) 50 Temperature (°C) Temperature (°C) 90 10.35 10.30 80 10.25 -50 0 50 Temperature (°C) 5 100 150 -50 0 50 Temperature (°C) 100 150 EL5128 Typical Performance Curves Supply Current per Amplifier vs Supply Voltage Supply Current per Amplifier vs Temperature 700 TA=25°C VS=±5V 600 Supply Current (µA) Supply Current (mA) 0.55 0.5 500 400 0.45 300 -50 0 50 100 150 0 5 10 Temperature (°C) 200 100 -80 50 -130 -180 Gain -50 10 100 1k 10k 100k 1M 10M Phase(°) -30 Phase Magnitude (Normalized) (dB) 150 Gain (dB) 5 20 0 10kΩ 0 1kΩ 150Ω -10 -15 100k -230 100M 560Ω CL=10pF AV=1 VS=±5V -5 1M Frequency Response for Various CL Closed Loop Output Impedance vs Frequency 20 200 RL=10kΩ AV=1 VS=±5V 10 12pF 0 50pF -10 100pF -20 1M 120 80 40 1000pF -30 100k AV=1 VS=±5V TA=25°C 160 Output Impedance (Ω) Magnitude (Normalized) (dB) 100M 10M Frequency (Hz) Frequency (Hz) 10M 0 10k 100M 100 1M 10M Frequency (Hz) Frequency (Hz) Maximum Output Swing vs Frequency CMRR vs Frequency 80 12 10 60 8 CMRR (dB) Maximum Output Swing (VP-P) 20 Frequency Response for Various RL Open Loop Gain and Phase vs Frequency VS=±5V, TA=25°C RL=10KΩ to GND CL=12pF to GND 15 Supply Voltage (V) 6 VS=±5V TA=25°C AV=1 RL=10kΩ CL=12pF Distortion <1% 4 2 20 VS=±5V TA=25°C 0 10k 40 100 1M Frequency (Hz) 6 10M 0 100 1k 10k 100k Frequency (Hz) 1M 10M EL5128 Typical Performance Curves Input Voltage Noise Spectral Density vs Frequency PSRR vs Frequency 600 80 PSRR+ PSRR (dB) Voltage Noise (nV√Hz) PSRR- 60 40 20 100 10 VS=±5V TA=25°C 0 100 1k 10k 100k 1M 1 100 10M 1k 10k Frequency (Hz) Total Harmonic Distortion + Noise vs Frequency 100M -60 Measured Channel A to B 0.009 0.008 VS=±5V RL=10kΩ AV=1 VIN=220mVRMS -80 X-Talk (dB) 0.007 THD+ N (%) 10M Channel Separation vs Frequency Response 0.010 0.006 0.005 0.004 VS=±5V RL=10kΩ AV=1 VIN=1VRMS 0.003 0.002 -100 -120 0.001 -140 1k 10k Frequency (Hz) 100k 1k 1M VS=±5V AV=1 RL=10kΩ CL=12pF TA=25°C 4 3 2 Step Size (V) 70 100k 6M Settling Time vs Step Size VS=±5V AV=1 RL=10kΩ VIN=±50mV TA=25°C 90 10k Frequency (Hz) Small-Signal Overshoot vs Load Capacitance Overshoot (%) 100k 1M Frequency (Hz) 50 30 0.1% 1 0 -1 -2 0.1% -3 -4 10 10 100 Load Capacitance (pF) 0 200 400 600 800 Settling Time (nS) Small Signal Transient Response Large Signal Transient Response 1V 1000 1µS 50mV 200ns VS=±5V TA=25°C AV=1 RL=10kΩ CL=12pF VS=±5V TA=25°C AV=1 RL=10kΩ CL=12pF 7 EL5128 Pin Descriptions PIN NUMBER PIN NAME 1 VOUTA PIN FUNCTION EQUIVALENT CIRCUIT Amplifier A Output VS+ VS- GND Circuit 1 2 VINA- Amplifier A Inverting Input VS+ VS- Circuit 2 3 VINA+ Amplifier A Non-Inverting Input (Reference Circuit 2) 4 VS+ Positive Power Supply 5 VINC Amplifier C (Reference Circuit 2) 6 VOUTC Amplifier C Output (Reference Circuit 2) 7 VS- 8 VINB+ Amplifier B Non-Inverting Input (Reference Circuit 2) 9 VINB- Amplifier B Inverting Input (Reference Circuit 2) 10 VOUTB Amplifier B Output (Reference Circuit 1) Negative Power Supply 8 EL5128 Applications Information Output Phase Reversal Product Description The EL5128 voltage feedback amplifier/buffer combination is fabricated using a high voltage CMOS process. It exhibits rail-to-rail input and output capability, it is unity gain stable, and has low power consumption (500µA per amplifier). These features make the EL5128 ideal for a wide range of general-purpose applications. Connected in voltage follower mode and driving a load of 10kΩ and 12pF, the EL5128 has a -3dB bandwidth of 12MHz while maintaining a 10V/µs slew rate. The EL5128 is immune to phase reversal as long as the input voltage is limited from (VS-) -0.5V to (VS+) +0.5V. Figure 2 shows a photo of the output of the device with the input voltage driven beyond the supply rails. Although the device's output will not change phase, the input's overvoltage should be avoided. If an input voltage exceeds supply voltage by more than 0.6V, electrostatic protection diodes placed in the input stage of the device begin to conduct and over-voltage damage could occur. FIGURE 2. Operation with Beyond-the-Rails Input Operating Voltage, Input, and Output 1V The EL5128 is specified with a single nominal supply voltage from 5V to 15V or a split supply with its total range from 5V to 15V. Correct operation is guaranteed for a supply range of 4.5V to 16.5V. Most EL5128 specifications are stable over both the full supply range and operating temperatures of 40°C to +85°C. Parameter variations with operating voltage and/or temperature are shown in the typical performance curves. The input common-mode voltage range of the amplifiers extends 500mV beyond the supply rails. The output swings of the EL5128 typically extend to within 80mV of positive and negative supply rails with load currents of 5mA. Decreasing load currents will extend the output voltage range even closer to the supply rails. Figure 1 shows the input and output waveforms for the device in the unity-gain configuration. Operation is from ±5V supply with a 10kΩ load connected to GND. The input is a 10VP-P sinusoid. The output voltage is approximately 9.985VP-P. FIGURE 1. Operation with Rail-to-Rail Input and Output 100µs VS=±2.5V TA=25°C AV=1 VIN=6VP-P 1V Power Dissipation With the high-output drive capability of the EL5128 amplifier, it is possible to exceed the 125°C “absolute-maximum junction temperature” under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if load conditions need to be modified for the amplifier to remain in the safe operating area. The maximum power dissipation allowed in a package is determined according to: where: • TJMAX = Maximum junction temperature Output VS=±5V TA=25°C AV=1 VIN=10VP- Input T JMAX - T AMAX P DMAX = --------------------------------------------Θ JA • TAMAX= Maximum ambient temperature • θJA = Thermal resistance of the package • PDMAX = Maximum power dissipation in the package Short Circuit Current Limit The EL5128 will limit the short circuit current to ±120mA if the output is directly shorted to the positive or the negative supply. If an output is shorted indefinitely, the power dissipation could easily increase such that the device may be damaged. Maximum reliability is maintained if the output continuous current never exceeds ±30mA. This limit is set by the design of the internal metal interconnects. 9 The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the loads, or: P DMAX = Σi × [ V S × I SMAX + ( V S + - V OUT i ) × I LOAD i ] when sourcing, and: P DMAX = Σi × [ V S × I SMAX + ( V OUT i - V S - ) × I LOAD i ] EL5128 when sinking. Driving Capacitive Loads where: The EL5128 can drive a wide range of capacitive loads. As load capacitance increases, however, the -3dB bandwidth of the device will decrease and the peaking increase. The amplifiers drive 10pF loads in parallel with 10kΩ with just 1.5dB of peaking, and 100pF with 6.4dB of peaking. If less peaking is desired in these applications, a small series resistor (usually between 5Ω and 50Ω) can be placed in series with the output. However, this will obviously reduce the gain slightly. Another method of reducing peaking is to add a “snubber” circuit at the output. A snubber is a shunt load consisting of a resistor in series with a capacitor. Values of 150Ω and 10nF are typical. The advantage of a snubber is that it does not draw any DC load current or reduce the gain • VS = Total supply voltage • ISMAX = Maximum supply current per amplifier • VOUTi = Maximum output voltage of the application • ILOADi = Load current If we set the two PDMAX equations equal to each other, we can solve for RLOADi to avoid device overheat. Figures 3 and 4 provide a convenient way to see if the device will overheat. The maximum safe power dissipation can be found graphically, based on the package type and the ambient temperature. By using the previous equation, it is a simple matter to see if PDMAX exceeds the device's power derating curves. To ensure proper operation, it is important to observe the recommended derating curves in Figures 3 and 4. FIGURE 3. Package Power Dissipation vs Ambient Temperature Package Power Dissipation vs Ambient Temperature JEDEC JESD51-7 High Effective Thermal Conductivity Test Board 1 0.9 870mW Power Dissipation (W) 0.8 0.7 MS θ JA = 0.6 0.5 11 5 OP 10 °C /W 0.4 0.3 0.2 0.1 0 0 25 50 75 85 100 125 Ambient Temperature (°C) FIGURE 4. Package Power Dissipation vs Ambient Temperature Package Power Dissipation vs Ambient Temperature JEDEC JESD51-3 Low Effective Thermal Conductivity Test Board 0.6 Power Dissipation (W) 0.5 486mW 0.4 θ MS OP 8/1 20 0 6° C/ W JA = 0.3 0.2 0.1 0 0 25 50 75 85 Ambient Temperature (°C) 10 100 125 Power Supply Bypassing and Printed Circuit Board Layout The EL5128 can provide gain at high frequency. As with any high-frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended, lead lengths should be as short as possible and the power supply pins must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to ground, a 0.1µF ceramic capacitor should be placed from VS+ to pin to VS- pin. A 4.7µF tantalum capacitor should then be connected in parallel, placed in the region of the amplifier. One 4.7µF capacitor may be used for multiple devices. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. EL5128 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 11