EL5120, EL5220, EL5420 ® Data Sheet February 21, 2005 12MHz Rail-to-Rail Input-Output Op Amps Features The EL5120, EL5220, and EL5420 are low power, high voltage, rail-to-rail input-output amplifiers. The EL5120 contains a single amplifier, the EL5220 contains two amplifiers, and the EL5420 contains four amplifiers. Operating on supplies ranging from 5V to 15V, while consuming only 500µA per amplifier, the EL5120, EL5220, and EL5420 have a bandwidth of 12MHz (-3dB). They also provide common mode input ability beyond the supply rails, as well as rail-to-rail output capability. This enables these amplifiers to offer maximum dynamic range at any supply voltage. • 12MHz -3dB bandwidth The EL5120, EL5220, and EL5420 also feature fast slewing and settling times, as well as a high output drive capability of 30mA (sink and source). These features make these amplifiers ideal for use as voltage reference buffers in Thin Film Transistor Liquid Crystal Displays (TFT-LCD). Other applications include battery power, portable devices, and anywhere low power consumption is important. • Pb-Free available (RoHS compliant) The EL5420 is available in the space-saving 14-pin TSSOP package, the industry-standard 14-pin SO package, as well as the 16-pin QFN package. The EL5220 is available in the 8-pin MSOP package and the EL5120 is available in the 5pin TSOT and 8-pin HMSOP packages. All feature a standard operational amplifier pin out. These amplifiers are specified for operation over the full -40°C to +85°C temperature range. • Touch-screen displays FN7186.4 • Supply voltage = 4.5V to 16.5V • Low supply current (per amplifier) = 500µA • High slew rate = 10V/µs • Unity-gain stable • Beyond the rails input capability • Rail-to-rail output swing • Ultra-small package Applications • TFT-LCD drive circuits • Electronics notebooks • Electronics games • Personal communication devices • Personal digital assistants (PDA) • Portable instrumentation • Sampling ADC amplifiers • Wireless LANs • Office automation • Active filters • ADC/DAC buffer 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2004, 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. EL5120, EL5220, EL5420 Ordering Information (Continued) Ordering Information PACKAGE TAPE & REEL PKG. DWG. # EL5120IWT-T7 5-Pin TSOT 7” (3K pcs) MDP0049 EL5120IWT-T7A 5-Pin TSOT 7” (250 pcs) MDP0049 EL5120IWTZ-T7 (See Note) 5-Pin TSOT (Pb-Free) 7” (3K pcs) EL5120IWTZ-T7A (See Note) 5-Pin TSOT (Pb-Free) EL5120IYE PART NUMBER PART NUMBER PACKAGE TAPE & REEL PKG. DWG. # EL5420CLZ (See Note) 16-Pin QFN (Pb-free) - MDP0046 MDP0049 EL5420CLZ-T7 (See Note) 16-Pin QFN (Pb-free) 7” MDP0046 7” (250 pcs) MDP0049 EL5420CLZ-T13 (See Note) 16-Pin QFN (Pb-free) 13” MDP0046 8-Pin HMSOP - MDP0050 MDP0027 EL5120IYE-T7 8-Pin HMSOP 7” MDP0050 EL5120IYE-T13 8-Pin HMSOP 13” MDP0050 EL5120IYEZ (See Note) 8-Pin HMSOP (Pb-Free) - EL5120IYEZ-T7 (See Note) 8-Pin HMSOP (Pb-Free) EL5120IYEZ-T13 (See Note) EL5420CS 14-Pin SO - EL5420CS-T7 14-Pin SO 7” MDP0027 EL5420CS-T13 14-Pin SO 13” MDP0027 MDP0050 EL5420CSZ (See Note) 14-Pin SO (Pb-free) - MDP0027 7” MDP0050 EL5420CSZ-T7 (See Note) 14-Pin SO (Pb-free) 7” MDP0027 8-Pin HMSOP (Pb-Free) 13” MDP0050 EL5420CSZ-T13 (See Note) 14-Pin SO (Pb-free) 13” MDP0027 EL5220CY 8-Pin MSOP - MDP0043 14-Pin TSSOP - MDP0044 EL5220CY-T7 8-Pin MSOP 7” MDP0043 EL5220CY-13 8-Pin MSOP 13” MDP0043 EL5220CYZ (See Note) 8-Pin MSOP (Pb-Free) - EL5220CYZ-T7 (See Note) 8-Pin MSOP (Pb-Free) EL5220CYZ-T13 (See Note) EL5420CR EL5420CR-T7 14-Pin TSSOP 7” MDP0044 EL5420CR-T13 14-Pin TSSOP 13” MDP0044 MDP0043 EL5420CRZ (Note) 14-Pin TSSOP (Pb-Free) - MDP0044 7” MDP0043 EL5420CRZ-T7 (Note) 14-Pin TSSOP (Pb-Free) 7” MDP0044 8-Pin MSOP (Pb-Free) 13” MDP0043 EL5420CRZ-T13 (Note) 14-Pin TSSOP (Pb-Free) 13” MDP0044 EL5420CL 16-Pin QFN - MDP0046 EL5420CL-T7 16-Pin QFN 7” MDP0046 EL5420CL-T13 16-Pin QFN 13” MDP0046 NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Pinouts NC 1 IN- 2 IN+ 3 VS- 4 EL5420 (14-PIN TSSOP, SO) TOP VIEW 8 NC + 5 VINB+ VOUTA 1 7 VS+ VINA- 2 6 OUT VINA+ 3 5 NC 14 VOUTD - + + - 2 12 VIND- VINA+ 2 11 VIND+ THERMAL PAD VS+ 3 10 VS9 VINC+ VINB+ 4 11 VS- VINB+ 5 VOUTB 7 VINA- 1 12 VIND+ VS+ 4 VINB- 6 13 VIND- 13 NC 6 VINB+ VINC- 8 VINA+ 3 VS- 4 EL5120 (8-PIN HMSOP) TOP VIEW 7 VOUTB 14 VOUTD + VOUTC 7 4 VIN- 8 VS+ 15 VOUTA VINA- 2 + - VIN+ 3 VOUTA 1 VOUTB 6 VS- 2 5 VS+ EL5420 (16-PIN QFN) TOP VIEW 16 NC VOUT 1 EL5220 (8-PIN MSOP) TOP VIEW VINB- 5 EL5120 (5-PIN TSOT) TOP VIEW 10 VINC+ - + + - 9 VINC8 VOUTC FN7186.4 February 21, 2005 EL5120, EL5220, EL5420 Absolute Maximum Ratings (TA = 25°C) Supply Voltage between VS+ and VS- . . . . . . . . . . . . . . . . . . . .+18V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . VS- - 0.5V, VS +0.5V Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 30mA Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER VS+ = +5V, VS- = -5V, RL = 10kΩ and CL = 10pF to 0V, TA = 25°C, unless otherwise specified. DESCRIPTION CONDITIONS MIN TYP MAX UNIT 12 mV INPUT CHARACTERISTICS VOS Input Offset Voltage VCM = 0V 2 TCVOS Average Offset Voltage Drift (Note 1) 5 IB Input Bias Current VCM = 0V 2 RIN Input Impedance 1 GΩ CIN Input Capacitance 1.35 pF CMIR Common-Mode Input Range CMRR Common-Mode Rejection Ratio for VIN from -5.5V to +5.5V 50 70 dB AVOL Open Loop Gain -4.5V ≤ VOUT ≤ +4.5V 75 95 dB -5.5 µV/°C 50 +5.5 nA V OUTPUT CHARACTERISTICS VOL Output Swing Low IL = -5mA VOH Output Swing High IL = 5mA ISC IOUT -4.92 4.85 -4.85 V 4.92 V Short Circuit Current ±120 mA Output Current ±30 mA 80 dB POWER SUPPLY PERFORMANCE PSRR Power Supply Rejection Ratio VS is moved from ±2.25V to ±7.75V IS Supply Current (Per Amplifier) No load 500 60 750 µA DYNAMIC PERFORMANCE SR Slew Rate (Note 2) -4.0V ≤ VOUT ≤ +4.0V, 20% to 80% 10 V/µs tS Settling to +0.1% (AV = +1) (AV = +1), VO = 2V step 500 ns BW -3dB Bandwidth RL = 10kΩ, CL = 10pF 12 MHz GBWP Gain-Bandwidth Product RL = 10kΩ, CL = 10pF 8 MHz PM Phase Margin RL = 10kΩ, CL = 10 pF 50 ° CS Channel Separation f = 5MHz (EL5220 & EL5420 only) 75 dB NOTES: 1. Measured over operating temperature range 2. Slew rate is measured on rising and falling edges 3 FN7186.4 February 21, 2005 EL5120, EL5220, EL5420 Electrical Specifications PARAMETER VS+ = +5V, VS- = 0V, RL = 10kΩ and CL = 10pF to 2.5V, TA = 25°C, unless otherwise specified. DESCRIPTION CONDITIONS MIN TYP MAX UNIT 10 mV INPUT CHARACTERISTICS VOS Input Offset Voltage VCM = 2.5V 2 TCVOS Average Offset Voltage Drift (Note 1) 5 IB Input Bias Current VCM = 2.5V 2 RIN Input Impedance 1 GΩ CIN Input Capacitance 1.35 pF CMIR Common-Mode Input Range CMRR Common-Mode Rejection Ratio for VIN from -0.5V to +5.5V 45 66 dB AVOL Open Loop Gain 0.5V ≤ VOUT ≤+ 4.5V 75 95 dB -0.5 µV/°C 50 +5.5 nA V OUTPUT CHARACTERISTICS VOL Output Swing Low IL = -5mA VOH Output Swing High IL = +5mA ISC IOUT 80 4.85 150 mV 4.92 V Short Circuit Current ±120 mA Output Current ±30 mA 80 dB POWER SUPPLY PERFORMANCE PSRR Power Supply Rejection Ratio VS is moved from 4.5V to 15.5V IS Supply Current (Per Amplifier) No load 500 60 750 µA DYNAMIC PERFORMANCE SR Slew Rate (Note 2) 1V ≤ VOUT ≤ 4V, 20% to 80% 10 V/µs tS Settling to +0.1% (AV = +1) (AV = +1), VO = 2V step 500 ns BW -3dB Bandwidth RL = 10kΩ, CL = 10pF 12 MHz GBWP Gain-Bandwidth Product RL = 10 kΩ, CL = 10pF 8 MHz PM Phase Margin RL = 10 kΩ, CL = 10 pF 50 ° CS Channel Separation f = 5MHz (EL5220 & EL5420 only) 75 dB NOTES: 1. Measured over operating temperature range 2. Slew rate is measured on rising and falling edges 4 FN7186.4 February 21, 2005 EL5120, EL5220, EL5420 Electrical Specifications PARAMETER VS+ = +15V, VS- = 0V, RL = 10kΩ and CL = 10pF to 7.5V, TA = 25°C, unless otherwise specified. DESCRIPTION CONDITIONS MIN TYP MAX UNIT 14 mV INPUT CHARACTERISTICS VOS Input Offset Voltage VCM = 7.5V 2 TCVOS Average Offset Voltage Drift (Note 1) 5 IB Input Bias Current VCM = 7.5V 2 RIN Input Impedance 1 GΩ CIN Input Capacitance 1.35 pF CMIR Common-Mode Input Range CMRR Common-Mode Rejection Ratio for VIN from -0.5V to +15.5V 53 72 dB AVOL Open Loop Gain 0.5V ≤ VOUT ≤ 14.5V 75 95 dB -0.5 µV/°C 50 +15.5 nA V OUTPUT CHARACTERISTICS VOL Output Swing Low IL = -5mA VOH Output Swing High IL = +5mA ISC IOUT 80 14.85 150 mV 14.92 V Short Circuit Current ±120 mA Output Current ±30 mA 80 dB POWER SUPPLY PERFORMANCE PSRR Power Supply Rejection Ratio VS is moved from 4.5V to 15.5V IS Supply Current (Per Amplifier) No load 500 60 750 µA DYNAMIC PERFORMANCE SR Slew Rate (Note 2) 1V ≤ VOUT ≤ 14V, 20% to 80% 10 V/µs tS Settling to +0.1% (AV = +1) (AV = +1), VO = 2V step 500 ns BW -3dB Bandwidth RL = 10kΩ, CL = 10pF 12 MHz GBWP Gain-Bandwidth Product RL = 10kΩ, CL = 10pF 8 MHz PM Phase Margin RL = 10kΩ, CL = 10 pF 50 ° CS Channel Separation f = 5MHz (EL5220 & EL5420 only) 75 dB NOTES: 1. Measured over operating temperature range 2. Slew rate is measured on rising and falling edges 5 FN7186.4 February 21, 2005 EL5120, EL5220, EL5420 Typical Performance Curves TYPICAL PRODUCTION DISTRIBUTION 1400 1200 1000 800 600 400 200 40 30 20 10 INPUT BIAS CURRENT (nA) 5 0 -5 50 100 2.0 -50 0 4.95 4.94 50 100 150 TEMPERATURE (°C) FIGURE 5. OUTPUT HIGH VOLTAGE vs TEMPERATURE 6 50 21 19 17 100 150 FIGURE 4. INPUT BIAS CURRENT vs TEMPERATURE -4.91 OUTPUT LOW VOLTAGE (V) OUTPUT HIGH VOLTAGE (V) 4.96 0 15 -2.0 TEMPERATURE (°C) VS=±5V IOUT=5mA -50 13 0.0 150 FIGURE 3. INPUT OFFSET VOLTAGE vs TEMPERATURE 4.93 11 VS=±5V TEMPERATURE (°C) 4.97 9 FIGURE 2. EL5420 INPUT OFFSET VOLTAGE DRIFT VS=±5V 0 7 INPUT OFFSET VOLTAGE DRIFT, TCVOS (µV/°C) FIGURE 1. EL5420 INPUT OFFSET VOLTAGE DISTRIBUTION -50 5 1 12 8 10 6 4 2 -0 -2 -4 -6 -8 -10 -12 INPUT OFFSET VOLTAGE (mV) INPUT OFFSET VOLTAGE (mV) 50 0 0 10 TYPICAL PRODUCTION DISTRIBUTION VS=±5V 60 3 1600 70 VS=±5V TA=25°C QUANTITY (AMPLIFIERS) QUANTITY (AMPLIFIERS) 1800 -4.92 VS=±5V IOUT=-5mA -4.93 -4.94 -4.95 -4.96 -4.97 -50 0 50 100 150 TEMPERATURE (°C) FIGURE 6. OUTPUT LOW VOLTAGE vs TEMPERATURE FN7186.4 February 21, 2005 EL5120, EL5220, EL5420 Typical Performance Curves (Continued) VS=±5V RL=10kΩ 10.40 SLEW RATE (V/µs) OPEN LOOP GAIN (dB) 100 90 80 VS=±5V 10.35 10.30 10.25 -50 0 50 100 -50 150 100 150 TEMPERATURE (°C) FIGURE 7. OPEN LOOP GAIN vs TEMPERATURE FIGURE 8. SLEW RATE vs TEMPERATURE 700 VS=±5V TA=25°C 0.55 SUPPLY CURRENT (µA) SUPPLY CURRENT (mA) 50 0 TEMPERATURE (°C) 0.5 600 500 400 0.45 -50 0 50 100 300 150 5 0 TEMPERATURE (°C) 200 100 1K -180 GAIN -230 10K 100K 1M 10M 100M FREQUENCY (Hz) FIGURE 11. OPEN LOOP GAIN AND PHASE vs FREQUENCY 7 MAGNITUDE (NORMALIZED) (dB) -130 PHASE (°) GAIN (dB) -80 VS=±5V, TA=25°C RL=10KΩ to GND CL=12pF to GND 5 -30 PHASE 50 -50 10 FIGURE 10. EL5420 SUPPLY CURRENT PER AMPLIFIER vs SUPPLY VOLTAGE 20 100 0 20 15 SUPPLY VOLTAGE (V) FIGURE 9. EL5420 SUPPLY CURRENT PER AMPLIFIER vs TEMPERATURE 150 10 10kΩ 0 1kΩ 560Ω -5 -10 150Ω CL=10pF AV=1 VS=±5V -15 100K 1M 10M 100M FREQUENCY (Hz) FIGURE 12. FREQUENCY RESPONSE FOR VARIOUS RL FN7186.4 February 21, 2005 EL5120, EL5220, EL5420 Typical Performance Curves (Continued) 200 RL=10kΩ AV=1 10 VS=±5V OUTPUT IMPEDANCE (Ω) MAGNITUDE (NORMALIZED) (dB) 20 12pF 0 50pF -10 100pF -20 1000pF -30 100K 1M 160 120 80 40 0 10K 100M 10M AV=1 VS=±5V TA=25°C FIGURE 14. CLOSED LOOP OUTPUT IMPEDANCE vs FREQUENCY 80 12 10 60 8 CMRR (dB) MAXIMUM OUTPUT SWING (VP-P) 10M FREQUENCY (Hz) FIGURE 13. FREQUENCY RESPONSE FOR VARIOUS CL 6 VS=±5V TA=25°C AV=1 RL=10kΩ CL=12pF Distortion <1% 4 2 0 10K 40 20 VS=±5V TA=25°C 100K 1M 0 100 10M 1K FIGURE 15. MAXIMUM OUTPUT SWING vs FREQUENCY 100K 1M 10M FIGURE 16. CMRR vs FREQUENCY 600 PSRR+ VOLTAGE NOISE (nV/√Hz) 80 10K FREQUENCY (Hz) FREQUENCY (Hz) PSRR- 60 PSRR (dB) 1M 100K FREQUENCY (Hz) 40 20 VS=±5V TA=25°C 0 100 1K 10K 100K 1M FREQUENCY (Hz) FIGURE 17. PSRR vs FREQUENCY 8 10M 100 10 1 100 1K 10K 100K 1M 10M 100M FREQUENCY (Hz) FIGURE 18. INPUT VOLTAGE NOISE SPECTRAL DENSITY vs FREQUENCY FN7186.4 February 21, 2005 EL5120, EL5220, EL5420 Typical Performance Curves (Continued) 0.010 -60 DUAL MEASURED CHANNEL A TO B QUAD MEASURED CHANNEL A TO D OR B TO C OTHER COMBINATIONS YIELD IMPROVED REJECTION 0.009 -80 X-TALK (dB) THD+ N (%) 0.008 0.007 0.006 0.005 0.004 VS=±5V 0.003 RL=10kΩ AV=1 0.002 V =1V IN RMS -100 VS=±5V RL=10kΩ AV=1 VIN=220mVRMS -120 0.001 1K 10K -140 1K 100K 10K 1M 6M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 19. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY V =±5V 90 AS=1 V RL=10kΩ VIN=±50mV 70 T =25°C A FIGURE 20. CHANNEL SEPARATION vs FREQUENCY RESPONSE VS=±5V AV=1 RL=10kΩ CL=12pF TA=25°C 4 3 STEP SIZE (V) OVERSHOOT (%) 100K 50 30 2 1 0.1% 0 -1 -2 0.1% -3 10 -4 10 100 1K 0 200 1V 1µs VS=±5V TA=25°C AV=1 RL=10kΩ CL=12pF FIGURE 23. LARGE SIGNAL TRANSIENT RESPONSE 9 600 800 SETTLING TIME (ns) LOAD CAPACITANCE (pF) FIGURE 21. SMALL SIGNAL OVERSHOOT vs LOAD CAPACITANCE 400 FIGURE 22. SETTLING TIME vs STEP SIZE 50mV 200ns VS=±5V TA=25°C AV=1 RL=10kΩ CL=12pF FIGURE 24. SMALL SIGNAL TRANSIENT RESPONSE FN7186.4 February 21, 2005 EL5120, EL5220, EL5420 Pin Descriptions EL5120 EL5220 EL5420 PIN NAME 1 1 1 VOUTA PIN FUNCTION EQUIVALENT CIRCUIT Amplifier A Output VS+ GND VS- CIRCUIT 1 4 2 2 VINA- Amplifier A Inverting Input VS+ VSCIRCUIT 2 3 3 3 VINA+ 5 8 4 VS+ 5 5 VINB+ Amplifier B Non-Inverting Input (Reference Circuit 2) 6 6 VINB- Amplifier B Inverting Input (Reference Circuit 2) 7 7 VOUTB Amplifier B Output (Reference Circuit 1) 8 VOUTC Amplifier C Output (Reference Circuit 1) 9 VINC- Amplifier C Inverting Input (Reference Circuit 2) 10 VINC+ Amplifier C Non-Inverting Input (Reference Circuit 2) 11 VS- 12 VIND+ Amplifier D Non-Inverting Input (Reference Circuit 2) 13 VIND- Amplifier D Inverting Input (Reference Circuit 2) 14 VOUTD Amplifier D Output (Reference Circuit 1) 2 4 Amplifier A Non-Inverting Input Positive Power Supply Negative Power Supply Applications Information Product Description The EL5120, EL5220, and EL5420 voltage feedback amplifiers are fabricated using a high voltage CMOS process. They exhibit rail-to-rail input and output capability, they are unity gain stable, and have low power consumption (500µA per amplifier). These features make the EL5120, EL5220, and EL5420 ideal for a wide range of generalpurpose applications. Connected in voltage follower mode and driving a load of 10kΩ and 12pF, the EL5120, EL5220, and EL5420 have a -3dB bandwidth of 12MHz while maintaining a 10V/µs slew rate. The EL5120 is a single amplifier, the EL5220 is a dual amplifier, and the EL5420 is a quad amplifier. 10 (Reference Circuit 2) Operating Voltage, Input, and Output The EL5120, EL5220, and EL5420 are specified with a single nominal supply voltage from 5V to 15V or a split supply with its total range from 5V to 15V. Correct operation is guaranteed for a supply range of 4.5V to 16.5V. Most EL5120, EL5220, and EL5420 specifications are stable over both the full supply range and operating temperatures of -40°C to +85°C. Parameter variations with operating voltage and/or temperature are shown in the typical performance curves. The input common-mode voltage range of the EL5120, EL5220, and EL5420 extends 500mV beyond the supply rails. The output swings of the EL5120, EL5220, and EL5420 typically extend to within 80mV of positive and negative supply rails with load currents of 5mA. Decreasing load currents will extend the output voltage range even closer to the supply rails. Figure 25 shows the input and FN7186.4 February 21, 2005 EL5120, EL5220, EL5420 output waveforms for the device in the unity-gain configuration. Operation is from ±5V supply with a 10kΩ load connected to GND. The input is a 10VP-P sinusoid. The output voltage is approximately 9.985VP-P. current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if load conditions need to be modified for the amplifier to remain in the safe operating area. The maximum power dissipation allowed in a package is determined according to: OUTPUT INPUT VS=±5V TA=25°C AV=1 VIN=10VP-P FIGURE 25. OPERATION WITH RAIL-TO-RAIL INPUT AND OUTPUT Short Circuit Current Limit The EL5120, EL5220, and EL5420 will limit the short circuit current to ±120mA if the output is directly shorted to the positive or the negative supply. If an output is shorted indefinitely, the power dissipation could easily increase such that the device may be damaged. Maximum reliability is maintained if the output continuous current never exceeds ±30mA. This limit is set by the design of the internal metal interconnects. T JMAX – T AMAX P DMAX = -------------------------------------------Θ JA where: • TJMAX = Maximum junction temperature • TAMAX = Maximum ambient temperature • θJA = Thermal resistance of the package • PDMAX = Maximum power dissipation in the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the loads, or: P DMAX = Σi × [ V S × I SMAX + ( V S + – V OUT i ) × I LOAD i ] when sourcing, and: P DMAX = Σi × [ V S × I SMAX + ( V OUT i – V S - ) × I LOAD i ] when sinking. Output Phase Reversal where: The EL5120, EL5220, and EL5420 are immune to phase reversal as long as the input voltage is limited from (VS-) -0.5V to (VS+) +0.5V. Figure 26 shows a photo of the output of the device with the input voltage driven beyond the supply rails. Although the device's output will not change phase, the input's overvoltage should be avoided. If an input voltage exceeds supply voltage by more than 0.6V, electrostatic protection diodes placed in the input stage of the device begin to conduct and overvoltage damage could occur. • i = 1 to 2 for dual and 1 to 4 for quad 1V 100µs VS=±2.5V TA=25°C AV=1 VIN=6VP-P 1V • VS = Total supply voltage • ISMAX = Maximum supply current per amplifier • VOUTi = Maximum output voltage of the application • ILOADi = Load current If we set the two PDMAX equations equal to each other, we can solve for RLOADi to avoid device overheat. Figures 27 and 28 provide a convenient way to see if the device will overheat. The maximum safe power dissipation can be found graphically, based on the package type and the ambient temperature. By using the previous equation, it is a simple matter to see if PDMAX exceeds the device's power derating curves. To ensure proper operation, it is important to observe the recommended derating curves in Figures 27 and 28. FIGURE 26. OPERATION WITH BEYOND-THE-RAILS INPUT Power Dissipation With the high-output drive capability of the EL5120, EL5220, and EL5420 amplifiers, it is possible to exceed the 125°C “absolute-maximum junction temperature” under certain load 11 FN7186.4 February 21, 2005 EL5120, EL5220, EL5420 Unused Amplifiers POWER DISSIPATION (W) 3 JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 2.500W 2.5 QFN16 θJA=40°C/W 2 1.136W 1 SO14 θJA=88°C/W 1.0W 870mW 0.5 0 Driving Capacitive Loads TSSOP14 θJA=100°C/W 1.5 MSOP8 θJA=115°C/W 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (°C) FIGURE 27. PACKAGE POWER DISSIPATION VS AMBIENT TEMPERATURE 1 JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD POWER DISSIPATION (W) SO14 θJA=120°C/W 0.7 667mW 0.6 QFN16 θJA=150°C/W 606mW 0.5 486mW 0.4 0.3 MSOP8 θJA=206°C/W 0.2 0.1 0 0 25 TSSOP14 θJA=165°C/W 75 85 100 50 The EL5120, EL5220, and EL5420 can drive a wide range of capacitive loads. As load capacitance increases, however, the -3dB bandwidth of the device will decrease and the peaking increase. The amplifiers drive 10pF loads in parallel with 10kΩ with just 1.5dB of peaking, and 100pF with 6.4dB of peaking. If less peaking is desired in these applications, a small series resistor (usually between 5Ω and 50Ω) can be placed in series with the output. However, this will obviously reduce the gain slightly. Another method of reducing peaking is to add a “snubber” circuit at the output. A snubber is a shunt load consisting of a resistor in series with a capacitor. Values of 150Ω and 10nF are typical. The advantage of a snubber is that it does not draw any DC load current or reduce the gain Power Supply Bypassing and Printed Circuit Board Layout 0.9 833mW 0.8 It is recommended that any unused amplifiers in a dual and a quad package be configured as a unity gain follower. The inverting input should be directly connected to the output and the non-inverting input tied to the ground plane. 125 150 AMBIENT TEMPERATURE (°C) FIGURE 28. PACKAGE POWER DISSIPATION VS AMBIENT TEMPERATURE The EL5120, EL5220, and EL5420 can provide gain at high frequency. As with any high-frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended, lead lengths should be as short as possible and the power supply pins must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to ground, a 0.1µF ceramic capacitor should be placed from VS+ to pin to VS- pin. A 4.7µF tantalum capacitor should then be connected in parallel, placed in the region of the amplifier. One 4.7µF capacitor may be used for multiple devices. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 12 FN7186.4 February 21, 2005