HT0440 DATA SHEET (06/27/2014) DOWNLOAD

Supertex inc.
HT0440
Dual, High Voltage,
Isolated MOSFET Driver
Features
General Description
The Supertex HT0440 is a dual, high voltage, isolated
MOSFET driver utilizing Supertex’s proprietary HVCMOS®
technology. It is designed to drive discrete MOSFETs
configured as bidirectional or unidirectional switches. It
can drive N-channel MOSFETs as high-side switches up to
400V. The HT0440 generates two independent DC isolated
voltages to the outputs, VOUTA and VOUTB when logic inputs A
and B are at logic high.
►► ±400V input to output isolation
►► ±700V isolation between outputs
►► No external voltage supply required
►► Dual isolated output drivers
►► Option of internal or external clock
Applications
►► Telecommunications
►► Modems
►► Solid state relays
►► High side switches
►► High end audio switches
►► Avionics
►► ATE
The internal clock of the HT0440 can be disabled by
applying an external clock signal to the CLK pin. This allows
the power dissipation and AC characteristics to be tailored
to meet specific needs. The CLK pin should be connected
to ground when not in use. The HT0440 does not require
any external power supplies, the internal supply voltage is
supplied by either of the two logic inputs, A or B, when they
are at logic high.
For detailed circuit application information, please refer
to application note AN-D26.
Block Diagram
Isolation
Barrier
CLK
2
A
1
Logic &
Internal
Clock
B
GND
8
Driver A
Driver B
10R
10R
R
4
R
3
R
5
R
6
+
VOUTA
-
+
VOUTB
-
7
R = 158kΩ ± 47%
Doc.# DSFP-HT0440
D040313
Supertex inc.
www.supertex.com
HT0440
Pin Configurations
Ordering Information
Part Number
Package Options
Packing
HT0440K6-G
10-Lead (3x4) DFN
HT0440LG-G
8-Lead SOIC (Narrow Body)
A
1
10
B
3000/Reel
CLK
2
9
GND
2500/Reel
NC
3
8
NC
-VOUTA
4
7
-VOUTB
+VOUTA
5
6
+VOUTB
-G denotes a lead (Pb)-free / RoHS compliant package
Absolute Maximum Ratings
10-Lead DFN
Parameter
Value
Input to output isolation voltage, VISO
±400V
Logic input voltage, VA, VB
(top view)
A
1
8
B
CLK
2
7
GND
-VOUTA
3
6
-VOUTB
+VOUTA
4
5
+VOUTB
-0.5 to +7.0V
Maximum junction temperature
+125°C
Storage temperature
GND
-55°C to +150°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied. Continuous operation of the device
at the absolute rating level may affect device reliability. All voltages are referenced to device
ground.
8-Lead SOIC (Narrow Body)
(top view)
Typical Thermal Resistance
Product Marking
Package
θja
10-Lead DFN
40OC/W
8-Lead SOIC (Narrow Body)
101OC/W
0440
YWLL
Y = Last Digit of Year Sealed
W = Code for Week Sealed
L = Lot Number
= “Green” Packaging
Package may or may not include the following marks: Si or
10-Lead DFN
YYWW
HT04
LLLL
YY = Year Sealed
WW = Week Sealed
L = Lot Number
= “Green” Packaging
Package may or may not include the following marks: Si or
8-Lead SOIC (Narrow Body
Recommended Operating Conditions
Sym
Parameter
Min
Typ
Max
Units
Conditions
CLK
External clock frequency
0.5
-
2.0
MHz
---
VIHCLK
Clock input high voltage
3.15
-
5.5
V
---
VILCLK
Clock input low voltage
0
-
0.5
V
---
VIH
Logic input high voltage
3.15
-
5.5
V
---
VIL
Logic input low voltage
0
-
0.5
V
---
TA
Operating temperature
-40
-
+85
C
---
Doc.# DSFP-HT0440
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O
Supertex inc.
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HT0440
DC Electrical Characteristics (T = 25°C unless otherwise specified)
A
Sym
Parameter
IHA + IHB
VOUTA,
VOUTB
Min
Typ
Max
Units
-
-
300
µA
VA = 3.5V, VB = 3.5V, CLK = 0V
-
-
500
µA
VA = 3.5V, VB = 3.5V, CLK = 500kHz
-
-
2.0
mA
VA = 3.5V, VB = 3.5V, CLK = 2.0MHz
-
-
1.0
mA
VA = 5.5V, VB = 5.5V, CLK = 0V
-
-
2.0
mA
VA = 5.5V, VB = 5.5V, CLK = 500kHz
6.0
-
-
V
5.0
-
-
V
6.0
-
-
V
10.0
-
-
V
8.0
-
-
V
Total logic high input current
Output voltage
Conditions
VA = 3.15V, VB = 3.15V,
CLK = 0V, no load
VA = 3.15V, VB = 3.15V,
CLK = 500kHz, no load
VA = 3.15V, VB = 3.15V,
CLK = 2.0MHz, no load
VA = 4.5V, VB = 4.5V,
CLK = 0V, no load
VA = 4.5V, VB = 4.5V,
CLK = 500kHz, no load
IILA
Logic low input A current
-
-
10
µA
VA = 0.5V, VB = high
IILB
Logic low input B current
-
-
10
µA
VA = high, VB = 0.5V
IILQ
Quiescent current
-
-
10
µA
VA = 0.5V, VB = 0.5V
VISO
Input to output isolation voltage
±400
-
-
V
---
VCISO
Output to output isolation voltage
±700
-
-
V
---
AC Electrical Characteristics (T =25°C unless otherwise specified)
A
Sym
Parameter
td(ON)
tr
td(OFF)
tf
Min
Typ
Max
Units
Turn-ON delay time
-
-
50
µs
Rise time
-
-
650
µs
Turn-OFF delay time
-
-
150
µs
Fall time
-
-
3.0
ms
Conditions
See timing diagram and test circuit
CLK = 0V, CL = 600pF
Truth Table
A
B
CLK
VOUTA
VOUTB
Internal Clock
0
0
0
OFF
OFF
OFF
0
OFF
ON
ON
0
0
ON
OFF
ON
1
1
0
ON
ON
ON
0
0
CLK
OFF
OFF
OFF
CLK
OFF
ON
OFF
0
CLK
ON
OFF
OFF
1
CLK
ON
ON
OFF
0
0
1
Doc.# DSFP-HT0440
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Supertex inc.
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HT0440
Timing Diagram
4.5V
VA, VB
50%
50%
0V
90%
90%
10%
10%
VOUTA, VOUTB
td(ON)
tr
td(OFF)
tf
Test Circuit
4.5V
1
0V
8
A
+
VOUTA
-
B
4
3
VOUTA
CL = 600pF
HT0440
2
7
Doc.# DSFP-HT0440
D040313
CLK
GND
+
VOUTB
-
4
5
6
VOUTB
CL = 600pF
Supertex inc.
www.supertex.com
HT0440
10-Lead DFN Package Outline (K6)
3.00x4.00mm body, 1.00mm height (max), 0.50mm pitch
D2
D
10
E
10
E2
Note 1
(Index Area
D/2 x E/2)
Pin #1 ID
R = 0.20
1
e
b
Top View
Bottom View
1
View B
Note 1
(Index Area
D/2 x E/2)
Note 3
θ
A
L
Seating
Plane
L1
Note 2
A1
View B
Side View
Notes:
1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or
a printed indicator.
2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present.
3. The inner tip of the lead may be either rounded or square.
Symbol
Dimension
(mm)
MIN
A
A1
b
D
D2
E
E2
0.80
0.00
0.18
2.95
2.20
3.95
2.50
NOM
0.90
0.02
0.25
3.00
2.35
4.00
2.65
MAX
1.00
0.05
0.30
3.05
2.45
4.05
2.75
e
0.50
BSC
L
L1
θ
0.30
0.00
0O
0.40
-
-
0.50
0.15
14O
Drawings not to scale.
Supertex Doc. #: DSPD-10DFNK63X4P050, Version A072611
Doc.# DSFP-HT0440
D040313
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Supertex inc.
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HT0440
8-Lead SOIC (Narrow Body) Package Outline (LG)
4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch
θ1
D
8
Note 1
(Index Area
D/2 x E1/2)
E1
E
L2
L
1
θ
L1
Top View
View B
Note 1
Gauge
Plane
Seating
Plane
View B
h
A
h
A A2
Seating
Plane
A1
e
b
Side View
View A-A
A
Note:
1. This chamfer feature is optional. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier;
an embedded metal marker; or a printed indicator.
Symbol
Dimension
(mm)
A
A1
A2
b
MIN
1.35*
0.10
1.25
0.31
NOM
-
-
-
-
MAX
1.75
0.25
1.65*
0.51
D
E
E1
4.80* 5.80* 3.80*
4.90
6.00
3.90
5.00* 6.20* 4.00*
e
1.27
BSC
h
L
0.25
0.40
-
-
0.50
1.27
L1
L2
θ
θ1
0
5O
-
-
8
15O
O
1.04
REF
0.25
BSC
O
JEDEC Registration MS-012, Variation AA, Issue E, Sept. 2005.
* This dimension is not specified in the JEDEC drawing.
Drawings are not to scale.
Supertex Doc. #: DSPD-8SOLGTG, Version I041309.
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)
Supertex inc.
©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited.
Doc.# DSFP-HT0440
D040313
6
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com