PANASONIC 2SK3269

Power MOSFETs
2SK3269
N-channel enhancement mode MOSFET
■ Features
Unit: mm
4.6±0.2
(1.4)
10.5±0.3
■ Applications
3.0±0.5
0 to 0.5
• For PDP
• For high-speed switching
0.6±0.1
10.1±0.3
1.4±0.1
1.4±0.1
0.8±0.1
2.5±0.2
2.54±0.3
0 to 0.3
■ Absolute Maximum Ratings TC = 25°C
(10.2)
(8.9)
Symbol
Rating
Unit
Drain-source surrender voltage
VDSS
100
V
Gate-source surrender voltage
VGSS
±20
V
Drain current
ID
±25
A
Peak drain current
IDP
±100
A
EAS
22.5
mJ
40
W
Avalanche energy capability *
Power dissipation
PD
Ta = 25°C
2
3
(2.1)
1
(6.4) (1.4)
Parameter
1.5±0.3
• Low on-resistance, low Qg
• High avalanche resistance
1: Gate
2: Drain
3: Source
TO-220C-G1 Package
Marking Symbol: K3269
1.4
Channel temperature
Tch
150
°C
Storage temperature
Tstg
−55 to +150
°C
Internal Connection
D
Note) *: L = 0.2 mH, IL = 15 A, 1 pulse
G
S
■ Electrical Characteristics TC = 25°C ± 3°C
Parameter
Drain-source surrender voltage
Symbol
VDSS
Conditions
Min
ID = 1 mA, VGS = 0
100
2.0
Gate threshold voltage
Vth
VDS = 10 V, ID = 1 mA
Drain-source cutoff current
IDSS
VDS = 80 V, VGS = 0
Gate-source cutoff current
IGSS
VGS = ±20 V, VDS = 0
Drain-source ON resistance
RDS(on)
VGS = 10 V, ID = 12 A
Forward transfer admittance
Yfs
VDS = 10 V, ID = 12 A
Typ
Unit
V
70
4.0
V
10
µA
±1
µA
100
mΩ
11
S
960
pF
Coss
285
pF
Reverse transfer capacitance
(Common-source)
Crss
85
pF
Turn-on delay time
td(on)
VDD = 30 V, ID = 12 A
15
ns
Tr
RL = 2.5 Ω, VGS = 10 V
Short-circuit forward transfer capacitance
(Common-source)
Ciss
Short-circuit output capacitance
(Common-source)
Rise time
Turn-off delay time
Fall time
Publication date: March 2004
VDS = 10 V, VGS = 0, f = 1 MHz
6
Max
10
ns
td(off)
65
ns
tf
35
ns
SJG00032AED
1
2SK3269
■ Electrical Characteristics (continued) TC = 25°C ± 3°C
Parameter
Symbol
Diode foward voltage
Conditions
Min
IDR = 15 A, VGS = 0
VDSF
Typ
Max
Unit
1.4
V
Thermal resistance (ch-c)
Rth(ch-c)
3.125
°C/W
Thermal resistance (ch-a)
Rth(ch-a)
89.3
°C/W
Note) Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 measuring methods for transistors.
PD  Ta
Safe operation area
1 000
60
Non repetitive pulse
TC = 25°C
(1) TC = Ta
(2) Without heat sink:
PD = 1.4 W
Drain current ID (A)
IDP
t = 100 µs
ID
t=
1 ms
t=
10 ms
10
1
RDS(on) / RDS(on)
Limited
t=
100 ms
DC
Power dissipation PD (W)
50
100
40
(1)
30
20
10
(2)
10−1
0.1
1
10
Drain-source voltage VDS (V)
2
100
0
0
25
50
75
100
125
Ambient temperature Ta (°C)
SJG00032AED
150
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and semiconductors described in this material
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the products or technical information described in this material and controlled under the "Foreign Exchange
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applied circuits examples of the products. It neither warrants non-infringement of intellectual property right
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Consult our sales staff in advance for information on the following applications:
• Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are
required, or if the failure or malfunction of the products may directly jeopardize life or harm the human
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• Any applications other than the standard applications intended.
(5) The products and product specifications described in this material are subject to change without notice for
modification and/or improvement. At the final stage of your design, purchasing, or use of the products,
therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements.
(6) When designing your equipment, comply with the guaranteed values, in particular those of maximum rating, the range of operating power supply voltage, and heat radiation characteristics. Otherwise, we will not
be liable for any defect which may arise later in your equipment.
Even when the products are used within the guaranteed values, take into the consideration of incidence of
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2003 SEP