DS90C031QML DS90C031QML LVDS Quad CMOS Differential Line Driver Literature Number: SNLS202A DS90C031QML LVDS Quad CMOS Differential Line Driver General Description Features The DS90C031 is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The DS90C031 accepts TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE® function that may be used to disable the output stage, thus dropping the device to a low idle power state of 11 mW typical. In addition, the DS90C031 provides power-off high impedance LVDS outputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present. The DS90C031 and companion line receiver (DS90C032) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications. ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Radiation guaranteed 100 krad(Si) High impedance LVDS outputs with power-off ±350 mV differential signaling Low power dissipation Low differential skew Low propagation delay Pin compatible with DS26C31 Compatible with IEEE 1596.3 SCI LVDS standard Compatible with proposed TIA LVDS standard Fail safe logic for floating inputs Ordering Information NS Part Number SMD Part Number NS Package Number Package Description DS90C031E-QML 5962–9583301Q2A E20A 20LD Leadless Chip Carrier DS90C031W-QMLV 5962–9583301VFA W16A 16LD Ceramic Flatpack DS90C031WRQMLV 5962R9583301VFA 100 krad(Si) W16A 16LD Ceramic Flatpack DS90C031WGRQMLV 5962R9583301VZA 100 krad(Si) WG16A 16LD Ceramic SOIC (Note 1) Bare Die DS90C031 MDR Note 1: FOR ADDITIONAL DIE INFORMATION, PLEASE VISIT THE HI REL WEB SITE AT: www.national.com/analog/space/level_die TRI-STATE® is a registered trademark of National Semiconductor Corporation. © 2010 National Semiconductor Corporation 201636 www.national.com DS90C031QML LVDS Quad CMOS Differential Line Driver October 12, 2010 DS90C031QML Connection Diagrams Dual-In-Line LCC Package 20163601 See NS Package Number W16A & WG16A 20163633 See NS Package Number E20A Functional Diagram 20163602 Truth Table Enables www.national.com Input Outputs EN EN* DI DO+ L H DO− X Z Z All other combinations L L H of ENABLE inputs H H L 2 DS90C031QML Absolute Maximum Ratings (Note 2) Supply Voltage (VCC) Input Voltage (DI) Enable Input Voltage (EN, EN*) Output Voltage (DO+, DO−) Storage Temperature Range −0.3V to +6V −0.3V to (VCC + 0.3V) −0.3V to (VCC + 0.3V) −0.3V to + 5.8V −65°C ≤ TA ≤ +150°C +260°C Lead Temperature Range Soldering (4 sec.) Maximum Package Power Dissipation @ +25°C (Note 5) 20 Pin LCC Package 16 Pin Flatpack 16 Pin Ceramic SOIC Thermal Resistance 1,900 mW 1,450 mW 1,450 mW θJA 20 Pin LCC Package 16 Pin Flatpack 16 Pin Ceramic SOIC 78 °C/W 145 °C/W 145 °C/W θJC 20 Pin LCC Package 16 Pin Flatpack 16 Pin Ceramic SOIC ESD Rating (Note 4) 18 °C/W 14 °C/W 14 °C/W 3.5KV Recommended Operating Conditions Min +4.5V −55°C Supply Voltage (VCC) Operating Free Air Temperature (TA) Typ +5.0V +25°C Max +5.5V +125°C Quality Conformance Inspection Mil-Std-883, Method 5005 - Group A Subgroup Description Temp °C 1 Static tests at +25 2 Static tests at +125 3 Static tests at -55 4 Dynamic tests at +25 5 Dynamic tests at +125 6 Dynamic tests at -55 7 Functional tests at +25 8A Functional tests at +125 8B Functional tests at -55 9 Switching tests at +25 10 Switching tests at +125 11 Switching tests at -55 12 Settling time at +25 13 Settling time at +125 14 Settling time at -55 3 www.national.com DS90C031QML DC Parameters Symbol (Note 10) Parameter Conditions Notes RL = 100Ω Min Max Units Subgroups 250 450 mV 1, 2, 3 35 mV 1, 2, 3 V 1, 2, 3 VOD1 Differential Ouput Voltage DVOD1 Change in Magnitude of Vod1 for RL = 100Ω complementary output States VOS Offset Voltage RL = 100Ω DVOS Change in Magnitude of Vos for Complementary Output States RL = 100Ω 25 mV 1, 2, 3 VOH Output Voltage High RL = 100Ω 1.6 V 1, 2, 3 VOL Output Voltage Low RL = 100Ω V 1, 2, 3 VIH Input Voltage High V 1, 2, 3 VIL Input Voltage Low 0.8 V 1, 2, 3 II Input Current VI = VCC, Gnd, 2.5, or 0.4V ±10 µA 1, 2, 3 VCl Input Clamp Voltage ICl = -18mA -1.5 V 1, 2, 3 IOS Output Short Circuit Current VO = 0V -5.0 mA 1, 2, 3 IOff Power-off Leakage VO = 0V or 2.4V, VCC-= 0V or Open ±10 µA 1, 2, 3 IOZ Output TRI-STATE Current EN = 0.8V and EN* = 2.0V VO = 0V or VCC ±10 µA 1, 2, 3 ICC Drivers Enabled Supply Current DI = Hi or Low 25 mA 1, 2, 3 ICCZ Drivers Disabled Supply Current DI = Hi or Low, En = Gnd, En* = VCC 10 mA 1, 2, 3 Min Max Units Subgroups 1.125 1.375 0.9 (Note 6) 2.0 (Note 6) Gnd VCC AC Parameters The following conditions apply, unless otherwise specified. AC: VCC = 4.5V / 5.0V / 5.5V, RL = 100Ω (between outputs), CL = 20pF (each output to Gnd) Symbol Parameter Conditions Notes tPHLD Differential Propagation Delay High to Low 0.5 5.0 ns 9, 10, 11 tPLHD Differential Propagation Delay Low to High 0.5 5.0 ns 9, 10, 11 tSkD Differential Skew |tPHLD-tPLHD| 3.0 ns 9, 10, 11 tSk1 Channel to Channel Skew (Note 7) 3.0 ns 9, 10, 11 tSk2 Chip to Chip Skew (Note 8) 4.5 ns 9, 10, 11 tPHZ Disable Time High to Z (Note 9) 20 ns 9, 10, 11 tPLZ Disable Time Low To Z (Note 9) 20 ns 9, 10, 11 tPZH Enable Time Z to High (Note 9) 20 ns 9, 10, 11 tPZL Enable Time Z to Low (Note 9) 20 ns 9, 10, 11 Max Units Subgroups AC/DC Parameters - Post Radiation Limits Symbol Parameter Conditions (Note 10) Notes Min ICC Drivers Enabled Supply Current DI - Hi or Low, En = Gnd, En* = VCC 30 mA 1 ICCZ Drivers Disabled Supply Current DI - Hi or Low, En = Gnd, En* = VCC 30 mA 1 www.national.com 4 Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/ θJA or the number given in the Absolute Maximum Ratings, whichever is lower. Note 4: Human body model, 1.5 kΩ in series with 100 pF. Note 5: Derate LCC @ 12.8mW/°C above +25°C. Derate Ceramic flatpack @ 6.9mW/°C above +25°C. Note 6: Tested during VOH / VOL tests. Note 7: Channel-to-Channel Skew is defined as the difference between the propagation delay of the channel and the other channels in the same chip with an event on the inputs. Note 8: Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays. Note 9: Parameter guaranteed, not tested 100% Note 10: Pre and Post irradiation limits are identical to those listed under AC & DC electrical characteristics except as listed in the “Post Radiation Limits” table. Radiation end point limits for the noted parameters are guaranteed only for the conditions, as specified. Parameter Measurement Information 20163603 FIGURE 1. Driver VOD and VOS Test Circuit 20163604 FIGURE 2. Driver Propagation Delay and Transition Time Test Circuit 5 www.national.com DS90C031QML Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. DS90C031QML 20163605 FIGURE 3. Driver Propagation Delay and Transition Time Waveforms 20163606 FIGURE 4. Driver TRI-STATE Delay Test Circuit 20163607 FIGURE 5. Driver TRI-STATE Delay Waveform www.national.com 6 DS90C031QML Typical Performance Characteristics Power Supply Current vs Power Supply Voltage Power Supply Current vs Temperature 20163610 20163611 Power Supply Current vs Power Supply Voltage Power Supply Current vs Temperature 20163612 20163613 7 www.national.com DS90C031QML Output TRI-STATE Current vs Power Supply Voltage Output Short Circuit Current vs Power Supply Voltage 20163614 20163615 Differential Output Voltage vs Power Supply Voltage Differential Output Voltage vs Ambient Temperature 20163616 20163617 Output Voltage High vs Power Supply Voltage Output Voltage High vs Ambient Temperature 20163618 www.national.com 20163619 8 DS90C031QML Output Voltage Low vs Power Supply Voltage Output Voltage Low vs Ambient Temperature 20163620 20163621 Offset Voltage vs Power Supply Voltage Offset Voltage vs Ambient Temperature 20163622 20163623 Power Supply Current vs Frequency Power Supply Current vs Frequency 20163624 20163625 9 www.national.com DS90C031QML Differential Output Voltage vs Load Resistor Differential Propagation Delay vs Power Supply Voltage 20163626 20163627 Differential Propagation Delay vs Ambient Temperature Differential Skew vs Power Supply Voltage 20163629 20163628 www.national.com 10 DS90C031QML Differential Skew vs Ambient Temperature Differential Transition Time vs Power Supply Voltage 20163630 20163631 Differential Transition Time vs Ambient Temperature 20163632 Typical Application 20163608 FIGURE 6. Point-to-Point Application 11 www.national.com DS90C031QML The 3.4 mA loop current will develop a differential voltage of 340 mV across the 100Ω termination resistor which the receiver detects with a 240 mV minimum differential noise margin neglecting resistive line losses (driven signal minus receiver threshold (340 mV – 100 mV = 240 mV)). The signal is centered around +1.2V (Driver Offset, VOS) with respect to ground as shown inFigure 7. Note that the steady-state voltage (VSS) peak-to-peak swing is twice the differential voltage (VOD) and is typically 680 mV. The current mode driver provides substantial benefits over voltage mode drivers, such as an RS-422 driver. Its quiescent current remains relatively flat versus switching frequency. Whereas the RS-422 voltage mode driver increases exponentially in most case between 20 MHz–50 MHz. This is due to the overlap current that flows between the rails of the device when the internal gates switch. Whereas the current mode driver switches a fixed current between its output without any substantial overlap current. This is similar to some ECL and PECL devices, but without the heavy static I CC requirements of the ECL/PECL designs. LVDS requires > 80% less current than similar PECL devices. AC specifications for the driver are a tenfold improvement over other existing RS-422 drivers. The TRI-STATE function allows the driver outputs to be disabled, thus obtaining an even lower power state when the transmission of data is not required. The LVDS outputs are high impedance under power-off condition. This allows for multiple or redundant drivers to be used in certain applications. The footprint of the DS90C031 is the same as the industry standard 26LS31 Quad Differential (RS-422) Driver. Applications Information LVDS drivers and receivers are intended to be primarily used in an uncomplicated point-to-point configuration as is shown in Figure 6. This configuration provides a clean signaling environment for the quick edge rates of the drivers. The receiver is connected to the driver through a balanced media which may be a standard twisted pair cable, a parallel pair cable, or simply PCB traces. Typically, the characteristic impedance of the media is in the range of 100Ω. A termination resistor of 100Ω should be selected to match the media, and is located as close to the receiver input pins as possible. The termination resistor converts the current sourced by the driver into a voltage that is detected by the receiver. Other configurations are possible such as a multi-receiver configuration, but the effects of a mid-stream connector(s), cable stub(s), and other impedance discontinuities as well as ground shifting, noise margin limits, and total termination loading must be taken into account. The DS90C031differential line driver is a balanced current source design. A current mode driver, generally speaking has a high output impedance and supplies a constant current for a range of loads (a voltage mode driver on the other hand supplies a constant voltage for a range of loads). Current is switched through the load in one direction to produce a logic state and in the other direction to produce the other logic state. The typical output current is mere 3.4 mA, a minimum of 2.5 mA, and a maximum of 4.5 mA. The current mode requires (as discussed above) that a resistive termination be employed to terminate the signal and to complete the loop as shown in Figure 6. AC or unterminated configurations are not allowed. 20163609 FIGURE 7. Driver Output Levels Pin Descriptions Pin No. (SOIC) Name 1, 7, 9, 15 DI 2, 6, 10, 14 DO+ Non-inverting driver output pin, LVDS levels 3, 5, 11, 13 DO− Inverting driver output pin, LVDS levels 4 EN Active high enable pin, OR-ed with EN* 12 EN* Active low enable pin, OR-ed with EN 16 VCC Power supply pin, +5V ± 10% 8 Gnd Ground pin www.national.com Description Driver input pin, TTL/CMOS compatible 12 Single Event Latch-Up Careful consideration should be given to environmental conditions when using a product in a radiation environment. One time single event latch-up (SEL) testing was preformed showing SEL immunity to 103 MeV-cm2/mg. A test report is available upon request. Total Ionizing Dose Single Event Upset Radiation hardness assured (RHA) products are those part numbers with a total ionizing dose (TID) level specified in the Ordering Information table on the front page. Testing and qualification of these products is done on a wafer level according to MIL-STD-883G, Test Method 1019.7, Condition A and the “Extended room temperature anneal test” described in section 3.11 for application environment dose rates less than 0.16 rad(Si)/s. Wafer level TID data is available with lot shipments. Single event upset (SEU) data are available upon request. 13 www.national.com DS90C031QML Radiation Environments DS90C031QML Revision History Released Revision 03/01/06 A New Release, Corporate format 10/12/2010 B Features, Ordering Table, Absolute Added reference to Radiation and Fail safe. Maximum Ratings, Applications Information Removed reference to EOL NSID, Output Voltage changed limit from −0.3V to (VCC + 0.3V) to −0.3V to +5.8V, Added paragraph to Applications Information section and New Radiation Environment section. Revision A will be Archived. www.national.com Section Changes 14 1 MDS data sheet converted into Corp. data sheet format. MNDS90C031-X-RH Rev 2A1 will be archived. DS90C031QML Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Ceramic Leadless Chip Carrier NS Package Number E20A 16-Lead Ceramic Flatpack See NS Package Number W16A 15 www.national.com DS90C031QML 16-Lead Ceramic SOIC See NS Package Number WG16A www.national.com 16 DS90C031QML Notes 17 www.national.com DS90C031QML LVDS Quad CMOS Differential Line Driver Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Design Support Amplifiers www.national.com/amplifiers WEBENCH® Tools www.national.com/webench Audio www.national.com/audio App Notes www.national.com/appnotes Clock and Timing www.national.com/timing Reference Designs www.national.com/refdesigns Data Converters www.national.com/adc Samples www.national.com/samples Interface www.national.com/interface Eval Boards www.national.com/evalboards LVDS www.national.com/lvds Packaging www.national.com/packaging Power Management www.national.com/power Green Compliance www.national.com/quality/green Switching Regulators www.national.com/switchers Distributors www.national.com/contacts LDOs www.national.com/ldo Quality and Reliability www.national.com/quality LED Lighting www.national.com/led Feedback/Support www.national.com/feedback Voltage References www.national.com/vref Design Made Easy www.national.com/easy www.national.com/powerwise Applications & Markets www.national.com/solutions Mil/Aero www.national.com/milaero PowerWise® Solutions Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors SolarMagic™ www.national.com/solarmagic PLL/VCO www.national.com/wireless www.national.com/training PowerWise® Design University THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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