LT3571 75V DC/DC Converter for APD Bias FEATURES DESCRIPTION n The LT®3571 is a current mode step-up DC/DC converter designed to bias avalanche photodiodes (APDs) in optical receivers with an output voltage up to 75V. The LT3571 features a high side fixed voltage drop APD current monitor with better than 10% relative accuracy over the entire temperature range. The integrated power switch, Schottky diode and APD current monitor allow a small solution footprint and low solution cost. It combines a traditional voltage loop and a unique current loop to operate as a constant-current source or constant-voltage source. The inductor-based topology ensures an input free from switching noise. The integrated high side current monitor produces a current proportional to the APD current with better than 10% relative accuracy over four decades of dynamic range in the input range of 250nA to 2.5mA. This current can be used as a reference to provide a digitally programmed output voltage via the CTRL pin. The LT3571 is available in the tiny footprint (3mm × 3mm) 16-lead QFN package. n n n n n n n n n n n n n n High APD Voltage: Up to 70V Integrated Schottky Diode 75V, 370mA Internal Switch High Side Fixed Voltage Drop APD Current Monitor Adjustable Frequency: 250kHz to 2MHz Frequency Synchronization Wide VIN Range: 2.7V to 20V Constant-Voltage and Constant-Current Regulation Programmable Current Limit Protection Surface Mount Components Low Shutdown Current <1μA Internal Soft-Start Internal Compensation CTRL Pin Allows Output Adjustment with No Polarity Inversion 3mm × 3mm 16-Lead QFN Package APPLICATIONS n n n n APD Bias PIN Diode Bias Optical Receivers and Modules Fiber Optic Network Equipment L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 45V Low Noise APD Bias Power Supply APD Bias Ripple 10μH VIN 5V OFF ON VIN SHDN SW VOUT 20Ω VREF 1μF CTRL LT3571 MONIN 50V 500μV/DIV 10nF RT SYNC 1M FB GND MON APD 12.1k 1MHz 20.5k 49.9Ω 45V 10nF 10k IAPD = 1mA 500ns/DIV 3571 TA01b 0.1μF 0.1μF 3571 TA01a 3571fa 1 LT3571 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) VREF CTRL FB MON TOP VIEW 16 15 14 13 12 SHDN NC 1 APD 2 11 VIN 17 MONIN 3 10 GND VOUT 4 6 7 8 SW GND SYNC 9 5 SW Input Voltage (VIN), SHDN ........................................20V VOUT, MONIN, APD....................................................75V MON..........................................................................12V SW ............................................................................75V CTRL, FB, SYNC ..........................................................5V RT, VREF ...................................................................1.5V Operating Ambient Temperature Range (Note 2) .............................................–40°C to 125°C Operating Junction Temperature (Note 2) .............................................–40°C to 125°C Storage Temperature Range...................–65°C to 150°C RT UD PACKAGE 16-LEAD (3mm s 3mm) PLASTIC QFN TJMAX = 125°C, θJA = 68°C/W, θJC = 4.2°C/W (NOTE 2) EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3571EUD#PBF LT3571EUD#TRPBF LDTN 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C LT3571IUD#PBF LT3571IUD#TRPBF LDTN 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = 3V, VSHDN = 3V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Operating Voltage 2.7 V Maximum Operating Voltage 20 V 1.7 0.1 2.2 0.5 mA μA 1 1.015 1.03 V V 0.03 0.07 %/V 200 215 mV 60 100 nA 1.222 1.240 V 0.03 0.07 %V Supply Current VFB = 1.3V, Not Switching VSHDN = 0V Feedback Voltage VCTRL = 1.25V, VOUT = VMONIN Feedback Line Regulation 2.7V < VIN < 20V l Current Sense Voltage (VOUT – VMONIN) VOUT = 30V l FB Pin Bias Current VFB = 0V l VREF Pin Voltage IREF = –100μA l VREF Pin Line Regulation 2.7V < VIN < 20V 0.985 0.97 185 1.200 RT Voltage SYNC Resistance to GND 1 VSYNC = 2V 45 SYNC Input Low SYNC Input High V kΩ 0.4 1.5 V V 3571fa 2 LT3571 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = 3V, VSHDN = 3V, unless otherwise noted. PARAMETER CONDITIONS Switching Frequency RT = 12.1k RT = 4.22k RT = 56.2k Maximum Duty Cycle RT = 56.2k (250kHz) SYNC = 300kHz Clock Signal, RT = 56.2k RT = 12.1k (1MHz) RT = 4.22k (2MHz) l l Switch Current Limit Switch VCESAT ISW = 200mA Switch Leakage Current VSW = 75V Schottky Forward Voltage ISCHOTTKY = 200mA Schottky Reverse Leakage VOUT – VSW = 75V MIN TYP MAX UNITS 0.85 1.7 210 1 2 250 1.15 2.3 280 MHz MHz kHz 95 92 85 75 97 96 90 80 370 470 570 240 850 1.5 VCTRL = 0.5V CTRL Input Bias Current Current Out of Pin, VCTRL = 0.5V l –5 –10 250nA ≤ IAPD < 10μA, 10V < VMONIN < 75V 10μA ≤ IAPD ≤ 2.5mA, 20V < VMONIN < 75V l l 0.185 0.194 APD Monitor Voltage Drop VMONIN – VAPD, IAPD = 1mA l 4.8 MONIN Pin Current Limit VMONIN = 40V, VAPD = 0V Monitor Output Voltage Clamp 0.4 V 50 65 μA 5 5 15 20 mV mV 20 100 nA 0.20 0.20 0.215 0.206 11.5 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. μA V SHDN Voltage Low CTRL to FB Offset μA mV 5 SHDN Pin Bias Current mA mV 2 SHDN Voltage High APD Current Monitor Gain % % % % 5 30 V 5.2 V mA Note 2: The LT3571E is guaranteed to meet specified performance from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT3571I is guaranteed to meet performance specifications over the –40°C to 125°C operating junction temperature range. 3571fa 3 LT3571 TYPICAL PERFORMANCE CHARACTERISTICS Switch Current Limit vs Temperature Switch Saturation Voltage (VCESAT) 500 500 450 450 400 400 350 400 350 0 20 60 40 DUTY CYCLE (%) 250 –50 100 80 –25 50 25 0 75 TEMPERATURE (°C) 100 0 125 0 50 100 150 200 250 300 350 400 ISW (mA) 3571 G03 3571 G02 Schottky Forward Drop Oscillator Frequency vs Temperature Oscillator Frequency vs RT 10000 950 1100 850 800 750 700 OSCILLATOR FREQUENCY (kHz) RT = 12.1k 900 OSCILLATOR FREQUENCY (kHz) SCHOTTKY FORWARD DROP (mV) 200 100 3571 G01 1000 1050 1000 950 650 600 100 0 0 50 100 150 200 250 300 350 400 SCHOTTKY FORWARD CURRENT (mA) 10 20 30 RT (kΩ) 40 FB Pin Voltage vs Temperature VREF Voltage vs Temperature VOUT – VMONIN THRESHOLD (mV) VREF (mV) 1.225 1.220 1.215 50 25 0 75 TEMPERATURE (°C) 100 125 3571 G07 1.210 –50 125 VOUT – VMONIN Threshold vs VOUT 1.230 –25 100 205 1.01 0.99 50 25 0 75 TEMPERATURE (°C) 3571 G06 1.235 1.00 –25 3571 G05 1.02 0.98 –50 900 –50 60 50 3571 G04 FB PIN THRESHOLD (V) 300 300 300 250 VCESAT (mV) 500 CURRENT LIMIT (mA) CURRENT LIMIT (mA) Switch Current Limit vs Duty Cycle TA = 25°C, unless otherwise specified. –25 50 25 0 75 TEMPERATURE (°C) 100 125 3571 G08 203 201 199 197 195 10 20 30 40 50 VOUT (V) 60 70 80 3571 G09 3571fa 4 LT3571 TYPICAL PERFORMANCE CHARACTERISTICS VOUT – VMONIN Threshold vs Temperature Current Monitor Output vs VMONIN 22 VMONIN = 50V IAPD = 100μA 204 VMONIN = 75V 2 21 202 1 ERROR (%) 200 20 0 –1 198 –2 19 196 –3 194 –50 –25 –4 18 50 25 0 75 TEMPERATURE (°C) 100 125 10 20 30 40 50 VMONIN (V) 60 70 Current Monitor Accuracy vs Temperature 2 10000 10 100 1000 INPUT CURRENT (μA) VMONIN – VAPD vs Temperature 5.1 VMONIN = 75V 2.5mA 250nA 1 3571 G12 VMONIN - VAPD vs APD Current 5.10 VMONIN = 75V 1 0.1 80 3571 G11 3571 G10 5.05 VMONIN = 75V IAPD = 1mA 5.05 0 10μA –1 VMONIN-VAPD (V) 5.00 VMONIN-VAPD (V) ERROR (%) Current Monitor Accuracy 4 3 IMON (μA) VOUT – VMONIN THRESHOLD (mV) 206 TA = 25°C, unless otherwise specified. 4.95 –2 –3 4.90 5 4.95 –4 4.85 –5 –6 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 4.80 0.1 4.9 –50 –25 1000 10 APD CURRENT (μA) 3571 G13 0 25 50 75 TEMPERATURE (°C) 3571 G14 125 3571 G15 Current Monitor Transient Response (Rising Edge) FB vs CTRL 100 Current Monitor Transient Response (Falling Edge) 1.2 IAPD = 1mA IAPD = 10μA 1 IAPD = 10μA INPUT IAPD = 1mA INPUT FB (V) 0.8 RESPONSE 0.6 RESPONSE 0.4 TFD < 100ns TRD < 100ns 0.2 50ns/DIV 3571 G17 50ns/DIV 3571 G18 0 0 0.2 0.4 0.6 0.8 CTRL (V) 1 1.2 3571 G16 3571fa 5 LT3571 PIN FUNCTIONS NC (Pin 1): No Connect. APD (Pin 2): APD Cathode Pin. Connect APD cathode to this pin. MONIN (Pin 3): Current Monitor Power Supply Pin. An external lowpass filter can be included here to further reduce supply voltage ripple. This pin also serves as the inverting input of the current sense amplifier. Put a sense resistor between the MONIN pin and the VOUT pin to set the boost converter output current limit as 200mV/RSENSE . Connect the MONIN pin directly to the VOUT pin if the output current limit function is not used. VOUT (Pin 4): Boost Output Pin. Put a capacitor between this pin and GND plane. Minimize the length of the trace to the capacitor. Also serves as the noninverting input of the current sense amplifier. RT (Pin 9): Switching Frequency Pin. Set switching frequency using a resistor to GND (see Typical Performance Characteristics for values). For SYNC function, choose the resistor to program a frequency 20% slower than the SYNC pulse frequency. Do not leave this pin open. VIN (Pin 11): Input Supply Pin. This pin must be locally bypassed. SHDN (Pin 12): Shutdown Pin. Tie to 1.5V or higher to enable device; 0.4V or less to disable device. Also functions as soft-start. Use RC filter as shown in Figure 1. VREF (Pin 13): Reference Output Pin. This pin can supply up to 100μA. Do not over drive this pin. Bypass with a 10nF or larger capacitor. SW (Pin 5, 6): Switch Pin. Minimize the trace length on this pin to reduce EMI. CTRL (Pin 14): Internal Reference Override Pin. The CTRL pin allows the FB voltage to be externally adjusted between 0V and 1V to adjust the output voltage. Tie this pin higher than 1.2V to use the internal reference of 1V. GND (Pin 7, 10): Ground. Pins connected internally. For best performance, connect both pins to board ground. FB (Pin 15): Feedback Pin. Connect to output resistor divider tap. SYNC (Pin 8): Frequency Synchronization Pin. Connect an external clock signal here. RT resistor should be chosen to program a switching frequency 20% slower than the SYNC pulse frequency. Synchronization (switch turn-on) occurs a fixed delay after the rising edge of SYNC. Tie the SYNC pin to ground if this feature is not used. MON (Pin 16): Current Monitor Output Pin. Sources a current equal to 20% of the APD current and converts to a reference voltage through an external resistor. Exposed Pad (Pin 17): Ground. The Exposed Pad must be soldered to the PCB. 3571fa 6 LT3571 BLOCK DIAGRAM RSENSE L1 VIN CPL C1 R1 CIN FB R2 3 – APD A1 R4 1V 14 15 EAMP CTRL FB + + – D1 1V MAIN SWITCH DRIVER – A3 C3 FB + MON + C2 16 x5 + 2 5, 6 SW – APD CURRENT MIRROR R3 4 MONIN VOUT + RC CC A2 R A4 S Q1 MAIN SWITCH Q + + PWM COMPARATOR SOFT-START EXTERNAL CONTROL BLOCK A5 – RAMP GENERATOR 8 SYNC 7, 10 GND 2MHz TO 250kHz OSCILLATOR 1V + A6 – VREF 1.22V REFERENCE Q2 13 FREQ ADJUST 9 RT VIN SHDN 11 12 RS 3571 F01 OFF ON R5 CS RS, CS OPTIONAL SOFT-START COMPONENTS Figure 1. Block Diagram 3571fa 7 LT3571 OPERATION The LT3571 boost converter uses a constant-frequency current mode control scheme to provide excellent line and load regulation. Operation can be best understood by referring to the Block Diagram in Figure 1. At the start of each oscillator cycle, the SR latch is set, which turns on the Q1 power switch. A voltage proportional to the switch current is added to a stabilizing ramp and the resulting sum is fed into the positive terminal of the PWM comparator, A4. When this voltage exceeds the level at the negative input of A4, the SR latch is reset, turning off the power switch. The level at the negative input of A4 is set by the error amplifier A3. A3 has two inputs, one from the voltage feedback loop and the other one from the current loop. Whichever feedback input is lower takes precedence and forces the converter into either constant-current or constant-voltage mode. The LT3571 is designed to transition cleanly between these two modes of operation. The current sense amplifier senses the voltage across RSENSE and provides a pre-gain to amplifier A1. The output of A1 is simply an amplified version of the difference between the voltage across RSENSE and 200mV. In this manner, the error amplifier sets the correct peak switch current level to regulate through RSENSE. The FB voltage loop is implemented by the amplifier A2. When the voltage loop dominates, the error amplifier regulates the FB pin to the lower of 1V, or externally provided CTRL voltage (constant-voltage mode), and sets the correct peak current level to keep the output in regulation. The LT3571 has an integrated high side APD current monitor with a 5:1 ratio. The voltage drop across the MONIN pin and APD pin is fixed at 5V. The MONIN pin can accept a supply voltage up to 75V, which is suitable for APD photodiode applications. The MON pin has an open-circuit protection feature and is internally clamped to 11.5V. If an APD is tied to the APD pin, the current will be mirrored to the MON pin and converted to a voltage signal by the resistor R4. This voltage signal can be used to drive an external control block to adjust the APD voltage by adjusting the feedback threshold of EAMP A2 through the CTRL input. 3571fa 8 LT3571 APPLICATIONS INFORMATION Switching Frequency There are two methods to set the switching frequency of the LT3571. Both methods require a resistor connected at the RT pin. Do not leave the RT pin open. Also, do not load this pin with a capacitor. A resistor must always be connected for proper operation. One way to set the frequency is simply connecting an external resistor between the RT pin and GND. See Table 1 or the Oscillator Frequency vs RT graph in the Typical Performance Characteristics for resistor values and corresponding switching frequencies. The other way is to make the LT3571 synchronize with an external clock via the SYNC pin. For proper operation, a resistor should be connected at the RT pin and able to generate a switching frequency 20% lower than the external clock when the external clock is absent. Table 1. Switching Frequency vs RT Switching Frequency (kHz) RT (k) 250 56.2 500 26.1 1000 12.1 1500 6.81 2000 4.22 2500 2.67 Inrush Current The LT3571 has a built-in Schottky diode for the boost converter. When supply voltage is applied to the VIN pin, the voltage difference between VIN and VOUT generates inrush current flowing from input through the inductor and the Schottky diode (D1 in the Block Diagram), to charge the output capacitor. The selection of inductor and capacitor value should ensure the peak of the inrush current to below 1A. In addition, the LT3571 turn-on should be delayed until the inrush current is less than the maximum current limit. The peak inrush current can be estimated as follows: ⎛ ⎞ ⎜ π ⎟ V – 0.9 • exp ⎜ – IP = IN ⎟ L ⎟ L ⎜ 2 –1 –1 ⎝ C ⎠ C Table 2 gives inrush peak currents for some component selections. Table 2. Inrush Peak Current VIN (V) L (μH) C (μF) IP (A) 5 10 1 0.81 5 22 1 0.63 Setting Output Voltage The LT3571 is equipped with both an internal 1V reference and an auxiliary reference input (the CTRL pin). This feature allows users to select between using the built-in reference and supplying an external reference voltage. The voltage at the CTRL pin can be adjusted while the chip is operating, to alter the output voltage of LT3571 for purposes such as APD’s bias voltage adjustment. To use the internal 1V reference, the CTRL pin should be held higher than 1.2V, which can be done by tying it to VREF . When the CTRL pin is between 0V and 1V, the LT3571 will regulate the output such that the FB pin voltage is equal to the CTRL pin voltage. To set the output voltage, select the values of R1 and R2 (see Figure 2) according to the following equation: ⎞ ⎛V R1 = R2 ⎜ MONIN – 1⎟ ⎠ ⎝ V1 where V1 = 1V if the internal reference is used, or V1 = CTRL if CTRL is between 0V and 1V. R2 can be selected to load the output to maintain a constant switching frequency when the APD load is very low. Preventing entry into pulse-skipping mode is an important consideration for post filtering the regulator output. MONIN 14 R1 LT3571 CTRL 3 FB 15 R2 3571 F02 Figure 2. Output Voltage Feedback Connection where L is the inductance, and C is the output capacitance. 3571fa 9 LT3571 APPLICATIONS INFORMATION Inductor Selection The inductors used with the LT3571 should have a saturation current rating of 0.4A, or greater. If the device is used in an application where the input supply will be hot-plugged, the saturation current rating should be equal to, or greater than, the peak inrush current. For best loop stability, the inductor value selected should provide a ripple current of 80mA or more. For a given VIN and VOUT, the inductor value to use in continuous conduction mode (CCM) is estimated by the formula: L= D • VIN ƒ • 80mA where: D= VOUT + 1– VIN VOUT + 1 and f is the switching frequency. To achieve low output voltage ripple, a small value inductor should be selected to force the LT3571 to operate in discontinuous conduction mode (DCM). The inequality is true when the LT3571 is operating in discontinuous conduction mode. L< D • VIN ƒ • ILIMIT where ILIMIT is the switch current limit. Operating in DCM reduces the maximum load current and the conversion efficiency. Capacitor Selection Low ESR capacitors should be used at the output to minimize the output voltage ripple. Use only X5R and X7R types, because they retain their capacitance over wider voltage and temperature ranges than other types. High output voltages typically require less capacitance for loop stability. Typically, use a 1μF capacitor for output voltage less than 25V, and a 0.22μF capacitor for output voltage beyond 25V. Place the output capacitor as close as possible to the VOUT lead and to the GND of the IC. Either ceramic or solid tantalum capacitors may be used for the input decoupling capacitor, which should be placed as close as possible to the LT3571. A 1μF capacitor is sufficient for most applications. Phase Lead Capacitor A small value capacitor (i.e., 10pF to 22pF) can be added in parallel with the resistor between the output and the FB pin to reduce output perturbation due to a load step and to improve transient response. This phase lead capacitor introduces a pole-zero pair to the feedback that boosts the phase margin near the crossover frequency. The APD is very sensitive to a noisy bias supply. To lowpass filter noise from the internal reference and error amplifier, a 0.1μF phase lead capacitor can be used. The corner frequency of the noise filter is R1 • CPL. APD Current Monitor The power supply switching noise associated with a switching power supply can interfere with the photodiode DC measurement. To suppress this noise, a 0.1μF capacitor is recommended at the APD pin. An additional series resistor is necessary to ensure enough high frequency compensation at the APD pin over the full operating range of the LT3571, as shown in Figure 1. An additional output lowpass filter, a 10k resistor and a 10nF capacitor in parallel at MON pin can further reduce the power supply noise, and other wide band noise, which might limit the measurement accuracy of low current levels. For applications requiring fast current monitor response time, an RC lowpass filter at the MONIN pin is used to replace the 0.1μF capacitor at the APD pin, as illustrated in Figure 3. VOUT LT3571 RSENSE C1 MONIN CFILT APD 3571 F03 Figure 3. RC Filter at MONIN Pin 3571fa 10 LT3571 APPLICATIONS INFORMATION APD Current Monitor Transient Response Measurement APD Bias Voltage Temperature Compensation The transient response of the APD current monitor is a key performance characteristic. It is essentially a function of the input step-signal levels, since the small signal bandwidth increases with the input signal. At greater than 10μA, the LT3571 APD current mirror typically has several hundred nanoseconds response time. To measure such fast transient response, any capacitor at the APD and the MON pin should be removed. Figure 4 shows a suggested transient response test setup. Choose VL and VH, corresponding to the input step current levels, respectively. At the MON pin, a wideband transimpedence amplifier is implemented using the LT1815. Operating in a shunt configuration, the amplifier buffers the MON output current and dramatically reduces the effective output impedence at the OUT node. Note that there is an inversion and a DC offset present when this measurement technique is used. A regular oscilloscope probe can then be used to capture the fast transient response at the OUT node. Typically, the APD reverse bias voltage has a positive temperature coefficient. The APD pin voltage can be adjusted with temperature via the CTRL pin. One simple solution is to form a resistor divider from the VREF pin to the CTRL pin, as shown in Figure 5. By carefully choosing the resistor values, a temperature coefficient can be applied to the APD reverse bias voltage. A more complicated and precise way to set the APD temperature coefficient involves a transistor network as shown in the “5V to 50V APD Bias Power Supply with Temperature Compensation”. Please consult with factory for this type applications. VREF LT3571 R1 NTC CTRL R2 3571 F05 Figure 5. Setting Temperature Compensation MONIN LT3571 MON APD 3571 F04 0.5pF PMBT3904 4.99k 1k – 2.5V LT1815 4.99k + 0.1μF OUT PWM –VLO –VHI MEASURE HERE Figure 4. Transient Response Measurement Set-Up 3571fa 11 LT3571 APPLICATIONS INFORMATION Setting APD Current Limit The LT3571 has a unique current loop to limit the APD current. Choose the sense resistor RSENSE across VOUT and MONIN pins to set the APD current limit by using the following formula: RSENSE = 200mV 1.2 × IAPD (mA) + 0.3mA close together as possible. Minimize the length and area of all traces connected to the switch pin, and always use a ground plane under the switching regulator to minimize interplane coupling. The high speed switching current path is shown in Figure 6. The signal path, including the switch, output diode and output capacitor contains nanosecond rise and fall times and should be kept as short as possible. L1 SWITCH NODE VOUT where IAPD is the APD current limit. Layout Hints HIGH FREQUENCY CIRCULATING PATH VIN The high speed operation of the LT3571 demands careful attention to board layout. Advertised performance will not be achieved with a careless layout. To prevent radiation and high frequency resonance problems, proper layout of the high frequency switching path is essential. Keep the output switch (SW pin), diode and output capacitor as LOAD 3571 F06 Figure 6. High Frequency Path TYPICAL APPLICATIONS 5V to 45V APD Bias Power Supply Input Power vs APD Current 500 L1 10μH VIN 5V 450 400 SW VOUT RSENSE 20Ω VREF C1 1μF CTRL INPUT POWER (mW) OFF ON VIN SHDN LT3571 MONIN 50V C3 10nF RT SYNC R1 1M GND MON C5 10nF R3 10k 250 200 150 50 R2 20.5k APD R4 49.9Ω 300 100 FB RT 12.1k 1MHz 350 C2 0.1μF 45V C4 0.1μF 0 0 0.5 1.5 2 1 APD CURRENT (mA) 2.5 3 3571 TA02b 3571 TA02a L: TDK VLF3010AT – 100MR49 C1: TDK X7R C1608X7R1C105KT C2, C4: MURATA X7R GRM188R72A104KA35 C3: AVX X7R 06031C103K C5: MURATA X7R GRM155R71H103K 3571fa 12 LT3571 TYPICAL APPLICATIONS 5V to 69V APD Bias Supply with Soft-Start L1 22μH VIN 5V R5 20k C1 1μF VIN SHDN C5 47nF SW VOUT RSENSE 20Ω VREF CTRL LT3571 MONIN 74V C3 10nF EXTERNAL CONTROL BLOCK FB MON GND SYNC RT C5 10nF R3 10k R1 1M R2 13.7k APD RT 33.2k 400kHz R4 49.9Ω C2 0.22μF 69V, 2mA C4 0.1μF 3571 TA03a L: TDK VLF4012AT-220MR51 C1: TDK X7R C1608X7R1C105KT C2: MURATA X7R GRM21AR72A224KAC5L C3: AVX X7R 06031C103K C4: MURATA X7R GRM188R72A104KA35 C5: MURATA X7R GRM155R7H103K C6: MURATA X7R GCM155R471C473K APD Bias Ripple Input Power vs APD Current 500 450 INPUT POWER (mW) 400 2mV/DIV 350 300 250 200 150 100 IAPD = 1mA 2μs/DIV 3571 TA03b 50 0 0 0.5 1.5 1 ADP CURRENT (mA) 2 3571 TA03c 3571fa 13 LT3571 TYPICAL APPLICATIONS 5V to 50V APD Bias Power Supply with Temperature Compensation L1 15μH VIN 5V R5 30.1k Q2 R7 49.9k OFF ON Q1 R6 100k R8 36.5k R9 20k SHDN VREF SW VIN VOUT RSENSE 50Ω LT3571 MONIN CTRL RT SYNC C6 0.1μF C3 10nF R4 49.9Ω C5 10nF L1: TDK VLF4012AT – 150MR63 C1: TDK X7R C1608X7R1C105KT C2: MURATA X7R GRM21AR72A224KAC5L C3: AVX X7R 06031C103K C4: MURATA X7R GRM188R72A104KA35 C5: MURATA X7R GRM155R71H103K C6: MURATA X7R GRM155R71A104KA01D R2 15k APD RT 33.2k 400kHz C1 1μF R1 1M FB GND MON TEMPERATURE COMPENSATION BLOCK 55V C2 0.22μF 50V R3 10k C4 0.1μF 3571 TA04a Q1, Q2 = PHILIPS PEMT1 Input Power vs APD Current Temperature Response 350 60 58 300 54 VAPD (V) INPUT POWER (mW) 56 250 200 150 52 50 48 46 100 44 50 0 42 0 1 1.5 0.5 APD CURRENT (mA) 2 3571 TA04b 0 –50 –25 25 75 0 50 TEMPERATURE (°C) 100 125 3571 TA04c 3571fa 14 LT3571 PACKAGE DESCRIPTION UD Package 16-Lead Plastic QFN (3mm × 3mm) (Reference LTC DWG # 05-08-1691) 0.70 p0.05 3.50 p 0.05 1.45 p 0.05 2.10 p 0.05 (4 SIDES) PACKAGE OUTLINE 0.25 p0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 3.00 p 0.10 (4 SIDES) BOTTOM VIEW—EXPOSED PAD PIN 1 NOTCH R = 0.20 TYP OR 0.25 s 45o CHAMFER R = 0.115 TYP 0.75 p 0.05 15 16 PIN 1 TOP MARK (NOTE 6) 0.40 p 0.10 1 1.45 p 0.10 (4-SIDES) 2 (UD16) QFN 0904 0.200 REF 0.00 – 0.05 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.25 p 0.05 0.50 BSC 3571fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LT3571 TYPICAL APPLICATIONS 3.3V to 50V APD Bias Power Supply Input Power vs APD Current 450 L1 10μH OFF ON VIN SHDN 400 350 SW VOUT RSENSE 20Ω VREF C1 1μF INPUT POWER (mW) VIN 3.3V LT3571 CTRL MONIN 55V R1 1M RT SYNC C2 0.1μF FB MON GND RT 26.1k 500kHz 300 250 200 150 100 50 R2 18.2k APD R3 10k 50V 0 C3 0.1μF 3571 TA05a 0 1 1.5 0.5 APD CURRENT (mA) 2 3571 TA05b L1: TDK VLF3010AT-100MR49 C1: MURATA X7R GRM21BR71C105KA01B C2, C3: MURATA X7R GRM188R72A104KA35 Transient Response on Input Signal Falling Edge (1mA to 10μA) PWM GND PWM 1V/DIV Transient Response on Input Signal Falling Edge (10μA to 1mA) PWM GND IAPD = 10μA PWM 1V/DIV IAPD = 1mA IAPD = 1mA IAPD = 10μA OUT 500mV/DIV OUT 500mV/DIV TFD < 100ns TRD < 100ns OUT GND OUT GND 50ns/DIV 3571 TA05c 50ns/DIV 3571 TA05d FOR TRANSIENT RESPONSE, PLEASE REFER TO FIGURE 4 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1930/LT1930A 1A(ISW), 1.2MHz/2.2MHz High Efficiency Step-Up DC/DC Converters VIN: 2.6V to 16V, VOUT(MAX) = 34V, IQ = 4.2mA/5.5mA, ISD <1μA, ThinSOT™ Package LT3460/LT3460-1 0.3A (ISW), 1.3MHz, 650kHz High Efficiency Step-Up DC/DC Converters VIN: 2.5V to 16V, VOUT(MAX) = 38V, IQ = 2mA, ISD <1μA, SC70 and ThinSOT Packages LT3461/LT3461A 0.3A (ISW), 1.3MHz/3MHz High Efficiency Step-Up DC/DC Converters with Integrated Schottky VIN: 2.5V to 16V, VOUT(MAX) = 38V, IQ = 2.8mA, ISD <1μA, ThinSOT Package LT3482 0.3A (ISW), 650k/1.1MHz Step-Up DC/DC Converter with APD Current Monitor VIN: 2.5V to 16V, VOUT1(MAX) = 48V, VOUT2(MAX) = 90V, IQ = 3.3mA, ISD <1μA, 3mm × 3mm QFN Package ThinSOT is a trademark of Linear Technology Corporation. 3571fa 16 Linear Technology Corporation LT 0809 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2009