NVD6824NL Power MOSFET 100 V, 20 mW, 41 A, Single N−Channel Features Low RDS(on) to Minimize Conduction Losses High Current Capability Avalanche Energy Specified AEC−Q101 Qualified These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Drain−to−Source Voltage Gate−to−Source Voltage Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Continuous Drain Current RqJA (Notes 1 & 2) Power Dissipation RqJA (Notes 1 & 2) Pulsed Drain Current TC = 25°C Steady State Symbol Value Unit VDSS 100 V VGS "20 V ID 41 A TC = 100°C TC = 25°C PD TA = 25°C Steady State ID PD 3.9 1 2 DPAK CASE 369C STYLE 2 1.9 TA = 25°C IDmaxpkg 60 A TJ, Tstg −55 to 175 °C IS 41 A Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VGS = 10 V, IL(pk) = 40 A, L = 0.1 mH, RG = 25 W) EAS 80 mJ Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. THERMAL RESISTANCE MAXIMUM RATINGS Symbol Value Unit Junction−to−Case − Steady State (Drain) RqJC 1.7 °C/W Junction−to−Ambient − Steady State (Note 2) RqJA 39 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Continuous DC current rating. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. March, 2013 − Rev. 1 4 W A © Semiconductor Components Industries, LLC, 2013 N−Channel A 8.5 238 Parameter D S IDM Source Current (Body Diode) 41 A 23 mW @ 4.5 V W 90 TA = 25°C, tp = 10 ms Operating Junction and Storage Temperature 100 V 6.0 TA = 100°C Current Limited by Package (Note 3) ID 20 mW @ 10 V 45 TA = 100°C TA = 25°C RDS(on) V(BR)DSS G 29 TC = 100°C http://onsemi.com 1 3 MARKING DIAGRAMS & PIN ASSIGNMENT 4 Drain YWW 68 24LG • • • • • 2 1 Drain 3 Gate Source Y WW 6824L G = Year = Work Week = Device Code = Pb−Free Package ORDERING INFORMATION Device Package Shipping† NVD6824NLT4G DPAK (Pb−Free) 2500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Publication Order Number: NVD6824NL/D NVD6824NL ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 100 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Parameter Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current 92 IDSS Gate−to−Source Leakage Current V VGS = 0 V, VDS = 100 V mV/°C TJ = 25°C 1.0 TJ = 125°C 100 IGSS VDS = 0 V, VGS = "20 V VGS(TH) VGS = VDS, ID = 250 mA mA "100 nA 2.5 V ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance RDS(on) Forward Transconductance 1.5 −6.5 gFS mV/°C VGS = 10 V, ID = 20 A 16.5 20 mW VGS = 4.5 V, ID = 20 A 18.5 23 VDS = 15 V, ID = 20 A 18 S 3468 pF CHARGES, CAPACITANCES AND GATE RESISTANCES Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Threshold Gate Charge QG(TOT) VGS = 0 V, f = 1.0 MHz, VDS = 25 V 187 VGS = 4.5 V, VDS = 80 V, ID = 20 A 34 VGS = 10 V, VDS = 80 V, ID = 20 A 66 QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD 133 nC 3.5 VGS = 10 V, VDS = 80 V, ID = 20 A 9.0 18 SWITCHING CHARACTERISTICS (Note 5) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(on) tr td(off) ns 15 VGS = 10 V, VDD = 80 V, ID = 20 A, RG = 2.5 W tf 55 31 42 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD VGS = 0 V, IS = 20 A TJ = 25°C 0.84 TJ = 125°C 0.71 tRR 38 Charge Time ta 28 Discharge Time tb Reverse Recovery Charge VGS = 0 V, dIs/dt = 100 A/ms, IS = 20 A QRR http://onsemi.com 2 V ns 10 59 4. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 5. Switching characteristics are independent of operating junction temperatures. 1.2 nC NVD6824NL TYPICAL CHARACTERISTICS VGS = 10 V TJ = 25°C ID, DRAIN CURRENT (A) 80 100 3.8 V 4.5 V ID, DRAIN CURRENT (A) 100 3.6 V 60 3.4 V 40 3.2 V 3.0 V 20 80 VDS ≥ 10 V 60 TJ = 25°C 40 20 TJ = 125°C 2.8 V 0 1 2 3 4 TJ = −55°C 0 5 3.5 Figure 2. Transfer Characteristics ID = 20 A TJ = 25°C 0.020 0.018 0.016 2 4 6 8 10 4.0 0.030 TJ = 25°C VGS = 4.5 V 0.025 0.020 VGS = 10 V 0.015 0.010 10 20 30 40 50 60 70 80 90 100 VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 100 k 2.8 VGS = 0 V ID = 20 A VGS = 10 V IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (Normalized) 3.0 Figure 1. On−Region Characteristics 0.022 2.4 2.5 VGS, GATE−TO−SOURCE VOLTAGE (V) 0.024 0.014 2.0 VDS, DRAIN−TO−SOURCE (V) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 2.0 1.6 1.2 TJ = 150°C 10 k TJ = 125°C 0.8 0.4 −50 −25 0 25 50 75 100 125 150 175 1k 10 20 30 40 50 60 70 80 90 100 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 NVD6824NL TYPICAL CHARACTERISTICS 4000 VGS = 0 V TJ = 25°C Ciss 3000 2000 1000 Coss 0 Crss 0 10 20 30 40 50 60 70 90 80 6 Qgs 4 Qgd VDS = 80 V ID = 20 A TJ = 25°C 2 0 0 10 20 30 40 50 60 70 VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source Voltage vs. Total Charge 100 IS, SOURCE CURRENT (A) VDS = 80 V ID = 20 A VGS = 10 V 100 tr tf td(off) td(on) 1 10 VGS = 0 V TJ = 25°C 75 50 25 0 100 0.60 0.70 0.80 0.90 1.00 1.10 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 100 ID, DRAIN CURRENT (A) t, TIME (ns) QT 8 100 1000 10 10 VGS, GATE−TO−SOURCE VOLTAGE (V) C, CAPACITANCE (pF) 5000 10 VGS = 10 V Single Pulse TC = 25°C 10 ms 100 ms 1 ms 10 ms 1 0.1 0.01 RDS(on) Limit Thermal Limit Package Limit 0.1 dc 1 10 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 11. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4 100 NVD6824NL TYPICAL CHARACTERISTICS R(t) (°C/W) 10 1 Duty Cycle = 0.5 0.20 0.10 0.1 0.05 0.02 0.01 0.01 Single Pulse 0.000001 0.00001 0.0001 0.001 0.01 PULSE TIME (sec) Figure 12. Thermal Response http://onsemi.com 5 0.1 1 10 NVD6824NL PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369C ISSUE D A E b3 c2 B Z D 1 L4 A 4 L3 b2 e 2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. C H DETAIL A 3 c b 0.005 (0.13) M H C L2 GAUGE PLANE C L SEATING PLANE A1 L1 DETAIL A ROTATED 905 CW DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− SOLDERING FOOTPRINT* 6.20 0.244 2.58 0.102 5.80 0.228 3.00 0.118 1.60 0.063 6.17 0.243 SCALE 3:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. 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