IRFI7446GPBF Data Sheet (567 KB, EN)

StrongIRFET™
IRFI7446GPbF
HEXFET® Power MOSFET
Application
 Brushed motor drive applications
 BLDC motor drive applications
Battery powered circuits
 Half-bridge and full-bridge topologies
 Synchronous rectifier applications
 Resonant mode power supplies
 OR-ing and redundant power switches
 DC/DC and AC/DC converters
 DC/AC inverters
VDSS
40V
RDS(on) typ.
2.6m
max
3.3m
D
G
S
ID
Benefits
Improved gate, avalanche and dynamic dV/dt ruggedness
Fully characterized capacitance and avalanche SOA
Enhanced body diode dV/dt and dI/dt capability
Lead-Free, RoHS compliant




G
IRFI7446GPbF
TO-220 Full-Pak
10
S
Source
Orderable Part Number
IRFI7446GPbF
100
ID = 48A
9
80
8
7
6
T J = 125°C
5
4
3
60
40
20
T J = 25°C
2
1
0
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
1
D
Drain
Standard Pack
Form
Quantity
Tube
50
ID, Drain Current (A)
RDS(on), Drain-to -Source On Resistance (m )
Package Type
S
D
TO-220AB Full-Pak
G
Gate
Base part number
80A
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25
50
75
100
125
150
175
TC , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
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IRFI7446GPbF
Absolute Maximium Rating
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
TJ
TSTG
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Max.
80
57
320
40.5
0.27
± 20
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Mounting Torque, 6-32 or M3 Screw
Avalanche Characteristics EAS (Thermally limited)
Single Pulse Avalanche Energy 
EAS (tested)
Single Pulse Avalanche Energy Tested Value 
IAR
Avalanche Current 
Repetitive Avalanche Energy 
EAR
Thermal Resistance Symbol
Parameter
Junction-to-Case 
RJC
Junction-to-Ambient 
RJA
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
IDSS
IGSS
RG
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
Units
A
W
W/°C
V
-55 to + 175 300
10 lbf·in (1.1 N·m)
°C 233
319
mJ
See Fig. 15, 16, 23a, 23b
A
mJ
Typ.
–––
–––
Max.
3.7
65
Units
°C/W Min.
40
Typ. Max.
––– –––
Units
Conditions
V
VGS = 0V, ID = 250µA
–––
–––
2.2
–––
–––
–––
–––
–––
38
2.6
3.0
–––
–––
–––
–––
1.3
mV/°C Reference to 25°C, ID = 1.0mA 
m VGS = 10V, ID = 48A 
V
VDS = VGS, ID = 100µA
VDS = 40V, VGS = 0V
µA
VDS = 40V,VGS = 0V,TJ =125°C
VGS = 20V
nA
VGS = -20V

–––
3.3
3.9
1.0
150
100
-100
–––
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
 Limited by TJmax, starting TJ = 25°C, L = 270µH, RG = 50, IAS = 48A, VGS =10V.
ISD  48A, di/dt  894A/µs, VDD  V(BR)DSS, TJ 175°C.
Pulse width  400µs; duty cycle  2%.
 Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
 Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
 R is measured at TJ approximately 90°C.
 This value determined from sample failure population, starting TJ =25°C, L = 270µH, RG = 50, IAS = 48A, VGS =10V.
2
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IRFI7446GPbF
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg – Qgd)
Turn-On Delay Time
Rise Time
Min.
139
–––
–––
–––
–––
–––
–––
td(off)
Turn-Off Delay Time
–––
tf
Ciss
Coss
Fall Time
Input Capacitance
Output Capacitance
–––
–––
–––
Crss
Reverse Transfer Capacitance
–––
Typ. Max. Units
Conditions
––– –––
S VDS = 10V, ID =48A
60
90
ID = 48A
13
–––
VDS = 20V
nC 22
–––
VGS = 10V
38
–––
13
–––
VDD = 20V
ID = 48A
68
–––
ns
29
–––
RG= 2.7
VGS = 10V
26
–––
3199 –––
VGS = 0V
473 –––
VDS = 25V
320 –––
pF ƒ = 1.0MHz, See Fig.7
Coss eff.(ER)
Coss eff.(TR)
Effective Output Capacitance (Energy Related)
Output Capacitance (Time Related)
–––
–––
561
679
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min.
Typ. Max. Units
–––
–––
–––
–––
320
VSD
Diode Forward Voltage
–––
–––
1.3
dv/dt
Peak Diode Recovery dv/dt
–––
6.6
–––
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
–––
–––
–––
–––
28
29
25
27
–––
–––
–––
–––
IRRM
Reverse Recovery Current
–––
1.5
–––
–––
–––
VGS = 0V, VDS = 0V to 32V
VGS = 0V, VDS = 0V to 32V
Diode Characteristics Symbol
IS
ISM
3
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80
A
V
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
D
G
S
TJ = 25°C,IS = 48A,VGS = 0V 
V/ns TJ = 175°C,IS =48A, VDS = 40V 
TJ = 25°C
TJ = 125°C
TJ = 25°C
nC
TJ = 125°C
ns
A
TJ = 25°C
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VDD = 34V
IF = 48A,
di/dt = 100A/µs 

May 19, 2014
IRFI7446GPbF
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
4.5V
100
10
4.5V
1
60µs PULSE WIDTH
60µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
10
0.1
0.01
0.1
1
0.1
10
V DS, Drain-to-Source Voltage (V)
1000
RDS(on) , Drain-to-Source On Resistance
(Normalized)
2.0
100
T J = 175°C
10
T J = 25°C
1
VDS = 10V
60µs PULSE WIDTH
0.1
ID = 48A
VGS = 10V
1.8
1.6
1.4
1.2
1.0
0.8
0.6
2
3
4
5
6
7
8
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 5. Typical Transfer Characteristics
100000
VGS, Gate-to-Source Voltage (V)
ID= 48A
C, Capacitance (pF)
10000
Ciss
Coss
1000
Fig 6. Normalized On-Resistance vs. Temperature
14
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
Coss = Cds + Cgd
Crss
100
12
VDS= 32V
VDS= 20V
VDS= 8.0V
10
8
6
4
2
0
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
4
10
Fig 4. Typical Output Characteristics
Fig 3. Typical Output Characteristics
ID, Drain-to-Source Current (A)
1
V DS, Drain-to-Source Voltage (V)
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0
10
20
30
40
50
60
70
80
QG, Total Gate Charge (nC)
Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFI7446GPbF
T J = 175°C
100
T J = 25°C
10
100µsec
100
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
1msec
OPERATION
IN THIS AREA
LIMITED
BY RDS(on)
10
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
1.0
0.1
0.2
0.6
1.0
1.4
1.8
0.1
VSD , Source-to-Drain Voltage (V)
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
0.4
50
Id = 1.0mA
0.4
48
0.3
46
0.3
Energy (µJ)
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
10msec
44
0.2
0.2
42
0.1
40
0.1
38
0.0
-5
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
5
10
15
20
25
30
35
40
VDS, Drain-to-Source Voltage (V)
Fig 11. Drain-to-Source Breakdown Voltage
RDS(on), Drain-to -Source On Resistance ( m)
0
Fig 12. Typical Coss Stored Energy
20.0
VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
VGS = 10V
17.5
15.0
12.5
10.0
7.5
5.0
2.5
0.0
0
100
200
300
400
ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
5
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IRFI7446GPbF
Thermal Response ( Z thJC ) °C/W
10
D = 0.50
1
0.20
0.10
0.05
0.1
0.02
0.01
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart = 25°C (Single Pulse)
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
350
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 48A
EAR , Avalanche Energy (mJ)
300
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav Submit Datasheet Feedback
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IRFI7446GPbF
4.0
10
3.5
8
IF = 48A
V R = 34V
TJ = 25°C
TJ = 125°C
3.0
2.5
ID
ID
ID
ID
2.0
IRRM (A)
VGS(th) , Gate threshold Voltage (V)
= 100µA
= 250µA
= 1.0mA
= 1.0A
6
4
2
1.5
0
1.0
-75 -50 -25
0
0
25 50 75 100 125 150 175
200
600
800
1000
diF /dt (A/µs)
T J , Temperature ( °C )
Fig 18. Typical Recovery Current vs. dif/dt
Fig 17. Threshold Voltage vs. Temperature
10
200
IF = 32A
V R = 34V
8
TJ = 25°C
TJ = 125°C
IF = 48A
V R = 34V
TJ = 25°C
150
TJ = 125°C
6
QRR (nC)
IRRM (A)
400
4
100
50
2
0
0
0
200
400
600
800
1000
0
200
diF /dt (A/µs)
400
600
800
1000
diF /dt (A/µs)
Fig 19. Typical Recovery Current vs. dif/dt
Fig 20. Typical Stored Charge vs. dif/dt
200
IF = 32A
V R = 34V
TJ = 25°C
150
QRR (nC)
TJ = 125°C
100
50
0
0
200
400
600
800
1000
diF /dt (A/µs)
Fig 21. Typical Stored Charge vs. dif/dt
7
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IRFI7446GPbF
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
tp
15V
DRIVER
L
VDS
D.U.T
RG
IAS
20V
tp
+
V
- DD
A
I AS
0.01
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD Vgs(th)
Qgs1 Qgs2
Fig 25a. Gate Charge Test Circuit
8
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Qgd
Qgodr
Fig 25b. Gate Charge Waveform
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IRFI7446GPbF
TO-220 Full–Pak Package Outline (Dimensions are shown in millimeters (inches))
TO-220 Full-Pak Part Marking Information
TO-220AB Full-Pak packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRFI7446GPbF
Qualification Information† Industrial
Qualification Level Moisture Sensitivity Level
TO-220 Full-Pak
N/A
Yes
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
††
Applicable version of JEDEC standard at the time of product release.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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